/[gxemul]/trunk/src/devices/dev_mp.c
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revision 28 by dpavlin, Mon Oct 8 16:20:26 2007 UTC revision 34 by dpavlin, Mon Oct 8 16:21:17 2007 UTC
# Line 1  Line 1 
1  /*  /*
2   *  Copyright (C) 2003-2006  Anders Gavare.  All rights reserved.   *  Copyright (C) 2003-2007  Anders Gavare.  All rights reserved.
3   *   *
4   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
5   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *     *  
27   *   *
28   *  $Id: dev_mp.c,v 1.37 2006/07/01 21:15:46 debug Exp $   *  $Id: dev_mp.c,v 1.40 2007/01/28 13:45:46 debug Exp $
29   *   *
30   *  This is a fake multiprocessor (MP) device. It can be useful for   *  This is a fake multiprocessor (MP) device. It can be useful for
31   *  theoretical experiments, but probably bares no resemblance to any   *  theoretical experiments, but probably bares no resemblance to any
32   *  multiprocessor controller used in any real machine.   *  multiprocessor controller used in any real machine.
33     *
34     *  NOTE: The devinit irq string should be the part _after_ "cpu[%i].".
35     *        For MIPS, it will be MIPS_IPI_INT.
36   */   */
37    
38  #include <stdio.h>  #include <stdio.h>
# Line 37  Line 40 
40  #include <string.h>  #include <string.h>
41    
42  #include "cpu.h"  #include "cpu.h"
 #include "cpu_mips.h"  
43  #include "device.h"  #include "device.h"
44  #include "machine.h"  #include "machine.h"
45    #include "interrupt.h"
46  #include "memory.h"  #include "memory.h"
47  #include "misc.h"  #include "misc.h"
48    
# Line 55  struct mp_data { Line 58  struct mp_data {
58          /*  Each CPU has an array of pending ipis.  */          /*  Each CPU has an array of pending ipis.  */
59          int             *n_pending_ipis;          int             *n_pending_ipis;
60          int             **ipi;          int             **ipi;
61    
62            /*  Connections to all CPUs' IPI pins:  */
63            struct interrupt *ipi_irq;
64  };  };
65    
66    
67  extern int single_step;  extern int single_step;
68    
69    
 /*  
  *  dev_mp_access():  
  */  
70  DEVICE_ACCESS(mp)  DEVICE_ACCESS(mp)
71  {  {
72          struct mp_data *d = extra;          struct mp_data *d = extra;
# Line 195  DEVICE_ACCESS(mp) Line 198  DEVICE_ACCESS(mp)
198                                          fprintf(stderr, "out of memory\n");                                          fprintf(stderr, "out of memory\n");
199                                          exit(1);                                          exit(1);
200                                  }                                  }
201    
202                                  /*  Add the IPI last in the array:  */                                  /*  Add the IPI last in the array:  */
203                                  d->ipi[i][d->n_pending_ipis[i] - 1] =                                  d->ipi[i][d->n_pending_ipis[i] - 1] =
204                                      idata >> 16;                                      idata >> 16;
205                                  cpu_interrupt(d->cpus[i], MIPS_IPI_INT);  
206                                    INTERRUPT_ASSERT(d->ipi_irq[i]);
207                          }                          }
208                  }                  }
209                  break;                  break;
# Line 222  DEVICE_ACCESS(mp) Line 227  DEVICE_ACCESS(mp)
227                                      &d->ipi[cpu->cpu_id][1],                                      &d->ipi[cpu->cpu_id][1],
228                                      d->n_pending_ipis[cpu->cpu_id]);                                      d->n_pending_ipis[cpu->cpu_id]);
229                  }                  }
230    
231                  /*  Deassert the interrupt, if there are no pending IPIs:  */                  /*  Deassert the interrupt, if there are no pending IPIs:  */
232                  if (d->n_pending_ipis[cpu->cpu_id] == 0)                  if (d->n_pending_ipis[cpu->cpu_id] == 0)
233                          cpu_interrupt_ack(d->cpus[cpu->cpu_id], MIPS_IPI_INT);                          INTERRUPT_DEASSERT(d->ipi_irq[cpu->cpu_id]);
234                  break;                  break;
235    
236          case DEV_MP_NCYCLES:          case DEV_MP_NCYCLES:
# Line 255  DEVICE_ACCESS(mp) Line 261  DEVICE_ACCESS(mp)
261  DEVINIT(mp)  DEVINIT(mp)
262  {  {
263          struct mp_data *d;          struct mp_data *d;
264          int n;          int n, i;
265    
266          d = malloc(sizeof(struct mp_data));          d = malloc(sizeof(struct mp_data));
267          if (d == NULL) {          if (d == NULL) {
# Line 268  DEVINIT(mp) Line 274  DEVINIT(mp)
274          d->stack_addr = INITIAL_STACK_POINTER;          d->stack_addr = INITIAL_STACK_POINTER;
275    
276          n = devinit->machine->ncpus;          n = devinit->machine->ncpus;
277    
278            /*  Connect to all CPUs' IPI pins:  */
279            d->ipi_irq = malloc(n * sizeof(struct interrupt));
280            if (d->ipi_irq == NULL) {
281                    fprintf(stderr, "out of memory\n");
282                    exit(1);
283            }
284            for (i=0; i<n; i++) {
285                    char tmpstr[200];
286                    snprintf(tmpstr, sizeof(tmpstr), "%s.cpu[%i].%s",
287                        devinit->machine->path, i, devinit->interrupt_path);
288                    INTERRUPT_CONNECT(tmpstr, d->ipi_irq[i]);
289            }
290    
291          d->n_pending_ipis = malloc(n * sizeof(int));          d->n_pending_ipis = malloc(n * sizeof(int));
292          d->ipi = malloc(n * sizeof(int *));          d->ipi = malloc(n * sizeof(int *));
293          if (d->ipi == NULL || d->n_pending_ipis == NULL) {          if (d->ipi == NULL || d->n_pending_ipis == NULL) {
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