/[dynamips]/trunk/cpu.h
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Contents of /trunk/cpu.h

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Revision 12 - (show annotations)
Sat Oct 6 16:45:40 2007 UTC (12 years ago) by dpavlin
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1 /*
2 * Cisco router simulation platform.
3 * Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr)
4 */
5
6 #ifndef __CPU_H__
7 #define __CPU_H__
8
9 #include <pthread.h>
10 #include <setjmp.h>
11 #include "utils.h"
12 #include "jit_op.h"
13
14 #include "mips64.h"
15 #include "mips64_cp0.h"
16 #include "ppc32.h"
17
18 /* Possible CPU types */
19 enum {
20 CPU_TYPE_MIPS64 = 1,
21 CPU_TYPE_PPC32,
22 };
23
24 /* Virtual CPU states */
25 enum {
26 CPU_STATE_RUNNING = 0,
27 CPU_STATE_HALTED,
28 CPU_STATE_SUSPENDED,
29 };
30
31 /* Maximum results for idle pc */
32 #define CPU_IDLE_PC_MAX_RES 10
33
34 /* Idle PC proposed value */
35 struct cpu_idle_pc {
36 m_uint64_t pc;
37 u_int count;
38 };
39
40 /* Number of recorded memory accesses (power of two) */
41 #define MEMLOG_COUNT 16
42
43 typedef struct memlog_access memlog_access_t;
44 struct memlog_access {
45 m_uint64_t iaddr;
46 m_uint64_t vaddr;
47 m_uint64_t data;
48 m_uint32_t data_valid;
49 m_uint32_t op_size;
50 m_uint32_t op_type;
51 };
52
53 /* Undefined memory access handler */
54 typedef int (*cpu_undefined_mem_handler_t)(cpu_gen_t *cpu,m_uint64_t vaddr,
55 u_int op_size,u_int op_type,
56 m_uint64_t *data);
57
58 /* Generic CPU definition */
59 struct cpu_gen {
60 /* CPU type and identifier for MP systems */
61 u_int type,id;
62
63 /* CPU states */
64 volatile u_int state,prev_state;
65 volatile m_uint64_t seq_state;
66
67 /* Thread running this CPU */
68 pthread_t cpu_thread;
69 int cpu_thread_running;
70
71 /* Exception restore point */
72 jmp_buf exec_loop_env;
73
74 /* "Idle" loop management */
75 u_int idle_count,idle_max,idle_sleep_time;
76 pthread_mutex_t idle_mutex;
77 pthread_cond_t idle_cond;
78
79 /* VM instance */
80 vm_instance_t *vm;
81
82 /* Next CPU in group */
83 cpu_gen_t *next;
84
85 /* Idle PC proposal */
86 struct cpu_idle_pc idle_pc_prop[CPU_IDLE_PC_MAX_RES];
87 u_int idle_pc_prop_count;
88
89 /* Specific CPU part */
90 union {
91 cpu_mips_t mips64_cpu;
92 cpu_ppc_t ppc32_cpu;
93 }sp;
94
95 /* Methods */
96 void (*reg_set)(cpu_gen_t *cpu,u_int reg_index,m_uint64_t val);
97 void (*reg_dump)(cpu_gen_t *cpu);
98 void (*mmu_dump)(cpu_gen_t *cpu);
99 void (*mmu_raw_dump)(cpu_gen_t *cpu);
100 void (*add_breakpoint)(cpu_gen_t *cpu,m_uint64_t addr);
101 void (*remove_breakpoint)(cpu_gen_t *cpu,m_uint64_t addr);
102 void (*set_idle_pc)(cpu_gen_t *cpu,m_uint64_t addr);
103 void (*get_idling_pc)(cpu_gen_t *cpu);
104 void (*mts_rebuild)(cpu_gen_t *cpu);
105 void (*mts_show_stats)(cpu_gen_t *cpu);
106
107 cpu_undefined_mem_handler_t undef_mem_handler;
108
109 /* Memory access log for fault debugging */
110 u_int memlog_pos;
111 memlog_access_t memlog_array[MEMLOG_COUNT];
112
113 /* Statistics */
114 m_uint64_t dev_access_counter;
115
116 /* JIT op array for current compiled page */
117 u_int jit_op_array_size;
118 jit_op_t **jit_op_array;
119 jit_op_t **jit_op_current;
120
121 /* JIT op pool */
122 jit_op_t *jit_op_pool[JIT_OP_POOL_NR];
123 };
124
125 /* CPU group definition */
126 typedef struct cpu_group cpu_group_t;
127 struct cpu_group {
128 char *name;
129 cpu_gen_t *cpu_list;
130 void *priv_data;
131 };
132
133 #define CPU_MIPS64(cpu) (&(cpu)->sp.mips64_cpu)
134 #define CPU_PPC32(cpu) (&(cpu)->sp.ppc32_cpu)
135
136 /* Get CPU instruction pointer */
137 static forced_inline m_uint64_t cpu_get_pc(cpu_gen_t *cpu)
138 {
139 switch(cpu->type) {
140 case CPU_TYPE_MIPS64:
141 return(CPU_MIPS64(cpu)->pc);
142 case CPU_TYPE_PPC32:
143 return((m_uint64_t)CPU_PPC32(cpu)->ia);
144 default:
145 return(0);
146 }
147 }
148
149 /* Get CPU performance counter */
150 static forced_inline m_uint32_t cpu_get_perf_counter(cpu_gen_t *cpu)
151 {
152 switch(cpu->type) {
153 case CPU_TYPE_MIPS64:
154 return(CPU_MIPS64(cpu)->perf_counter);
155 case CPU_TYPE_PPC32:
156 return(CPU_PPC32(cpu)->perf_counter);
157 default:
158 return(0);
159 }
160 }
161
162 /* Find a CPU in a group given its ID */
163 cpu_gen_t *cpu_group_find_id(cpu_group_t *group,u_int id);
164
165 /* Find the highest CPU ID in a CPU group */
166 int cpu_group_find_highest_id(cpu_group_t *group,u_int *highest_id);
167
168 /* Add a CPU in a CPU group */
169 int cpu_group_add(cpu_group_t *group,cpu_gen_t *cpu);
170
171 /* Create a new CPU group */
172 cpu_group_t *cpu_group_create(char *name);
173
174 /* Delete a CPU group */
175 void cpu_group_delete(cpu_group_t *group);
176
177 /* Rebuild the MTS subsystem for a CPU group */
178 int cpu_group_rebuild_mts(cpu_group_t *group);
179
180 /* Log a message for a CPU */
181 void cpu_log(cpu_gen_t *cpu,char *module,char *format,...);
182
183 /* Create a new CPU */
184 cpu_gen_t *cpu_create(vm_instance_t *vm,u_int type,u_int id);
185
186 /* Delete a CPU */
187 void cpu_delete(cpu_gen_t *cpu);
188
189 /* Start a CPU */
190 void cpu_start(cpu_gen_t *cpu);
191
192 /* Stop a CPU */
193 void cpu_stop(cpu_gen_t *cpu);
194
195 /* Start all CPUs of a CPU group */
196 void cpu_group_start_all_cpu(cpu_group_t *group);
197
198 /* Stop all CPUs of a CPU group */
199 void cpu_group_stop_all_cpu(cpu_group_t *group);
200
201 /* Set a state of all CPUs of a CPU group */
202 void cpu_group_set_state(cpu_group_t *group,u_int state);
203
204 /* Synchronize on CPUs (all CPUs must be inactive) */
205 int cpu_group_sync_state(cpu_group_t *group);
206
207 /* Save state of all CPUs */
208 int cpu_group_save_state(cpu_group_t *group);
209
210 /* Restore state of all CPUs */
211 int cpu_group_restore_state(cpu_group_t *group);
212
213 /* Virtual idle loop */
214 void cpu_idle_loop(cpu_gen_t *cpu);
215
216 /* Break idle wait state */
217 void cpu_idle_break_wait(cpu_gen_t *cpu);
218
219 /* Returns to the CPU exec loop */
220 static inline void cpu_exec_loop_enter(cpu_gen_t *cpu)
221 {
222 longjmp(cpu->exec_loop_env,1);
223 }
224
225 /* Set the exec loop entry point */
226 #define cpu_exec_loop_set(cpu) setjmp((cpu)->exec_loop_env)
227
228 #endif

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