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/* |
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* HT Editor |
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* x86opc.cc |
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* |
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* Copyright (C) 1999-2002 Stefan Weyergraf |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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*/ |
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|
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#include "x86opc.h" |
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|
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/* Percent tokens in strings: |
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First char after '%': |
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A - direct address |
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C - reg of r/m picks control register |
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D - reg of r/m picks debug register |
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E - r/m picks operand |
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F - flags register |
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G - reg of r/m picks general register |
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I - immediate data (takes extended size, data size) |
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J - relative IP offset |
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M - r/m picks memory |
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O - no r/m, offset only |
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P - reg of r/m picks mm register (mm0-mm7) |
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Q - r/m picks mm operand (mm0-mm7/mem64) |
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R - mod of r/m picks register only |
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S - reg of r/m picks segment register |
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T - reg of r/m picks test register |
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X - DS:ESI |
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Y - ES:EDI |
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2 - prefix of two-unsigned char opcode |
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3 - prefix of 3DNow! opcode |
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e - put in 'e' if use32 (second char is part of reg name) |
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put in 'w' for use16 or 'd' for use32 (second char is 'w') |
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f - floating point (second char is esc value) |
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g - do r/m group n (where n may be one of 0-9,A-Z) |
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p - prefix |
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s - size override (second char is a,o) |
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+ - make default signed |
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Second char after '%': |
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a - two words in memory (BOUND) |
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b - byte |
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c - byte or word |
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d - dword |
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p - 32 or 48 bit pointer |
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q - quadword |
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s - six unsigned char pseudo-descriptor |
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v - word or dword |
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w - word |
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F - use floating regs in mod/rm |
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+ - always sign |
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- - sign if negative |
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1-8 - group number, esc value, etc |
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*/ |
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|
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#define Ap TYPE_A, 0, SIZE_P, SIZE_P |
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#define Cd TYPE_C, 0, SIZE_D, SIZE_D |
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#define Dd TYPE_D, 0, SIZE_D, SIZE_D |
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#define E TYPE_E, 0, SIZE_0, SIZE_0 |
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#define Eb TYPE_E, 0, SIZE_B, SIZE_B |
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#define Ew TYPE_E, 0, SIZE_W, SIZE_W |
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#define Ed TYPE_E, 0, SIZE_D, SIZE_D |
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#define Eq TYPE_E, 0, SIZE_Q, SIZE_Q |
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#define Ev TYPE_E, 0, SIZE_V, SIZE_V |
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#define Es TYPE_E, 0, SIZE_S, SIZE_S |
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#define El TYPE_E, 0, SIZE_L, SIZE_L |
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#define Et TYPE_E, 0, SIZE_T, SIZE_T |
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#define Ea TYPE_E, 0, SIZE_A, SIZE_A |
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#define Gb TYPE_G, 0, SIZE_B, SIZE_B |
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#define Gw TYPE_G, 0, SIZE_W, SIZE_W |
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#define Gv TYPE_G, 0, SIZE_V, SIZE_V |
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#define Ib TYPE_I, 0, SIZE_B, SIZE_B |
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#define Iw TYPE_I, 0, SIZE_W, SIZE_W |
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#define Iv TYPE_I, 0, SIZE_V, SIZE_V |
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#define Ibv TYPE_I, 0, SIZE_B, SIZE_V |
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#define sIbv TYPE_Is,0, SIZE_B, SIZE_V |
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#define Jb TYPE_J, 0, SIZE_B, SIZE_B |
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#define Jv TYPE_J, 0, SIZE_V, SIZE_V |
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#define M TYPE_M, 0, 0, 0 |
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#define Mw TYPE_M, 0, SIZE_W, SIZE_W |
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#define Md TYPE_M, 0, SIZE_D, SIZE_D |
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#define Mp TYPE_M, 0, SIZE_P, SIZE_P |
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#define Mq TYPE_M, 0, SIZE_Q, SIZE_Q |
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#define Ms TYPE_M, 0, SIZE_S, SIZE_S |
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#define Ml TYPE_M, 0, SIZE_L, SIZE_L |
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#define Mt TYPE_M, 0, SIZE_T, SIZE_T |
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#define Ma TYPE_M, 0, SIZE_A, SIZE_A |
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#define Ob TYPE_O, 0, SIZE_B, SIZE_B |
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#define Ov TYPE_O, 0, SIZE_V, SIZE_V |
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#define Pd TYPE_P, 0, SIZE_D, SIZE_D |
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#define Pq TYPE_P, 0, SIZE_Q, SIZE_Q |
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#define Qd TYPE_Q, 0, SIZE_D, SIZE_D |
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#define Qq TYPE_Q, 0, SIZE_Q, SIZE_Q |
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#define Rb TYPE_R, 0, SIZE_B, SIZE_B |
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#define Rw TYPE_R, 0, SIZE_W, SIZE_W |
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#define Rd TYPE_R, 0, SIZE_D, SIZE_D |
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#define Rv TYPE_R, 0, SIZE_V, SIZE_V |
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#define Sw TYPE_S, 0, SIZE_W, SIZE_W |
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#define Td TYPE_T, 0, SIZE_D, SIZE_D |
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|
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#define Ft TYPE_F, 0, SIZE_T, SIZE_T |
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|
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#define __st TYPE_Fx, 0, SIZE_T, SIZE_T |
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|
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#define __1 TYPE_Ix, 1, SIZE_B, SIZE_B |
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#define __3 TYPE_Ix, 3, SIZE_B, SIZE_B /* for int 3 */ |
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|
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#define __al TYPE_Rx, 0, SIZE_B, SIZE_B |
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#define __cl TYPE_Rx, 1, SIZE_B, SIZE_B |
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#define __dl TYPE_Rx, 2, SIZE_B, SIZE_B |
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#define __bl TYPE_Rx, 3, SIZE_B, SIZE_B |
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#define __ah TYPE_Rx, 4, SIZE_B, SIZE_B |
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#define __ch TYPE_Rx, 5, SIZE_B, SIZE_B |
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#define __dh TYPE_Rx, 6, SIZE_B, SIZE_B |
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#define __bh TYPE_Rx, 7, SIZE_B, SIZE_B |
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|
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#define __ax TYPE_Rx, 0, SIZE_V, SIZE_V |
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#define __cx TYPE_Rx, 1, SIZE_V, SIZE_V |
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#define __dx TYPE_Rx, 2, SIZE_V, SIZE_V |
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#define __bx TYPE_Rx, 3, SIZE_V, SIZE_V |
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#define __sp TYPE_Rx, 4, SIZE_V, SIZE_V |
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#define __bp TYPE_Rx, 5, SIZE_V, SIZE_V |
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#define __si TYPE_Rx, 6, SIZE_V, SIZE_V |
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#define __di TYPE_Rx, 7, SIZE_V, SIZE_V |
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|
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#define __axw TYPE_Rx, 0, SIZE_W, SIZE_W |
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#define __dxw TYPE_Rx, 2, SIZE_W, SIZE_W |
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|
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#define __axd TYPE_Rx, 0, SIZE_D, SIZE_D |
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#define __cxd TYPE_Rx, 1, SIZE_D, SIZE_D |
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#define __dxd TYPE_Rx, 2, SIZE_D, SIZE_D |
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#define __bxd TYPE_Rx, 3, SIZE_D, SIZE_D |
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#define __spd TYPE_Rx, 4, SIZE_D, SIZE_D |
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#define __bpd TYPE_Rx, 5, SIZE_D, SIZE_D |
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#define __sid TYPE_Rx, 6, SIZE_D, SIZE_D |
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#define __did TYPE_Rx, 7, SIZE_D, SIZE_D |
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|
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#define __es TYPE_Sx, 0, SIZE_W, SIZE_W |
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#define __cs TYPE_Sx, 1, SIZE_W, SIZE_W |
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#define __ss TYPE_Sx, 2, SIZE_W, SIZE_W |
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#define __ds TYPE_Sx, 3, SIZE_W, SIZE_W |
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#define __fs TYPE_Sx, 4, SIZE_W, SIZE_W |
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#define __gs TYPE_Sx, 5, SIZE_W, SIZE_W |
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|
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#define __st0 TYPE_F, 0, SIZE_T, SIZE_T |
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#define __st1 TYPE_F, 1, SIZE_T, SIZE_T |
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#define __st2 TYPE_F, 2, SIZE_T, SIZE_T |
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#define __st3 TYPE_F, 3, SIZE_T, SIZE_T |
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#define __st4 TYPE_F, 4, SIZE_T, SIZE_T |
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#define __st5 TYPE_F, 5, SIZE_T, SIZE_T |
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#define __st6 TYPE_F, 6, SIZE_T, SIZE_T |
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#define __st7 TYPE_F, 7, SIZE_T, SIZE_T |
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|
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char *x86_regs[3][8] = { |
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{"al", "cl", "dl", "bl", "ah", "ch", "dh", "bh"}, |
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{"ax", "cx", "dx", "bx", "sp", "bp", "si", "di"}, |
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{"eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi"} |
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}; |
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|
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char *x86_segs[8] = { |
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"es", "cs", "ss", "ds", "fs", "gs", 0, 0 |
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}; |
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|
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#define GROUP_80 0 |
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#define GROUP_81 1 |
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#define GROUP_83 2 |
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#define GROUP_C0 3 |
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#define GROUP_C1 4 |
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#define GROUP_D0 5 |
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#define GROUP_D1 6 |
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#define GROUP_D2 7 |
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#define GROUP_D3 8 |
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#define GROUP_F6 9 |
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#define GROUP_F7 10 |
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#define GROUP_FE 11 |
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#define GROUP_FF 12 |
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#define GROUP_EXT_00 13 |
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#define GROUP_EXT_01 14 |
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#define GROUP_EXT_71 15 |
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#define GROUP_EXT_72 16 |
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#define GROUP_EXT_73 17 |
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#define GROUP_EXT_BA 18 |
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#define GROUP_EXT_C7 19 |
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//#define GROUP_EXT_AE 20 |
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|
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x86opc_insn x86_insns[256] = { |
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/* 00 */ |
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{"add", {{Eb}, {Gb}}}, |
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{"add", {{Ev}, {Gv}}}, |
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{"add", {{Gb}, {Eb}}}, |
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{"add", {{Gv}, {Ev}}}, |
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{"add", {{__al}, {Ib}}}, |
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{"add", {{__ax}, {Iv}}}, |
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{"push", {{__es}}}, |
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{"pop", {{__es}}}, |
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/* 08 */ |
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{"or", {{Eb}, {Gb}}}, |
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{"or", {{Ev}, {Gv}}}, |
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{"or", {{Gb}, {Eb}}}, |
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{"or", {{Gv}, {Ev}}}, |
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{"or", {{__al}, {Ib}}}, |
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{"or", {{__ax}, {Iv}}}, |
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{"push", {{__cs}}}, |
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{0, {{SPECIAL_TYPE_PREFIX}}}, /* prefix */ |
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/* 10 */ |
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{"adc", {{Eb}, {Gb}}}, |
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{"adc", {{Ev}, {Gv}}}, |
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{"adc", {{Gb}, {Eb}}}, |
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{"adc", {{Gv}, {Ev}}}, |
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{"adc", {{__al}, {Ib}}}, |
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{"adc", {{__ax}, {Iv}}}, |
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{"push", {{__ss}}}, |
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{"pop", {{__ss}}}, |
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/* 18 */ |
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{"sbb", {{Eb}, {Gb}}}, |
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{"sbb", {{Ev}, {Gv}}}, |
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{"sbb", {{Gb}, {Eb}}}, |
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{"sbb", {{Gv}, {Ev}}}, |
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{"sbb", {{__al}, {Ib}}}, |
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{"sbb", {{__ax}, {Iv}}}, |
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{"push", {{__ds}}}, |
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{"pop", {{__ds}}}, |
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/* 20 */ |
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{"and", {{Eb}, {Gb}}}, |
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{"and", {{Ev}, {Gv}}}, |
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{"and", {{Gb}, {Eb}}}, |
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{"and", {{Gv}, {Ev}}}, |
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{"and", {{__al}, {Ib}}}, |
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{"and", {{__ax}, {Iv}}}, |
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{0, {{SPECIAL_TYPE_PREFIX}}}, /* es-prefix */ |
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{"daa"}, |
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/* 28 */ |
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{"sub", {{Eb}, {Gb}}}, |
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{"sub", {{Ev}, {Gv}}}, |
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{"sub", {{Gb}, {Eb}}}, |
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{"sub", {{Gv}, {Ev}}}, |
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{"sub", {{__al}, {Ib}}}, |
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{"sub", {{__ax}, {Iv}}}, |
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{0, {{SPECIAL_TYPE_PREFIX}}}, /* cs-prefix */ |
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{"das"}, |
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/* 30 */ |
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{"xor", {{Eb}, {Gb}}}, |
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{"xor", {{Ev}, {Gv}}}, |
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{"xor", {{Gb}, {Eb}}}, |
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{"xor", {{Gv}, {Ev}}}, |
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{"xor", {{__al}, {Ib}}}, |
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{"xor", {{__ax}, {Iv}}}, |
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{0, {{SPECIAL_TYPE_PREFIX}}}, /* ss-prefix */ |
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{"aaa"}, |
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/* 38 */ |
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{"cmp", {{Eb}, {Gb}}}, |
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{"cmp", {{Ev}, {Gv}}}, |
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{"cmp", {{Gb}, {Eb}}}, |
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{"cmp", {{Gv}, {Ev}}}, |
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{"cmp", {{__al}, {Ib}}}, |
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{"cmp", {{__ax}, {Iv}}}, |
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{0, {{SPECIAL_TYPE_PREFIX}}}, /* ds-prefix */ |
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{"aas"}, |
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/* 40 */ |
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{"inc", {{__ax}}}, |
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{"inc", {{__cx}}}, |
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{"inc", {{__dx}}}, |
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{"inc", {{__bx}}}, |
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{"inc", {{__sp}}}, |
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{"inc", {{__bp}}}, |
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{"inc", {{__si}}}, |
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{"inc", {{__di}}}, |
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/* 48 */ |
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{"dec", {{__ax}}}, |
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{"dec", {{__cx}}}, |
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{"dec", {{__dx}}}, |
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{"dec", {{__bx}}}, |
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{"dec", {{__sp}}}, |
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{"dec", {{__bp}}}, |
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{"dec", {{__si}}}, |
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{"dec", {{__di}}}, |
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/* 50 */ |
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{"push", {{__ax}}}, |
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{"push", {{__cx}}}, |
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{"push", {{__dx}}}, |
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{"push", {{__bx}}}, |
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{"push", {{__sp}}}, |
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{"push", {{__bp}}}, |
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{"push", {{__si}}}, |
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{"push", {{__di}}}, |
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/* 58 */ |
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{"pop", {{__ax}}}, |
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{"pop", {{__cx}}}, |
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{"pop", {{__dx}}}, |
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{"pop", {{__bx}}}, |
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{"pop", {{__sp}}}, |
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{"pop", {{__bp}}}, |
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{"pop", {{__si}}}, |
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{"pop", {{__di}}}, |
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/* 60 */ |
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{"pusha"}, |
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{"popa"}, |
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{"bound", {{Gv}, {Mq}}}, |
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{"arpl", {{Ew}, {Rw}}}, |
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{0, {{SPECIAL_TYPE_PREFIX}}}, /* fs-prefix */ |
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{0, {{SPECIAL_TYPE_PREFIX}}}, /* gs-prefix */ |
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{0, {{SPECIAL_TYPE_PREFIX}}}, /* op-size prefix */ |
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{0, {{SPECIAL_TYPE_PREFIX}}}, /* addr-size prefix */ |
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/* 68 */ |
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{"push", {{Iv}}}, |
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{"imul", {{Gv}, {Ev}, {Iv}}}, |
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{"push", {{sIbv}}}, |
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{"imul", {{Gv}, {Ev}, {sIbv}}}, |
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{"insb"}, |
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{"ins%c"}, |
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{"outsb"}, |
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{"outs%c"}, |
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/* 70 */ |
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{"jo", {{Jb}}}, |
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{"jno", {{Jb}}}, |
327 |
{"jc", {{Jb}}}, |
328 |
{"jnc", {{Jb}}}, |
329 |
{"jz", {{Jb}}}, |
330 |
{"jnz", {{Jb}}}, |
331 |
{"jna", {{Jb}}}, |
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{"ja", {{Jb}}}, |
333 |
/* 78 */ |
334 |
{"js", {{Jb}}}, |
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{"jns", {{Jb}}}, |
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{"jp", {{Jb}}}, |
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{"jnp", {{Jb}}}, |
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{"jl", {{Jb}}}, /* aka jnge */ |
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{"jnl", {{Jb}}}, /* aka jge */ |
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{"jng", {{Jb}}}, /* aka jle */ |
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{"jg", {{Jb}}}, /* aka jnle */ |
342 |
/* 80 */ |
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{0, {{SPECIAL_TYPE_GROUP, GROUP_80}}}, |
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{0, {{SPECIAL_TYPE_GROUP, GROUP_81}}}, |
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{0}, |
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{0, {{SPECIAL_TYPE_GROUP, GROUP_83}}}, |
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{"test", {{Eb}, {Gb}}}, |
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{"test", {{Ev}, {Gv}}}, |
349 |
{"xchg", {{Eb}, {Gb}}}, |
350 |
{"xchg", {{Ev}, {Gv}}}, |
351 |
/* 88 */ |
352 |
{"mov", {{Eb}, {Gb}}}, |
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{"mov", {{Ev}, {Gv}}}, |
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{"mov", {{Gb}, {Eb}}}, |
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{"mov", {{Gv}, {Ev}}}, |
356 |
{"mov", {{Ev}, {Sw}}}, |
357 |
{"lea", {{Gv}, {M}}}, |
358 |
{"mov", {{Sw}, {Ev}}}, |
359 |
{"pop", {{Ev}}}, |
360 |
/* 90 */ |
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{"nop"}, /* same as xchg (e)ax, (e)ax */ |
362 |
{"xchg", {{__ax}, {__cx}}}, |
363 |
{"xchg", {{__ax}, {__dx}}}, |
364 |
{"xchg", {{__ax}, {__bx}}}, |
365 |
{"xchg", {{__ax}, {__sp}}}, |
366 |
{"xchg", {{__ax}, {__bp}}}, |
367 |
{"xchg", {{__ax}, {__si}}}, |
368 |
{"xchg", {{__ax}, {__di}}}, |
369 |
/* 98 */ |
370 |
{"cbw"}, |
371 |
{"cwd"}, |
372 |
{"call", {{Ap}}}, |
373 |
{"fwait"}, |
374 |
{"pushf%c"}, |
375 |
{"popf%c"}, |
376 |
{"sahf"}, |
377 |
{"lahf"}, |
378 |
/* A0 */ |
379 |
{"mov", {{__al}, {Ob}}}, |
380 |
{"mov", {{__ax}, {Ov}}}, |
381 |
{"mov", {{Ob}, {__al}}}, |
382 |
{"mov", {{Ov}, {__ax}}}, |
383 |
{"movsb"}, |
384 |
{"movs%c"}, |
385 |
{"cmpsb"}, |
386 |
{"cmps%c"}, |
387 |
/* A8 */ |
388 |
{"test", {{__al}, {Ib}}}, |
389 |
{"test", {{__ax}, {Iv}}}, |
390 |
{"stosb"}, |
391 |
{"stos%c"}, |
392 |
{"lodsb"}, |
393 |
{"lods%c"}, |
394 |
{"scasb"}, |
395 |
{"scas%c"}, |
396 |
/* B0 */ |
397 |
{"mov", {{__al}, {Ib}}}, |
398 |
{"mov", {{__cl}, {Ib}}}, |
399 |
{"mov", {{__dl}, {Ib}}}, |
400 |
{"mov", {{__bl}, {Ib}}}, |
401 |
{"mov", {{__ah}, {Ib}}}, |
402 |
{"mov", {{__ch}, {Ib}}}, |
403 |
{"mov", {{__dh}, {Ib}}}, |
404 |
{"mov", {{__bh}, {Ib}}}, |
405 |
/* B8 */ |
406 |
{"mov", {{__ax}, {Iv}}}, |
407 |
{"mov", {{__cx}, {Iv}}}, |
408 |
{"mov", {{__dx}, {Iv}}}, |
409 |
{"mov", {{__bx}, {Iv}}}, |
410 |
{"mov", {{__sp}, {Iv}}}, |
411 |
{"mov", {{__bp}, {Iv}}}, |
412 |
{"mov", {{__si}, {Iv}}}, |
413 |
{"mov", {{__di}, {Iv}}}, |
414 |
/* C0 */ |
415 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_C0}}}, |
416 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_C1}}}, |
417 |
{"ret", {{Iw}}}, |
418 |
{"ret"}, |
419 |
{"les", {{Gv}, {Mp}}}, |
420 |
{"lds", {{Gv}, {Mp}}}, |
421 |
{"mov", {{Eb}, {Ib}}}, |
422 |
{"mov", {{Ev}, {Iv}}}, |
423 |
/* C8 */ |
424 |
{"enter", {{Iw}, {Ib}}}, |
425 |
{"leave"}, |
426 |
{"retf", {{Iw}}}, |
427 |
{"retf"}, |
428 |
{"int", {{__3}}}, |
429 |
{"int", {{Ib}}}, |
430 |
{"into"}, |
431 |
{"iret%c"}, |
432 |
/* D0 */ |
433 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_D0}}}, |
434 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_D1}}}, |
435 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_D2}}}, |
436 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_D3}}}, |
437 |
{"aam", {{Ib}}}, |
438 |
{"aad", {{Ib}}}, |
439 |
{"setalc"}, |
440 |
{"xlat"}, |
441 |
/* D8 */ |
442 |
{0, {{SPECIAL_TYPE_FGROUP, 0}}}, |
443 |
{0, {{SPECIAL_TYPE_FGROUP, 1}}}, |
444 |
{0, {{SPECIAL_TYPE_FGROUP, 2}}}, |
445 |
{0, {{SPECIAL_TYPE_FGROUP, 3}}}, |
446 |
{0, {{SPECIAL_TYPE_FGROUP, 4}}}, |
447 |
{0, {{SPECIAL_TYPE_FGROUP, 5}}}, |
448 |
{0, {{SPECIAL_TYPE_FGROUP, 6}}}, |
449 |
{0, {{SPECIAL_TYPE_FGROUP, 7}}}, |
450 |
/* E0 */ |
451 |
{"loopnz", {{Jb}}}, |
452 |
{"loopz", {{Jb}}}, |
453 |
{"loop", {{Jb}}}, |
454 |
{"jcxz", {{Jb}}}, |
455 |
{"in", {{__al}, {Ib}}}, |
456 |
{"in", {{__ax}, {Ib}}}, |
457 |
{"out", {{Ib}, {__al}}}, |
458 |
{"out", {{Ib}, {__ax}}}, |
459 |
/* E8 */ |
460 |
{"call", {{Jv}}}, |
461 |
{"jmp", {{Jv}}}, |
462 |
{"jmp", {{Ap}}}, |
463 |
{"jmp", {{Jb}}}, |
464 |
{"in", {{__al}, {__dxw}}}, |
465 |
{"in", {{__ax}, {__dxw}}}, |
466 |
{"out", {{__dxw}, {__al}}}, |
467 |
{"out", {{__dxw}, {__ax}}}, |
468 |
/* F0 */ |
469 |
{0, {{SPECIAL_TYPE_PREFIX}}}, /* lock-prefix */ |
470 |
{"smi"}, |
471 |
{0, {{SPECIAL_TYPE_PREFIX}}}, /* repnz-prefix */ |
472 |
{0, {{SPECIAL_TYPE_PREFIX}}}, /* rep-prefix */ |
473 |
{"hlt"}, |
474 |
{"cmc"}, |
475 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_F6}}}, |
476 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_F7}}}, |
477 |
/* F8 */ |
478 |
{"clc"}, |
479 |
{"stc"}, |
480 |
{"cli"}, |
481 |
{"sti"}, |
482 |
{"cld"}, |
483 |
{"std"}, |
484 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_FE}}}, |
485 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_FF}}}, |
486 |
}; |
487 |
|
488 |
x86opc_insn x86_insns_ext[256] = { |
489 |
/* 00 */ |
490 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_EXT_00}}}, |
491 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_EXT_01}}}, |
492 |
{"lar", {{Gv}, {Ew}}}, |
493 |
{"lsl", {{Gv}, {Ew}}}, |
494 |
{0}, |
495 |
{0}, |
496 |
{"clts"}, |
497 |
{0}, |
498 |
/* 08 */ |
499 |
{"invd"}, |
500 |
{"wbinvd"}, |
501 |
{0}, |
502 |
{"ud2"}, |
503 |
{0}, |
504 |
{"prefetch", {{Eb}}}, |
505 |
{"femms"}, |
506 |
{0, {{SPECIAL_TYPE_PREFIX}}}, |
507 |
/* 10 */ |
508 |
{0}, |
509 |
{0}, |
510 |
{0}, |
511 |
{0}, |
512 |
{0}, |
513 |
{0}, |
514 |
{0}, |
515 |
{0}, |
516 |
/* 18 */ |
517 |
{0}, |
518 |
{0}, |
519 |
{0}, |
520 |
{0}, |
521 |
{0}, |
522 |
{0}, |
523 |
{0}, |
524 |
{0}, |
525 |
/* 20 */ |
526 |
{"mov", {{Rd}, {Cd}}}, |
527 |
{"mov", {{Rd}, {Dd}}}, |
528 |
{"mov", {{Cd}, {Rd}}}, |
529 |
{"mov", {{Dd}, {Rd}}}, |
530 |
{"mov", {{Rd}, {Td}}}, |
531 |
{0}, |
532 |
{"mov", {{Td}, {Rd}}}, |
533 |
{0}, |
534 |
/* 28 */ |
535 |
{0}, |
536 |
{0}, |
537 |
{0}, |
538 |
{0}, |
539 |
{0}, |
540 |
{0}, |
541 |
{0}, |
542 |
{0}, |
543 |
/* 30 */ |
544 |
{"wrmsr"}, |
545 |
{"rdtsc"}, |
546 |
{"rdmsr"}, |
547 |
{"rdpmc"}, |
548 |
{"sysenter"}, |
549 |
{"sysexit"}, |
550 |
{0}, |
551 |
{0}, |
552 |
/* 38 */ |
553 |
{0}, |
554 |
{0}, |
555 |
{0}, |
556 |
{0}, |
557 |
{0}, |
558 |
{0}, |
559 |
{0}, |
560 |
{0}, |
561 |
/* 40 */ |
562 |
{"cmovo", {{Gv}, {Ev}}}, |
563 |
{"cmovno", {{Gv}, {Ev}}}, |
564 |
{"cmovc", {{Gv}, {Ev}}}, |
565 |
{"cmovnc", {{Gv}, {Ev}}}, |
566 |
{"cmovz", {{Gv}, {Ev}}}, |
567 |
{"cmovnz", {{Gv}, {Ev}}}, |
568 |
{"cmova", {{Gv}, {Ev}}}, |
569 |
{"cmovna", {{Gv}, {Ev}}}, |
570 |
/* 48 */ |
571 |
{"cmovs", {{Gv}, {Ev}}}, |
572 |
{"cmovns", {{Gv}, {Ev}}}, |
573 |
{"cmovp", {{Gv}, {Ev}}}, |
574 |
{"cmovnp", {{Gv}, {Ev}}}, |
575 |
{"cmovl", {{Gv}, {Ev}}}, |
576 |
{"cmovnl", {{Gv}, {Ev}}}, |
577 |
{"cmovng", {{Gv}, {Ev}}}, |
578 |
{"cmovg", {{Gv}, {Ev}}}, |
579 |
/* 50 */ |
580 |
{0}, |
581 |
{0}, |
582 |
{0}, |
583 |
{0}, |
584 |
{0}, |
585 |
{0}, |
586 |
{0}, |
587 |
{0}, |
588 |
/* 58 */ |
589 |
{0}, |
590 |
{0}, |
591 |
{0}, |
592 |
{0}, |
593 |
{0}, |
594 |
{0}, |
595 |
{0}, |
596 |
{0}, |
597 |
/* 60 */ |
598 |
{"punpcklbw", {{Pq}, {Qd}}}, |
599 |
{"punpcklwd", {{Pq}, {Qd}}}, |
600 |
{"punpckldq", {{Pq}, {Qd}}}, |
601 |
{"packsswb", {{Pq}, {Qd}}}, |
602 |
{"pcmpgtb", {{Pq}, {Qd}}}, |
603 |
{"pcmpgtw", {{Pq}, {Qd}}}, |
604 |
{"pcmpgtd", {{Pq}, {Qd}}}, |
605 |
{"packuswb", {{Pq}, {Qd}}}, |
606 |
/* 68 */ |
607 |
{"punpckhbw", {{Pq}, {Qd}}}, |
608 |
{"punpckhwd", {{Pq}, {Qd}}}, |
609 |
{"punpckhdq", {{Pq}, {Qd}}}, |
610 |
{"packssdw", {{Pq}, {Qd}}}, |
611 |
{0}, |
612 |
{0}, |
613 |
{"movd", {{Pd}, {Ed}}}, |
614 |
{"movq", {{Pq}, {Qq}}}, |
615 |
/* 70 */ |
616 |
{0}, |
617 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_EXT_71}}}, |
618 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_EXT_72}}}, |
619 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_EXT_73}}}, |
620 |
{"pcmpeqb", {{Pq}, {Qq}}}, |
621 |
{"pcmpeqw", {{Pq}, {Qq}}}, |
622 |
{"pcmpewd", {{Pq}, {Qq}}}, |
623 |
{"emms"}, |
624 |
/* 78 */ |
625 |
{0}, |
626 |
{0}, |
627 |
{0}, |
628 |
{0}, |
629 |
{0}, |
630 |
{0}, |
631 |
{"movd", {{Ed}, {Pd}}}, |
632 |
{"movq", {{Qq}, {Pq}}}, |
633 |
/* 80 */ |
634 |
{"jo", {{Jv}}}, |
635 |
{"jno", {{Jv}}}, |
636 |
{"jc", {{Jv}}}, |
637 |
{"jnc", {{Jv}}}, |
638 |
{"jz", {{Jv}}}, |
639 |
{"jnz", {{Jv}}}, |
640 |
{"jna", {{Jv}}}, |
641 |
{"ja", {{Jv}}}, |
642 |
/* 88 */ |
643 |
{"js", {{Jv}}}, |
644 |
{"jns", {{Jv}}}, |
645 |
{"jpe", {{Jv}}}, |
646 |
{"jpo", {{Jv}}}, |
647 |
{"jl", {{Jv}}}, |
648 |
{"jnl", {{Jv}}}, |
649 |
{"jng", {{Jv}}}, |
650 |
{"jg", {{Jv}}}, |
651 |
/* 90 */ |
652 |
{"seto", {{Eb}}}, |
653 |
{"setno", {{Eb}}}, |
654 |
{"setc", {{Eb}}}, |
655 |
{"setnc", {{Eb}}}, |
656 |
{"setz", {{Eb}}}, |
657 |
{"setnz", {{Eb}}}, |
658 |
{"setna", {{Eb}}}, |
659 |
{"seta", {{Eb}}}, |
660 |
/* 98 */ |
661 |
{"sets", {{Eb}}}, |
662 |
{"setns", {{Eb}}}, |
663 |
{"setpe", {{Eb}}}, |
664 |
{"setpo", {{Eb}}}, |
665 |
{"setl", {{Eb}}}, |
666 |
{"setnl", {{Eb}}}, |
667 |
{"setng", {{Eb}}}, |
668 |
{"setg", {{Eb}}}, |
669 |
/* A0 */ |
670 |
{"push", {{__fs}}}, |
671 |
{"pop", {{__fs}}}, |
672 |
{"cpuid"}, |
673 |
{"bt", {{Ev}, {Gv}}}, |
674 |
{"shld", {{Ev}, {Gv}, {Ib}}}, |
675 |
{"shld", {{Ev}, {Gv}, {__cl}}}, |
676 |
{0}, |
677 |
{0}, |
678 |
/* A8 */ |
679 |
{"push", {{__gs}}}, |
680 |
{"pop", {{__gs}}}, |
681 |
{"rsm"}, |
682 |
{"bts", {{Ev}, {Gv}}}, |
683 |
{"shrd", {{Ev}, {Gv}, {Ib}}}, |
684 |
{"shrd", {{Ev}, {Gv}, {__cl}}}, |
685 |
{0}, |
686 |
{"imul", {{Gv}, {Ev}}}, |
687 |
/* B0 */ |
688 |
{"cmpxchg", {{Eb}, {Gb}}}, |
689 |
{"cmpxchg", {{Ev}, {Gv}}}, |
690 |
{"lss", {{Gv}, {Mp}}}, |
691 |
{"btr", {{Ev}, {Gv}}}, |
692 |
{"lfs", {{Gv}, {Mp}}}, |
693 |
{"lgs", {{Gv}, {Mp}}}, |
694 |
{"movzx", {{Gv}, {Eb}}}, |
695 |
{"movzx", {{Gv}, {Ew}}}, |
696 |
/* B8 */ |
697 |
{0}, |
698 |
{"ud2"}, |
699 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_EXT_BA}}}, |
700 |
{"btc", {{Ev}, {Gv}}}, |
701 |
{"bsf", {{Gv}, {Ev}}}, |
702 |
{"bsr", {{Gv}, {Ev}}}, |
703 |
{"movsx", {{Gv}, {Eb}}}, |
704 |
{"movsx", {{Gv}, {Ew}}}, |
705 |
/* C0 */ |
706 |
{"xadd", {{Eb}, {Gb}}}, |
707 |
{"xadd", {{Ev}, {Gv}}}, |
708 |
{0}, |
709 |
{0}, |
710 |
{0}, |
711 |
{0}, |
712 |
{0}, |
713 |
{0, {{SPECIAL_TYPE_GROUP, GROUP_EXT_C7}}}, |
714 |
/* C8 */ |
715 |
{"bswap", {{__axd}}}, |
716 |
{"bswap", {{__cxd}}}, |
717 |
{"bswap", {{__dxd}}}, |
718 |
{"bswap", {{__bxd}}}, |
719 |
{"bswap", {{__spd}}}, |
720 |
{"bswap", {{__bpd}}}, |
721 |
{"bswap", {{__sid}}}, |
722 |
{"bswap", {{__did}}}, |
723 |
/* D0 */ |
724 |
{0}, |
725 |
{"psrlw", {{Pq}, {Qq}}}, |
726 |
{"psrld", {{Pq}, {Qq}}}, |
727 |
{"psrlq", {{Pq}, {Qq}}}, |
728 |
{0}, |
729 |
{"pmullw", {{Pq}, {Qq}}}, |
730 |
{0}, |
731 |
{0}, |
732 |
/* D8 */ |
733 |
{"psubusb", {{Pq}, {Qq}}}, |
734 |
{"psubusw", {{Pq}, {Qq}}}, |
735 |
{0}, |
736 |
{"pand", {{Pq}, {Qq}}}, |
737 |
{"paddusb", {{Pq}, {Qq}}}, |
738 |
{"paddusw", {{Pq}, {Qq}}}, |
739 |
{0}, |
740 |
{"pandn", {{Pq}, {Qq}}}, |
741 |
/* E0 */ |
742 |
{0}, |
743 |
{"psraw", {{Pq}, {Qq}}}, |
744 |
{"psrad", {{Pq}, {Qq}}}, |
745 |
{0}, |
746 |
{0}, |
747 |
{"pmulhw", {{Pq}, {Qq}}}, |
748 |
{0}, |
749 |
{0}, |
750 |
/* E8 */ |
751 |
{"psubsb", {{Pq}, {Qq}}}, |
752 |
{"psubsw", {{Pq}, {Qq}}}, |
753 |
{0}, |
754 |
{"por", {{Pq}, {Qq}}}, |
755 |
{"paddsb", {{Pq}, {Qq}}}, |
756 |
{"paddsw", {{Pq}, {Qq}}}, |
757 |
{0}, |
758 |
{"pxor", {{Pq}, {Qq}}}, |
759 |
/* F0 */ |
760 |
{0}, |
761 |
{"psllw", {{Pq}, {Qq}}}, |
762 |
{"pslld", {{Pq}, {Qq}}}, |
763 |
{"psllq", {{Pq}, {Qq}}}, |
764 |
{0}, |
765 |
{"pmuladdwd", {{Pq}, {Qq}}}, |
766 |
{0}, |
767 |
{0}, |
768 |
/* F8 */ |
769 |
{"psubb", {{Pq}, {Qq}}}, |
770 |
{"psubw", {{Pq}, {Qq}}}, |
771 |
{"psubq", {{Pq}, {Qq}}}, |
772 |
{0}, |
773 |
{"paddb", {{Pq}, {Qq}}}, |
774 |
{"paddw", {{Pq}, {Qq}}}, |
775 |
{"paddq", {{Pq}, {Qq}}}, |
776 |
{0} |
777 |
}; |
778 |
|
779 |
x86opc_insn x86_group_insns[X86_GROUPS][8] = { |
780 |
/* 0 - GROUP_80 */ |
781 |
{ |
782 |
{"add", {{Eb}, {Ib}}}, |
783 |
{"or", {{Eb}, {Ib}}}, |
784 |
{"adc", {{Eb}, {Ib}}}, |
785 |
{"sbb", {{Eb}, {Ib}}}, |
786 |
{"and", {{Eb}, {Ib}}}, |
787 |
{"sub", {{Eb}, {Ib}}}, |
788 |
{"xor", {{Eb}, {Ib}}}, |
789 |
{"cmp", {{Eb}, {Ib}}} |
790 |
}, |
791 |
/* 1 - GROUP_81 */ |
792 |
{ |
793 |
{"add", {{Ev}, {Iv}}}, |
794 |
{"or", {{Ev}, {Iv}}}, |
795 |
{"adc", {{Ev}, {Iv}}}, |
796 |
{"sbb", {{Ev}, {Iv}}}, |
797 |
{"and", {{Ev}, {Iv}}}, |
798 |
{"sub", {{Ev}, {Iv}}}, |
799 |
{"xor", {{Ev}, {Iv}}}, |
800 |
{"cmp", {{Ev}, {Iv}}} |
801 |
}, |
802 |
/* 2 - GROUP_83 */ |
803 |
{ |
804 |
{"add", {{Ev}, {sIbv}}}, |
805 |
{"or", {{Ev}, {sIbv}}}, |
806 |
{"adc", {{Ev}, {sIbv}}}, |
807 |
{"sbb", {{Ev}, {sIbv}}}, |
808 |
{"and", {{Ev}, {sIbv}}}, |
809 |
{"sub", {{Ev}, {sIbv}}}, |
810 |
{"xor", {{Ev}, {sIbv}}}, |
811 |
{"cmp", {{Ev}, {sIbv}}} |
812 |
}, |
813 |
/* 3 - GROUP_C0 */ |
814 |
{ |
815 |
{"rol", {{Eb}, {Ib}}}, |
816 |
{"ror", {{Eb}, {Ib}}}, |
817 |
{"rcl", {{Eb}, {Ib}}}, |
818 |
{"rcr", {{Eb}, {Ib}}}, |
819 |
{"shl", {{Eb}, {Ib}}}, |
820 |
{"shr", {{Eb}, {Ib}}}, |
821 |
{"sal", {{Eb}, {Ib}}}, |
822 |
{"sar", {{Eb}, {Ib}}} |
823 |
}, |
824 |
/* 4 - GROUP_C1 */ |
825 |
{ |
826 |
{"rol", {{Ev}, {Ib}}}, |
827 |
{"ror", {{Ev}, {Ib}}}, |
828 |
{"rcl", {{Ev}, {Ib}}}, |
829 |
{"rcr", {{Ev}, {Ib}}}, |
830 |
{"shl", {{Ev}, {Ib}}}, |
831 |
{"shr", {{Ev}, {Ib}}}, |
832 |
{"sal", {{Ev}, {Ib}}}, |
833 |
{"sar", {{Ev}, {Ib}}} |
834 |
}, |
835 |
/* 5 - GROUP_D0 */ |
836 |
{ |
837 |
{"rol", {{Eb}, {__1}}}, |
838 |
{"ror", {{Eb}, {__1}}}, |
839 |
{"rcl", {{Eb}, {__1}}}, |
840 |
{"rcr", {{Eb}, {__1}}}, |
841 |
{"shl", {{Eb}, {__1}}}, |
842 |
{"shr", {{Eb}, {__1}}}, |
843 |
{"sal", {{Eb}, {__1}}}, |
844 |
{"sar", {{Eb}, {__1}}} |
845 |
}, |
846 |
/* 6 - GROUP_D1 */ |
847 |
{ |
848 |
{"rol", {{Ev}, {__1}}}, |
849 |
{"ror", {{Ev}, {__1}}}, |
850 |
{"rcl", {{Ev}, {__1}}}, |
851 |
{"rcr", {{Ev}, {__1}}}, |
852 |
{"shl", {{Ev}, {__1}}}, |
853 |
{"shr", {{Ev}, {__1}}}, |
854 |
{"sal", {{Ev}, {__1}}}, |
855 |
{"sar", {{Ev}, {__1}}} |
856 |
}, |
857 |
/* 7 - GROUP_D2 */ |
858 |
{ |
859 |
{"rol", {{Eb}, {__cl}}}, |
860 |
{"ror", {{Eb}, {__cl}}}, |
861 |
{"rcl", {{Eb}, {__cl}}}, |
862 |
{"rcr", {{Eb}, {__cl}}}, |
863 |
{"shl", {{Eb}, {__cl}}}, |
864 |
{"shr", {{Eb}, {__cl}}}, |
865 |
{"sal", {{Eb}, {__cl}}}, |
866 |
{"sar", {{Eb}, {__cl}}} |
867 |
}, |
868 |
/* 8 - GROUP_D3 */ |
869 |
{ |
870 |
{"rol", {{Ev}, {__cl}}}, |
871 |
{"ror", {{Ev}, {__cl}}}, |
872 |
{"rcl", {{Ev}, {__cl}}}, |
873 |
{"rcr", {{Ev}, {__cl}}}, |
874 |
{"shl", {{Ev}, {__cl}}}, |
875 |
{"shr", {{Ev}, {__cl}}}, |
876 |
{"sal", {{Ev}, {__cl}}}, |
877 |
{"sar", {{Ev}, {__cl}}} |
878 |
}, |
879 |
/* 9 - GROUP_F6 */ |
880 |
{ |
881 |
{"test", {{Eb}, {Ib}}}, |
882 |
//{"test", {{Eb}, {Ib}}}, unsure... |
883 |
{0}, |
884 |
{"not", {{Eb}}}, |
885 |
{"neg", {{Eb}}}, |
886 |
{"mul", {{__al}, {Eb}}}, |
887 |
{"imul", {{__al}, {Eb}}}, |
888 |
{"div", {{__al}, {Eb}}}, |
889 |
{"idiv", {{__al}, {Eb}}} |
890 |
}, |
891 |
/* 10 - GROUP_F7 */ |
892 |
{ |
893 |
{"test", {{Ev}, {Iv}}}, |
894 |
{"test", {{Ev}, {Iv}}}, |
895 |
{"not", {{Ev}}}, |
896 |
{"neg", {{Ev}}}, |
897 |
{"mul", {{__ax}, {Ev}}}, |
898 |
{"imul", {{__ax}, {Ev}}}, |
899 |
{"div", {{__ax}, {Ev}}}, |
900 |
{"idiv", {{__ax}, {Ev}}} |
901 |
}, |
902 |
/* 11 - GROUP_FE */ |
903 |
{ |
904 |
{"inc", {{Eb}}}, |
905 |
{"dec", {{Eb}}}, |
906 |
{0}, |
907 |
{0}, |
908 |
{0}, |
909 |
{0}, |
910 |
{0}, |
911 |
{0} |
912 |
}, |
913 |
/* 12 - GROUP_FF */ |
914 |
{ |
915 |
{"inc", {{Ev}}}, |
916 |
{"dec", {{Ev}}}, |
917 |
{"call", {{Ev}}}, |
918 |
{"call", {{Mp}}}, |
919 |
{"jmp", {{Ev}}}, |
920 |
{"jmp", {{Mp}}}, |
921 |
{"push", {{Ev}}}, |
922 |
{0} |
923 |
}, |
924 |
/* 13 - GROUP_EXT_00 */ |
925 |
{ |
926 |
{"sldt", {{Ew}}}, |
927 |
{"str", {{Ew}}}, |
928 |
{"lldt", {{Ew}}}, |
929 |
{"ltr", {{Ew}}}, |
930 |
{"verr", {{Ew}}}, |
931 |
{"verw", {{Ew}}}, |
932 |
{0}, |
933 |
{0} |
934 |
}, |
935 |
/* 14 - GROUP_EXT_01 */ |
936 |
{ |
937 |
{"sgdt", {{M}}}, |
938 |
{"sidt", {{M}}}, |
939 |
{"lgdt", {{M}}}, |
940 |
{"lidt", {{M}}}, |
941 |
{"smsw", {{Ew}}}, |
942 |
{0}, |
943 |
{"lmsw", {{Ew}}}, |
944 |
{0} |
945 |
}, |
946 |
/* 15 - GROUP_EXT_71 */ |
947 |
{ |
948 |
{0}, |
949 |
{0}, |
950 |
{"psrlw", {{Pq}, {Ib}}}, |
951 |
{0}, |
952 |
{"psraw", {{Pq}, {Ib}}}, |
953 |
{0}, |
954 |
{"psslw", {{Pq}, {Ib}}}, |
955 |
{0} |
956 |
}, |
957 |
/* 16 - GROUP_EXT_72 */ |
958 |
{ |
959 |
{0}, |
960 |
{0}, |
961 |
{"psrld", {{Pq}, {Ib}}}, |
962 |
{0}, |
963 |
{"psrad", {{Pq}, {Ib}}}, |
964 |
{0}, |
965 |
{"pssld", {{Pq}, {Ib}}}, |
966 |
{0} |
967 |
}, |
968 |
/* 17 - GROUP_EXT_73 */ |
969 |
{ |
970 |
{0}, |
971 |
{0}, |
972 |
{"psrlq", {{Pq}, {Ib}}}, |
973 |
{0}, |
974 |
{"psraq", {{Pq}, {Ib}}}, |
975 |
{0}, |
976 |
{"psslq", {{Pq}, {Ib}}}, |
977 |
{0} |
978 |
}, |
979 |
/* 18 - GROUP_EXT_BA */ |
980 |
{ |
981 |
{0}, |
982 |
{0}, |
983 |
{0}, |
984 |
{0}, |
985 |
{"bt", {{Ev}, {Ib}}}, |
986 |
{"bts", {{Ev}, {Ib}}}, |
987 |
{"btr", {{Ev}, {Ib}}}, |
988 |
{"btc", {{Ev}, {Ib}}} |
989 |
}, |
990 |
/* 19 - GROUP_EXT_C7 */ |
991 |
{ |
992 |
{0}, |
993 |
{"cmpxchg8b", {{Eq}}}, |
994 |
{0}, |
995 |
{0}, |
996 |
{0}, |
997 |
{0}, |
998 |
{0}, |
999 |
{0} |
1000 |
} |
1001 |
/* |
1002 |
, |
1003 |
/ * 20 - GROUP_EXT_AE * / |
1004 |
{ |
1005 |
{"fxsave", {{Eb}}}, |
1006 |
{"fxrstor", {{Eb}}}, |
1007 |
{"ldmxcsr", {{Md}}}, |
1008 |
{"stmxcsr", {{Md}}}, |
1009 |
{0}, |
1010 |
{0}, |
1011 |
{0}, |
1012 |
{"sfence"} |
1013 |
}*/ |
1014 |
|
1015 |
}; |
1016 |
|
1017 |
/* |
1018 |
* The ModR/M byte is < 0xC0 |
1019 |
*/ |
1020 |
|
1021 |
x86opc_insn x86_modfloat_group_insns[8][8] = { |
1022 |
/* prefix D8 */ |
1023 |
{ |
1024 |
{"fadd", {{Ms}}}, |
1025 |
{"fmul", {{Ms}}}, |
1026 |
{"fcom", {{Ms}}}, |
1027 |
{"fcomp", {{Ms}}}, |
1028 |
{"fsub", {{Ms}}}, |
1029 |
{"fsubr", {{Ms}}}, |
1030 |
{"fdiv", {{Ms}}}, |
1031 |
{"fdivr", {{Ms}}} |
1032 |
}, |
1033 |
/* prefix D9 */ |
1034 |
{ |
1035 |
{"fld", {{Ms}}}, |
1036 |
{0}, |
1037 |
{"fst", {{Ms}}}, |
1038 |
{"fstp", {{Ms}}}, |
1039 |
{"fldenv", {{M}}}, |
1040 |
{"fldcw", {{Mw}}}, |
1041 |
{"fstenv", {{M}}}, |
1042 |
{"fstcw", {{Mw}}} |
1043 |
}, |
1044 |
/* prefix DA */ |
1045 |
{ |
1046 |
{"fiadd", {{Md}}}, |
1047 |
{"fimul", {{Md}}}, |
1048 |
{"ficom", {{Md}}}, |
1049 |
{"ficomp", {{Md}}}, |
1050 |
{"fisub", {{Md}}}, |
1051 |
{"fisubr", {{Md}}}, |
1052 |
{"fidiv", {{Md}}}, |
1053 |
{"fidivr", {{Md}}} |
1054 |
}, |
1055 |
/* prefix DB */ |
1056 |
{ |
1057 |
{"fild", {{Md}}}, |
1058 |
{"fisttp", {{Md}}}, |
1059 |
{"fist", {{Md}}}, |
1060 |
{"fistp", {{Md}}}, |
1061 |
{0}, |
1062 |
{"fld", {{Mt}}}, |
1063 |
{0}, |
1064 |
{"fstp", {{Mt}}} |
1065 |
}, |
1066 |
/* prefix DC */ |
1067 |
{ |
1068 |
{"fadd", {{Ml}}}, |
1069 |
{"fmul", {{Ml}}}, |
1070 |
{"fcom", {{Ml}}}, |
1071 |
{"fcomp", {{Ml}}}, |
1072 |
{"fsub", {{Ml}}}, |
1073 |
{"fsubr", {{Ml}}}, |
1074 |
{"fdiv", {{Ml}}}, |
1075 |
{"fdivr", {{Ml}}} |
1076 |
}, |
1077 |
/* prefix DD */ |
1078 |
{ |
1079 |
{"fld", {{Ml}}}, |
1080 |
{0}, |
1081 |
{"fst", {{Ml}}}, |
1082 |
{"fstp", {{Ml}}}, |
1083 |
{"frstor", {{M}}}, |
1084 |
{0}, |
1085 |
{"fsave", {{M}}}, |
1086 |
{"fstsw", {{Mw}}} |
1087 |
}, |
1088 |
/* prefix DE */ |
1089 |
{ |
1090 |
{"fiadd", {{Mw}}}, |
1091 |
{"fimul", {{Mw}}}, |
1092 |
{"ficom", {{Mw}}}, |
1093 |
{"ficomp", {{Mw}}}, |
1094 |
{"fisub", {{Mw}}}, |
1095 |
{"fisubr", {{Mw}}}, |
1096 |
{"fidiv", {{Mw}}}, |
1097 |
{"fidivr", {{Mw}}} |
1098 |
}, |
1099 |
/* prefix DF */ |
1100 |
{ |
1101 |
{"fild", {{Mw}}}, |
1102 |
{0}, |
1103 |
{"fist", {{Mw}}}, |
1104 |
{"fistp", {{Mw}}}, |
1105 |
{"fbld", {{Ma}}}, |
1106 |
{"fild", {{Mq}}}, |
1107 |
{"fbstp", {{Ma}}}, |
1108 |
{"fistp", {{Mq}}} |
1109 |
} |
1110 |
|
1111 |
}; |
1112 |
|
1113 |
x86opc_insn fgroup_12[8] = { |
1114 |
{"fnop"}, |
1115 |
{0}, |
1116 |
{0}, |
1117 |
{0}, |
1118 |
{0}, |
1119 |
{0}, |
1120 |
{0}, |
1121 |
{0} |
1122 |
}; |
1123 |
|
1124 |
x86opc_insn fgroup_14[8] = { |
1125 |
{"fchs"}, |
1126 |
{"fabs"}, |
1127 |
{0}, |
1128 |
{0}, |
1129 |
{"ftst"}, |
1130 |
{"fxam"}, |
1131 |
{0}, |
1132 |
{0} |
1133 |
}; |
1134 |
|
1135 |
x86opc_insn fgroup_15[8] = { |
1136 |
{"fld1"}, |
1137 |
{"fldl2t"}, |
1138 |
{"fldl2e"}, |
1139 |
{"fldpi"}, |
1140 |
{"fldlg2"}, |
1141 |
{"fldln2"}, |
1142 |
{"fldz"}, |
1143 |
{0} |
1144 |
}; |
1145 |
|
1146 |
x86opc_insn fgroup_16[8] = { |
1147 |
{"f2xm1"}, |
1148 |
{"fyl2x"}, |
1149 |
{"fptan"}, |
1150 |
{"fpatan"}, |
1151 |
{"fxtract"}, |
1152 |
{"fprem1"}, |
1153 |
{"fdecstp"}, |
1154 |
{"fincstp"} |
1155 |
}; |
1156 |
|
1157 |
x86opc_insn fgroup_17[8] = { |
1158 |
{"fprem"}, |
1159 |
{"fyl2xp1"}, |
1160 |
{"fsqrt"}, |
1161 |
{"fsincos"}, |
1162 |
{"frndint"}, |
1163 |
{"fscale"}, |
1164 |
{"fsin"}, |
1165 |
{"fcos"} |
1166 |
}; |
1167 |
|
1168 |
x86opc_insn fgroup_25[8] = { |
1169 |
{0}, |
1170 |
{"fucompp"}, |
1171 |
{0}, |
1172 |
{0}, |
1173 |
{0}, |
1174 |
{0}, |
1175 |
{0}, |
1176 |
{0} |
1177 |
}; |
1178 |
|
1179 |
x86opc_insn fgroup_34[8] = { |
1180 |
{0}, |
1181 |
{0}, |
1182 |
{"fclex"}, |
1183 |
{"finit"}, |
1184 |
{0}, |
1185 |
{0}, |
1186 |
{0}, |
1187 |
{0} |
1188 |
}; |
1189 |
|
1190 |
x86opc_insn fgroup_63[8] = { |
1191 |
{0}, |
1192 |
{"fcompp"}, |
1193 |
{0}, |
1194 |
{0}, |
1195 |
{0}, |
1196 |
{0}, |
1197 |
{0}, |
1198 |
{0} |
1199 |
}; |
1200 |
|
1201 |
x86opc_insn fgroup_74[8] = { |
1202 |
{"fstsw", {{__axw}}}, |
1203 |
{0}, |
1204 |
{0}, |
1205 |
{0}, |
1206 |
{0}, |
1207 |
{0}, |
1208 |
{0}, |
1209 |
{0} |
1210 |
}; |
1211 |
|
1212 |
/* |
1213 |
* The ModR/M byte is >= 0xC0 |
1214 |
*/ |
1215 |
|
1216 |
x86opc_finsn x86_float_group_insns[8][8] = { |
1217 |
/* prefix D8 */ |
1218 |
{ |
1219 |
{0, {"fadd", {{__st}, {Ft}}}}, |
1220 |
{0, {"fmul", {{__st}, {Ft}}}}, |
1221 |
{0, {"fcom", {{__st}, {Ft}}}}, |
1222 |
{0, {"fcomp", {{__st}, {Ft}}}}, |
1223 |
{0, {"fsub", {{__st}, {Ft}}}}, |
1224 |
{0, {"fsubr", {{__st}, {Ft}}}}, |
1225 |
{0, {"fdiv", {{__st}, {Ft}}}}, |
1226 |
{0, {"fdivr", {{__st}, {Ft}}}} |
1227 |
}, |
1228 |
/* prefix D9 */ |
1229 |
{ |
1230 |
{0, {"fld", {{__st}, {Ft}}}}, |
1231 |
{0, {"fxch", {{__st}, {Ft}}}}, |
1232 |
{(x86opc_insn *)&fgroup_12}, |
1233 |
{0}, |
1234 |
{(x86opc_insn *)&fgroup_14}, |
1235 |
{(x86opc_insn *)&fgroup_15}, |
1236 |
{(x86opc_insn *)&fgroup_16}, |
1237 |
{(x86opc_insn *)&fgroup_17} |
1238 |
}, |
1239 |
/* prefix DA */ |
1240 |
{ |
1241 |
{0, {"fcmovb", {{__st}, {Ft}}}}, |
1242 |
{0, {"fcmove", {{__st}, {Ft}}}}, |
1243 |
{0, {"fcmovbe", {{__st}, {Ft}}}}, |
1244 |
{0, {"fcmovu", {{__st}, {Ft}}}}, |
1245 |
{0}, |
1246 |
{(x86opc_insn *)&fgroup_25}, |
1247 |
{0}, |
1248 |
{0} |
1249 |
}, |
1250 |
/* prefix DB */ |
1251 |
{ |
1252 |
{0, {"fcmovnb", {{__st}, {Ft}}}}, |
1253 |
{0, {"fcmovne", {{__st}, {Ft}}}}, |
1254 |
{0, {"fcmovnbe", {{__st}, {Ft}}}}, |
1255 |
{0, {"fcmovnu", {{__st}, {Ft}}}}, |
1256 |
{(x86opc_insn*)&fgroup_34}, |
1257 |
{0, {"fucomi", {{__st}, {Ft}}}}, |
1258 |
{0, {"fcomi", {{__st}, {Ft}}}}, |
1259 |
{0} |
1260 |
}, |
1261 |
/* prefix DC */ |
1262 |
{ |
1263 |
{0, {"fadd", {{Ft}, {__st}}}}, |
1264 |
{0, {"fmul", {{Ft}, {__st}}}}, |
1265 |
{0}, |
1266 |
{0}, |
1267 |
{0, {"fsubr", {{Ft}, {__st}}}}, |
1268 |
{0, {"fsub", {{Ft}, {__st}}}}, |
1269 |
{0, {"fdivr", {{Ft}, {__st}}}}, |
1270 |
{0, {"fdiv", {{Ft}, {__st}}}} |
1271 |
}, |
1272 |
/* prefix DD */ |
1273 |
{ |
1274 |
{0, {"ffree", {{Ft}}}}, |
1275 |
{0}, |
1276 |
{0, {"fst", {{Ft}}}}, |
1277 |
{0, {"fstp", {{Ft}}}}, |
1278 |
{0, {"fucom", {{Ft}, {__st}}}}, |
1279 |
{0, {"fucomp", {{Ft}}}}, |
1280 |
{0}, |
1281 |
{0} |
1282 |
}, |
1283 |
/* prefix DE */ |
1284 |
{ |
1285 |
{0, {"faddp", {{Ft}, {__st}}}}, |
1286 |
{0, {"fmulp", {{Ft}, {__st}}}}, |
1287 |
{0}, |
1288 |
{(x86opc_insn*)&fgroup_63}, |
1289 |
{0, {"fsubrp", {{Ft}, {__st}}}}, |
1290 |
{0, {"fsubp", {{Ft}, {__st}}}}, |
1291 |
{0, {"fdivrp", {{Ft}, {__st}}}}, |
1292 |
{0, {"fdivp", {{Ft}, {__st}}}} |
1293 |
}, |
1294 |
/* prefix DF */ |
1295 |
{ |
1296 |
{0, {"ffreep", {{Ft}}}}, |
1297 |
{0}, |
1298 |
{0}, |
1299 |
{0}, |
1300 |
{(x86opc_insn*)&fgroup_74}, |
1301 |
{0, {"fucomip", {{__st}, {Ft}}}}, |
1302 |
{0, {"fcomip", {{__st}, {Ft}}}}, |
1303 |
{0} |
1304 |
} |
1305 |
|
1306 |
}; |