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/* |
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* PearPC |
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* ppc_vec.h |
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* |
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* Copyright (C) 2004 Daniel Foesch (dfoesch@cs.nmsu.edu) |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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*/ |
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|
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#ifndef __PPC_VEC_H__ |
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#define __PPC_VEC_H__ |
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|
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#define PPC_OPC_VRc (1<<10) |
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|
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/* Rather than write each function to be endianless, we're writing these |
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* defines to do an endianless access to elements of the vector. |
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* |
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* These are for ADDRESSED vector elements. Usually, most vector operations |
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* can be performed in either direction without care, so most of the |
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* for-loops should not use these, as it will introduce unneeded code |
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* for little-endian systems. |
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*/ |
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#if HOST_ENDIANESS == HOST_ENDIANESS_LE |
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|
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#define VECT_B(reg, index) ((reg).b[15 - (index)]) |
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#define VECT_SB(reg, index) ((reg).sb[15 - (index)]) |
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#define VECT_H(reg, index) ((reg).h[7 - (index)]) |
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#define VECT_SH(reg, index) ((reg).sh[7 - (index)]) |
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#define VECT_W(reg, index) ((reg).w[3 - (index)]) |
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#define VECT_SW(reg, index) ((reg).sw[3 - (index)]) |
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#define VECT_D(reg, index) ((reg).d[1 - (index)]) |
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#define VECT_SD(reg, index) ((reg).sd[1 - (index)]) |
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|
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#define VECT_EVEN(index) (((index) << 1) + 1) |
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#define VECT_ODD(index) (((index) << 1) + 0) |
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|
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#define VECT_BUILD(x,y,z,w) w, z, y, x |
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|
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#elif HOST_ENDIANESS == HOST_ENDIANESS_BE |
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|
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#define VECT_B(reg, index) ((reg).b[(index)]) |
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#define VECT_SB(reg, index) ((reg).sb[(index)]) |
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#define VECT_H(reg, index) ((reg).h[(index)]) |
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#define VECT_SH(reg, index) ((reg).sh[(index)]) |
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#define VECT_W(reg, index) ((reg).w[(index)]) |
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#define VECT_SW(reg, index) ((reg).sw[(index)]) |
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#define VECT_D(reg, index) ((reg).d[(index)]) |
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#define VECT_SD(reg, index) ((reg).sd[(index)]) |
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|
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#define VECT_EVEN(index) (((index) << 1) + 0) |
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#define VECT_ODD(index) (((index) << 1) + 1) |
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|
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#define VECT_BUILD(x,y,z,w) x, y, z, w |
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#else |
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#error Endianess not supported! |
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#endif |
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|
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//#define VECTOR_DEBUG fprintf(stderr, "[PPC/VEC] %s\n", __FUNCTION__) |
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//#define VECTOR_DEBUG jitcAssertFlushedVectorRegisters() |
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#define VECTOR_DEBUG |
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|
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#define VECTOR_DEBUG_COMMON VECTOR_DEBUG |
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//#define VECTOR_DEBUG_COMMON |
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|
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/* Undefine this to turn of the MSR_VEC check for vector instructions. */ |
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//#define __VEC_EXC_OFF__ |
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|
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#include "system/types.h" |
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|
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#include "tools/snprintf.h" |
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|
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#include "jitc.h" |
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#include "jitc_asm.h" |
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#include "x86asm.h" |
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#include "ppc_exc.h" |
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|
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static UNUSED void ppc_opc_gen_check_vec() |
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{ |
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#ifndef __VEC_EXC_OFF__ |
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if (!gJITC.checkedVector) { |
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jitcFloatRegisterClobberAll(); |
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jitcFlushVectorRegister(); |
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jitcClobberCarryAndFlags(); |
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|
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NativeReg r1 = jitcGetClientRegister(PPC_MSR); |
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asmALU(X86_TEST, r1, MSR_VEC); |
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NativeAddress fixup = asmJxxFixup(X86_NZ); |
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|
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jitcFlushRegisterDirty(); |
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asmALU(X86_MOV, ESI, gJITC.pc); |
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asmJMP((NativeAddress)ppc_no_vec_exception_asm); |
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|
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asmResolveFixup(fixup); |
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gJITC.checkedVector = true; |
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} |
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#endif |
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} |
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|
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void ppc_opc_vperm(); |
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void ppc_opc_vsel(); |
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void ppc_opc_vsrb(); |
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void ppc_opc_vsrh(); |
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void ppc_opc_vsrw(); |
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void ppc_opc_vsrab(); |
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void ppc_opc_vsrah(); |
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void ppc_opc_vsraw(); |
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void ppc_opc_vsr(); |
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void ppc_opc_vsro(); |
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void ppc_opc_vslb(); |
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void ppc_opc_vslh(); |
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void ppc_opc_vslw(); |
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void ppc_opc_vsl(); |
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void ppc_opc_vslo(); |
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void ppc_opc_vsldoi(); |
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void ppc_opc_vrlb(); |
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void ppc_opc_vrlh(); |
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void ppc_opc_vrlw(); |
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void ppc_opc_vmrghb(); |
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void ppc_opc_vmrghh(); |
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void ppc_opc_vmrghw(); |
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void ppc_opc_vmrglb(); |
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void ppc_opc_vmrglh(); |
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void ppc_opc_vmrglw(); |
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void ppc_opc_vspltb(); |
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void ppc_opc_vsplth(); |
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void ppc_opc_vspltw(); |
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void ppc_opc_vspltisb(); |
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void ppc_opc_vspltish(); |
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void ppc_opc_vspltisw(); |
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void ppc_opc_mfvscr(); |
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void ppc_opc_mtvscr(); |
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void ppc_opc_vpkuhum(); |
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void ppc_opc_vpkuwum(); |
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void ppc_opc_vpkpx(); |
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void ppc_opc_vpkuhus(); |
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void ppc_opc_vpkshss(); |
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void ppc_opc_vpkuwus(); |
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void ppc_opc_vpkswss(); |
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void ppc_opc_vpkuhus(); |
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void ppc_opc_vpkshus(); |
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void ppc_opc_vpkuwus(); |
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void ppc_opc_vpkswus(); |
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void ppc_opc_vupkhsb(); |
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void ppc_opc_vupkhpx(); |
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void ppc_opc_vupkhsh(); |
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void ppc_opc_vupklsb(); |
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void ppc_opc_vupklpx(); |
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void ppc_opc_vupklsh(); |
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void ppc_opc_vaddubm(); |
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void ppc_opc_vadduhm(); |
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void ppc_opc_vadduwm(); |
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void ppc_opc_vaddfp(); |
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void ppc_opc_vaddcuw(); |
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void ppc_opc_vaddubs(); |
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void ppc_opc_vaddsbs(); |
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void ppc_opc_vadduhs(); |
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void ppc_opc_vaddshs(); |
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void ppc_opc_vadduws(); |
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void ppc_opc_vaddsws(); |
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void ppc_opc_vsububm(); |
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void ppc_opc_vsubuhm(); |
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void ppc_opc_vsubuwm(); |
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void ppc_opc_vsubfp(); |
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void ppc_opc_vsubcuw(); |
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void ppc_opc_vsububs(); |
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void ppc_opc_vsubsbs(); |
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void ppc_opc_vsubuhs(); |
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void ppc_opc_vsubshs(); |
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void ppc_opc_vsubuws(); |
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void ppc_opc_vsubsws(); |
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void ppc_opc_vmuleub(); |
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void ppc_opc_vmulesb(); |
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void ppc_opc_vmuleuh(); |
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void ppc_opc_vmulesh(); |
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void ppc_opc_vmuloub(); |
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void ppc_opc_vmulosb(); |
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void ppc_opc_vmulouh(); |
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void ppc_opc_vmulosh(); |
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void ppc_opc_vmaddfp(); |
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void ppc_opc_vmhaddshs(); |
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void ppc_opc_vmladduhm(); |
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void ppc_opc_vmhraddshs(); |
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void ppc_opc_vmsumubm(); |
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void ppc_opc_vmsumuhm(); |
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void ppc_opc_vmsummbm(); |
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void ppc_opc_vmsumshm(); |
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void ppc_opc_vmsumuhs(); |
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void ppc_opc_vmsumshs(); |
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void ppc_opc_vsum4ubs(); |
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void ppc_opc_vsum4sbs(); |
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void ppc_opc_vsum4shs(); |
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void ppc_opc_vsum2sws(); |
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void ppc_opc_vsumsws(); |
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void ppc_opc_vnmsubfp(); |
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void ppc_opc_vavgub(); |
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void ppc_opc_vavgsb(); |
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void ppc_opc_vavguh(); |
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void ppc_opc_vavgsh(); |
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void ppc_opc_vavguw(); |
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void ppc_opc_vavgsw(); |
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void ppc_opc_vmaxub(); |
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void ppc_opc_vmaxsb(); |
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void ppc_opc_vmaxuh(); |
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void ppc_opc_vmaxsh(); |
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void ppc_opc_vmaxuw(); |
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void ppc_opc_vmaxsw(); |
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void ppc_opc_vmaxfp(); |
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void ppc_opc_vminub(); |
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void ppc_opc_vminsb(); |
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void ppc_opc_vminuh(); |
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void ppc_opc_vminsh(); |
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void ppc_opc_vminuw(); |
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void ppc_opc_vminsw(); |
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void ppc_opc_vminfp(); |
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void ppc_opc_vrfin(); |
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void ppc_opc_vrfip(); |
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void ppc_opc_vrfim(); |
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void ppc_opc_vrfiz(); |
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void ppc_opc_vrefp(); |
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void ppc_opc_vrsqrtefp(); |
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void ppc_opc_vlogefp(); |
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void ppc_opc_vexptefp(); |
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void ppc_opc_vcfux(); |
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void ppc_opc_vcfsx(); |
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void ppc_opc_vctsxs(); |
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void ppc_opc_vctuxs(); |
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void ppc_opc_vand(); |
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void ppc_opc_vandc(); |
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void ppc_opc_vor(); |
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void ppc_opc_vnor(); |
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void ppc_opc_vxor(); |
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void ppc_opc_vcmpequbx(); |
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void ppc_opc_vcmpequhx(); |
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void ppc_opc_vcmpequwx(); |
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void ppc_opc_vcmpeqfpx(); |
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void ppc_opc_vcmpgtubx(); |
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void ppc_opc_vcmpgtsbx(); |
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void ppc_opc_vcmpgtuhx(); |
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void ppc_opc_vcmpgtshx(); |
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void ppc_opc_vcmpgtuwx(); |
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void ppc_opc_vcmpgtswx(); |
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void ppc_opc_vcmpgtfpx(); |
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void ppc_opc_vcmpgefpx(); |
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void ppc_opc_vcmpbfpx(); |
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|
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JITCFlow ppc_opc_gen_vperm(); |
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JITCFlow ppc_opc_gen_vsel(); |
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JITCFlow ppc_opc_gen_vsrb(); |
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JITCFlow ppc_opc_gen_vsrh(); |
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JITCFlow ppc_opc_gen_vsrw(); |
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JITCFlow ppc_opc_gen_vsrab(); |
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JITCFlow ppc_opc_gen_vsrah(); |
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JITCFlow ppc_opc_gen_vsraw(); |
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JITCFlow ppc_opc_gen_vsr(); |
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JITCFlow ppc_opc_gen_vsro(); |
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JITCFlow ppc_opc_gen_vslb(); |
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JITCFlow ppc_opc_gen_vslh(); |
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JITCFlow ppc_opc_gen_vslw(); |
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JITCFlow ppc_opc_gen_vsl(); |
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JITCFlow ppc_opc_gen_vslo(); |
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JITCFlow ppc_opc_gen_vsldoi(); |
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JITCFlow ppc_opc_gen_vrlb(); |
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JITCFlow ppc_opc_gen_vrlh(); |
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JITCFlow ppc_opc_gen_vrlw(); |
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JITCFlow ppc_opc_gen_vmrghb(); |
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JITCFlow ppc_opc_gen_vmrghh(); |
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JITCFlow ppc_opc_gen_vmrghw(); |
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JITCFlow ppc_opc_gen_vmrglb(); |
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JITCFlow ppc_opc_gen_vmrglh(); |
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JITCFlow ppc_opc_gen_vmrglw(); |
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JITCFlow ppc_opc_gen_vspltb(); |
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JITCFlow ppc_opc_gen_vsplth(); |
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JITCFlow ppc_opc_gen_vspltw(); |
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JITCFlow ppc_opc_gen_vspltisb(); |
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JITCFlow ppc_opc_gen_vspltish(); |
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JITCFlow ppc_opc_gen_vspltisw(); |
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JITCFlow ppc_opc_gen_mfvscr(); |
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JITCFlow ppc_opc_gen_mtvscr(); |
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JITCFlow ppc_opc_gen_vpkuhum(); |
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JITCFlow ppc_opc_gen_vpkuwum(); |
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JITCFlow ppc_opc_gen_vpkpx(); |
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JITCFlow ppc_opc_gen_vpkuhus(); |
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JITCFlow ppc_opc_gen_vpkshss(); |
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JITCFlow ppc_opc_gen_vpkuwus(); |
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JITCFlow ppc_opc_gen_vpkswss(); |
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JITCFlow ppc_opc_gen_vpkuhus(); |
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JITCFlow ppc_opc_gen_vpkshus(); |
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JITCFlow ppc_opc_gen_vpkuwus(); |
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JITCFlow ppc_opc_gen_vpkswus(); |
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JITCFlow ppc_opc_gen_vupkhsb(); |
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JITCFlow ppc_opc_gen_vupkhpx(); |
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JITCFlow ppc_opc_gen_vupkhsh(); |
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JITCFlow ppc_opc_gen_vupklsb(); |
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JITCFlow ppc_opc_gen_vupklpx(); |
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JITCFlow ppc_opc_gen_vupklsh(); |
| 307 |
JITCFlow ppc_opc_gen_vaddubm(); |
| 308 |
JITCFlow ppc_opc_gen_vadduhm(); |
| 309 |
JITCFlow ppc_opc_gen_vadduwm(); |
| 310 |
JITCFlow ppc_opc_gen_vaddfp(); |
| 311 |
JITCFlow ppc_opc_gen_vaddcuw(); |
| 312 |
JITCFlow ppc_opc_gen_vaddubs(); |
| 313 |
JITCFlow ppc_opc_gen_vaddsbs(); |
| 314 |
JITCFlow ppc_opc_gen_vadduhs(); |
| 315 |
JITCFlow ppc_opc_gen_vaddshs(); |
| 316 |
JITCFlow ppc_opc_gen_vadduws(); |
| 317 |
JITCFlow ppc_opc_gen_vaddsws(); |
| 318 |
JITCFlow ppc_opc_gen_vsububm(); |
| 319 |
JITCFlow ppc_opc_gen_vsubuhm(); |
| 320 |
JITCFlow ppc_opc_gen_vsubuwm(); |
| 321 |
JITCFlow ppc_opc_gen_vsubfp(); |
| 322 |
JITCFlow ppc_opc_gen_vsubcuw(); |
| 323 |
JITCFlow ppc_opc_gen_vsububs(); |
| 324 |
JITCFlow ppc_opc_gen_vsubsbs(); |
| 325 |
JITCFlow ppc_opc_gen_vsubuhs(); |
| 326 |
JITCFlow ppc_opc_gen_vsubshs(); |
| 327 |
JITCFlow ppc_opc_gen_vsubuws(); |
| 328 |
JITCFlow ppc_opc_gen_vsubsws(); |
| 329 |
JITCFlow ppc_opc_gen_vmuleub(); |
| 330 |
JITCFlow ppc_opc_gen_vmulesb(); |
| 331 |
JITCFlow ppc_opc_gen_vmuleuh(); |
| 332 |
JITCFlow ppc_opc_gen_vmulesh(); |
| 333 |
JITCFlow ppc_opc_gen_vmuloub(); |
| 334 |
JITCFlow ppc_opc_gen_vmulosb(); |
| 335 |
JITCFlow ppc_opc_gen_vmulouh(); |
| 336 |
JITCFlow ppc_opc_gen_vmulosh(); |
| 337 |
JITCFlow ppc_opc_gen_vmaddfp(); |
| 338 |
JITCFlow ppc_opc_gen_vmhaddshs(); |
| 339 |
JITCFlow ppc_opc_gen_vmladduhm(); |
| 340 |
JITCFlow ppc_opc_gen_vmhraddshs(); |
| 341 |
JITCFlow ppc_opc_gen_vmsumubm(); |
| 342 |
JITCFlow ppc_opc_gen_vmsumuhm(); |
| 343 |
JITCFlow ppc_opc_gen_vmsummbm(); |
| 344 |
JITCFlow ppc_opc_gen_vmsumshm(); |
| 345 |
JITCFlow ppc_opc_gen_vmsumuhs(); |
| 346 |
JITCFlow ppc_opc_gen_vmsumshs(); |
| 347 |
JITCFlow ppc_opc_gen_vsum4ubs(); |
| 348 |
JITCFlow ppc_opc_gen_vsum4sbs(); |
| 349 |
JITCFlow ppc_opc_gen_vsum4shs(); |
| 350 |
JITCFlow ppc_opc_gen_vsum2sws(); |
| 351 |
JITCFlow ppc_opc_gen_vsumsws(); |
| 352 |
JITCFlow ppc_opc_gen_vnmsubfp(); |
| 353 |
JITCFlow ppc_opc_gen_vavgub(); |
| 354 |
JITCFlow ppc_opc_gen_vavgsb(); |
| 355 |
JITCFlow ppc_opc_gen_vavguh(); |
| 356 |
JITCFlow ppc_opc_gen_vavgsh(); |
| 357 |
JITCFlow ppc_opc_gen_vavguw(); |
| 358 |
JITCFlow ppc_opc_gen_vavgsw(); |
| 359 |
JITCFlow ppc_opc_gen_vmaxub(); |
| 360 |
JITCFlow ppc_opc_gen_vmaxsb(); |
| 361 |
JITCFlow ppc_opc_gen_vmaxuh(); |
| 362 |
JITCFlow ppc_opc_gen_vmaxsh(); |
| 363 |
JITCFlow ppc_opc_gen_vmaxuw(); |
| 364 |
JITCFlow ppc_opc_gen_vmaxsw(); |
| 365 |
JITCFlow ppc_opc_gen_vmaxfp(); |
| 366 |
JITCFlow ppc_opc_gen_vminub(); |
| 367 |
JITCFlow ppc_opc_gen_vminsb(); |
| 368 |
JITCFlow ppc_opc_gen_vminuh(); |
| 369 |
JITCFlow ppc_opc_gen_vminsh(); |
| 370 |
JITCFlow ppc_opc_gen_vminuw(); |
| 371 |
JITCFlow ppc_opc_gen_vminsw(); |
| 372 |
JITCFlow ppc_opc_gen_vminfp(); |
| 373 |
JITCFlow ppc_opc_gen_vrfin(); |
| 374 |
JITCFlow ppc_opc_gen_vrfip(); |
| 375 |
JITCFlow ppc_opc_gen_vrfim(); |
| 376 |
JITCFlow ppc_opc_gen_vrfiz(); |
| 377 |
JITCFlow ppc_opc_gen_vrefp(); |
| 378 |
JITCFlow ppc_opc_gen_vrsqrtefp(); |
| 379 |
JITCFlow ppc_opc_gen_vlogefp(); |
| 380 |
JITCFlow ppc_opc_gen_vexptefp(); |
| 381 |
JITCFlow ppc_opc_gen_vcfux(); |
| 382 |
JITCFlow ppc_opc_gen_vcfsx(); |
| 383 |
JITCFlow ppc_opc_gen_vctsxs(); |
| 384 |
JITCFlow ppc_opc_gen_vctuxs(); |
| 385 |
JITCFlow ppc_opc_gen_vand(); |
| 386 |
JITCFlow ppc_opc_gen_vandc(); |
| 387 |
JITCFlow ppc_opc_gen_vor(); |
| 388 |
JITCFlow ppc_opc_gen_vnor(); |
| 389 |
JITCFlow ppc_opc_gen_vxor(); |
| 390 |
JITCFlow ppc_opc_gen_vcmpequbx(); |
| 391 |
JITCFlow ppc_opc_gen_vcmpequhx(); |
| 392 |
JITCFlow ppc_opc_gen_vcmpequwx(); |
| 393 |
JITCFlow ppc_opc_gen_vcmpeqfpx(); |
| 394 |
JITCFlow ppc_opc_gen_vcmpgtubx(); |
| 395 |
JITCFlow ppc_opc_gen_vcmpgtsbx(); |
| 396 |
JITCFlow ppc_opc_gen_vcmpgtuhx(); |
| 397 |
JITCFlow ppc_opc_gen_vcmpgtshx(); |
| 398 |
JITCFlow ppc_opc_gen_vcmpgtuwx(); |
| 399 |
JITCFlow ppc_opc_gen_vcmpgtswx(); |
| 400 |
JITCFlow ppc_opc_gen_vcmpgtfpx(); |
| 401 |
JITCFlow ppc_opc_gen_vcmpgefpx(); |
| 402 |
JITCFlow ppc_opc_gen_vcmpbfpx(); |
| 403 |
|
| 404 |
#endif |
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