25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: dev_sgi_mardigras.c,v 1.24 2006/12/30 13:30:59 debug Exp $ |
* $Id: dev_sgi_mardigras.c,v 1.25 2007/06/15 19:57:34 debug Exp $ |
29 |
* |
* |
30 |
* "MardiGras" graphics controller on SGI IP30 (Octane). |
* COMMENT: MardiGras graphics controller on SGI IP30 (Octane) |
31 |
* |
* |
32 |
* Most of this is just guesses based on the behaviour of Linux/Octane. |
* Most of this is just guesses based on the behaviour of Linux/Octane. |
33 |
* |
* |
209 |
} |
} |
210 |
|
|
211 |
|
|
|
/* |
|
|
* dev_sgi_mardigras_access(): |
|
|
*/ |
|
212 |
DEVICE_ACCESS(sgi_mardigras) |
DEVICE_ACCESS(sgi_mardigras) |
213 |
{ |
{ |
214 |
uint64_t idata = 0, odata = 0; |
uint64_t idata = 0, odata = 0; |
230 |
} |
} |
231 |
|
|
232 |
switch (relative_addr) { |
switch (relative_addr) { |
233 |
|
|
234 |
case 0x00004: |
case 0x00004: |
235 |
/* xtalk data: (according to Linux/IP30) */ |
/* xtalk data: (according to Linux/IP30) */ |
236 |
/* (mfgr & 0x7ff) << 1 */ |
/* (mfgr & 0x7ff) << 1 */ |
238 |
/* (rev & 0xf) << 28 */ |
/* (rev & 0xf) << 28 */ |
239 |
odata = (2 << 28) | (0xc003 << 12) | (0x2aa << 1); |
odata = (2 << 28) | (0xc003 << 12) | (0x2aa << 1); |
240 |
break; |
break; |
241 |
|
|
242 |
case 0x20008: /* Fifo status */ |
case 0x20008: /* Fifo status */ |
243 |
break; |
break; |
244 |
|
|
245 |
case 0x20200: |
case 0x20200: |
246 |
break; |
break; |
247 |
|
|
248 |
case 0x20400: |
case 0x20400: |
249 |
if (writeflag == MEM_WRITE) |
if (writeflag == MEM_WRITE) |
250 |
mardigras_20400(cpu, d, idata); |
mardigras_20400(cpu, d, idata); |
251 |
else |
else |
252 |
debug("[ sgi_mardigras: read from 0x20400? ]\n"); |
debug("[ sgi_mardigras: read from 0x20400? ]\n"); |
253 |
break; |
break; |
254 |
|
|
255 |
case 0x58040: |
case 0x58040: |
256 |
/* HQ4 microcode stuff */ |
/* HQ4 microcode stuff */ |
257 |
break; |
break; |
258 |
|
|
259 |
case 0x70c30: |
case 0x70c30: |
260 |
/* Palette register select? */ |
/* Palette register select? */ |
261 |
if (writeflag == MEM_WRITE) |
if (writeflag == MEM_WRITE) |
263 |
else |
else |
264 |
odata = d->palette_reg_select; |
odata = d->palette_reg_select; |
265 |
break; |
break; |
266 |
|
|
267 |
case 0x70d18: |
case 0x70d18: |
268 |
/* Palette register read/write? */ |
/* Palette register read/write? */ |
269 |
i = 3 * ((d->palette_reg_select >> 8) & 0xff); |
i = 3 * ((d->palette_reg_select >> 8) & 0xff); |
277 |
(d->fb->rgb_palette[i+2] << 8); |
(d->fb->rgb_palette[i+2] << 8); |
278 |
} |
} |
279 |
break; |
break; |
280 |
|
|
281 |
case 0x71208: |
case 0x71208: |
282 |
odata = 8; |
odata = 8; |
283 |
break; |
break; |
284 |
|
|
285 |
default: |
default: |
286 |
if (writeflag==MEM_READ) { |
if (writeflag==MEM_READ) { |
287 |
debug("[ sgi_mardigras: read from 0x%08lx ]\n", |
debug("[ sgi_mardigras: read from 0x%08lx ]\n", |
303 |
{ |
{ |
304 |
struct sgi_mardigras_data *d; |
struct sgi_mardigras_data *d; |
305 |
|
|
306 |
d = malloc(sizeof(struct sgi_mardigras_data)); |
CHECK_ALLOCATION(d = malloc(sizeof(struct sgi_mardigras_data))); |
|
if (d == NULL) { |
|
|
fprintf(stderr, "out of memory\n"); |
|
|
exit(1); |
|
|
} |
|
307 |
memset(d, 0, sizeof(struct sgi_mardigras_data)); |
memset(d, 0, sizeof(struct sgi_mardigras_data)); |
308 |
|
|
309 |
d->fb = dev_fb_init(devinit->machine, devinit->machine->memory, |
d->fb = dev_fb_init(devinit->machine, devinit->machine->memory, |