25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: dev_sgi_ip32.c,v 1.27 2005/06/26 11:43:48 debug Exp $ |
* $Id: dev_sgi_ip32.c,v 1.29 2005/08/13 08:25:48 debug Exp $ |
29 |
* |
* |
30 |
* SGI IP32 devices. |
* SGI IP32 devices. |
31 |
* |
* |
562 |
d->cur_rx_addr_index ++; |
d->cur_rx_addr_index ++; |
563 |
d->cur_rx_addr_index %= N_RX_ADDRESSES; |
d->cur_rx_addr_index %= N_RX_ADDRESSES; |
564 |
d->reg[MEC_INT_STATUS / sizeof(uint64_t)] &= ~MEC_INT_RX_MCL_FIFO_ALIAS; |
d->reg[MEC_INT_STATUS / sizeof(uint64_t)] &= ~MEC_INT_RX_MCL_FIFO_ALIAS; |
565 |
d->reg[MEC_INT_STATUS / sizeof(uint64_t)] |= (d->cur_rx_addr_index & 0x1f) << 8; |
d->reg[MEC_INT_STATUS / sizeof(uint64_t)] |= |
566 |
|
(d->cur_rx_addr_index & 0x1f) << 8; |
567 |
retval = 1; |
retval = 1; |
568 |
|
|
569 |
skip: |
skip: |
996 |
break; |
break; |
997 |
default: |
default: |
998 |
if (writeflag == MEM_WRITE) |
if (writeflag == MEM_WRITE) |
999 |
debug("[ sgi_ust: unimplemented write to address 0x%llx, data=0x%016llx ]\n", (long long)relative_addr, (long long)idata); |
debug("[ sgi_ust: unimplemented write to " |
1000 |
|
"address 0x%llx, data=0x%016llx ]\n", |
1001 |
|
(long long)relative_addr, (long long)idata); |
1002 |
else |
else |
1003 |
debug("[ sgi_ust: unimplemented read from address 0x%llx ]\n", (long long)relative_addr); |
debug("[ sgi_ust: unimplemented read from address" |
1004 |
|
" 0x%llx ]\n", (long long)relative_addr); |
1005 |
} |
} |
1006 |
|
|
1007 |
if (writeflag == MEM_READ) |
if (writeflag == MEM_READ) |
1024 |
memset(d, 0, sizeof(struct sgi_ust_data)); |
memset(d, 0, sizeof(struct sgi_ust_data)); |
1025 |
|
|
1026 |
memory_device_register(mem, "sgi_ust", baseaddr, |
memory_device_register(mem, "sgi_ust", baseaddr, |
1027 |
DEV_SGI_UST_LENGTH, dev_sgi_ust_access, (void *)d, MEM_DEFAULT, NULL); |
DEV_SGI_UST_LENGTH, dev_sgi_ust_access, (void *)d, |
1028 |
|
MEM_DEFAULT, NULL); |
1029 |
} |
} |
1030 |
|
|
1031 |
|
|
1034 |
|
|
1035 |
/* |
/* |
1036 |
* SGI "mte". This device seems to be an accelerator for copying/clearing |
* SGI "mte". This device seems to be an accelerator for copying/clearing |
1037 |
* memory. Used in SGI-IP32. |
* memory. Used by (at least) the SGI O2 PROM. |
1038 |
|
* |
1039 |
|
* Actually, it seems to be used for graphics output as well. (?) |
1040 |
|
* TODO: Run the O2's prom and try to figure out what it really does. |
1041 |
*/ |
*/ |
1042 |
|
/* #define debug fatal */ |
1043 |
#define ZERO_CHUNK_LEN 4096 |
#define ZERO_CHUNK_LEN 4096 |
1044 |
|
|
1045 |
struct sgi_mte_data { |
struct sgi_mte_data { |
1069 |
odata = d->reg[regnr]; |
odata = d->reg[regnr]; |
1070 |
|
|
1071 |
/* |
/* |
1072 |
* I've not found any docs about this 'mte' device at all, so this is just |
* I've not found any docs about this 'mte' device at all, so this is |
1073 |
* a guess. The mte seems to be used for copying and zeroing chunks of |
* just a guess. The mte seems to be used for copying and zeroing |
1074 |
* memory. |
* chunks of memory. |
1075 |
* |
* |
1076 |
* [ sgi_mte: unimplemented write to address 0x3030, data=0x00000000003da000 ] <-- first address |
* [ sgi_mte: unimplemented write to address 0x3030, data=0x00000000003da000 ] <-- first address |
1077 |
* [ sgi_mte: unimplemented write to address 0x3038, data=0x00000000003f9fff ] <-- last address |
* [ sgi_mte: unimplemented write to address 0x3038, data=0x00000000003f9fff ] <-- last address |
1115 |
case 0x1778: |
case 0x1778: |
1116 |
break; |
break; |
1117 |
|
|
1118 |
|
#if 1 |
1119 |
|
case 0x2074: |
1120 |
|
{ |
1121 |
|
/* This seems to have to do with graphical output: |
1122 |
|
0x000000000xxx0yyy where x is usually 0..1279 and y is 0..1023? */ |
1123 |
|
/* Gaaah... */ |
1124 |
|
int x = (idata >> 16) & 0xfff; |
1125 |
|
int y = idata & 0xfff; |
1126 |
|
int addr; |
1127 |
|
unsigned char buf[3]; |
1128 |
|
printf("x = %i, y = %i\n", x, y); |
1129 |
|
buf[0] = buf[1] = buf[2] = random() | 0x80; |
1130 |
|
addr = (x/2 + (y/2)*640) * 3; |
1131 |
|
if (x < 640 && y < 480) |
1132 |
|
cpu->memory_rw(cpu, cpu->mem, 0x38000000 + addr, |
1133 |
|
buf, 3, MEM_WRITE, NO_EXCEPTIONS | PHYSICAL); |
1134 |
|
|
1135 |
|
} |
1136 |
|
break; |
1137 |
|
#endif |
1138 |
|
|
1139 |
/* Operations: */ |
/* Operations: */ |
1140 |
case 0x3800: |
case 0x3800: |
1141 |
if (writeflag == MEM_WRITE) { |
if (writeflag == MEM_WRITE) { |