/[gxemul]/trunk/src/devices/dev_pccmos.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Annotation of /trunk/src/devices/dev_pccmos.c

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Revision 18 - (hide annotations)
Mon Oct 8 16:19:11 2007 UTC (16 years, 7 months ago) by dpavlin
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File size: 4483 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1004 2005/10/27 14:01:10 debug Exp $
20051011        Passing -A as the default boot arg for CATS (works fine with
                OpenBSD/cats).
20051012	Fixing the VGA cursor offset bug, and speeding up framebuffer
		redraws if character cells contain the same thing as during
		the last redraw.
20051013	Adding a slow strd ARM instruction hack.
20051017	Minor updates: Adding a dummy i80321 Verde controller (for
		XScale emulation), fixing the disassembly of the ARM "ldrd"
		instruction, adding "support" for less-than-4KB pages for ARM
		(by not adding them to translation tables).
20051020	Continuing on some HPCarm stuff. A NetBSD/hpcarm kernel prints
		some boot messages on an emulated Jornada 720.
		Making dev_ram work better with dyntrans (speeds up some things
		quite a bit).
20051021	Automatically generating some of the most common ARM load/store
		multiple instructions.
20051022	Better statistics gathering for the ARM load/store multiple.
		Various other dyntrans and device updates.
20051023	Various minor updates.
20051024	Continuing; minor device and dyntrans fine-tuning. Adding the
		first "reasonable" instruction combination hacks for ARM (the
		cores of NetBSD/cats' memset and memcpy).
20051025	Fixing a dyntrans-related bug in dev_vga. Also changing the
		dyntrans low/high access notification to only be updated on
		writes, not reads. Hopefully it will be enough. (dev_vga in
		charcell mode now seems to work correctly with both reads and
		writes.)
		Experimenting with gathering dyntrans statistics (which parts
		of emulated RAM that are actually executed), and adding
		instruction combination hacks for cache cleaning and a part of
		NetBSD's scanc() function.
20051026	Adding a bitmap for ARM emulation which indicates if a page is
		(specifically) user accessible; loads and stores with the t-
		flag set can now use the translation arrays, which results in
		a measurable speedup.
20051027	Dyntrans updates; adding an extra bitmap array for 32-bit
		emulation modes, speeding up the check whether a physical page
		has any code translations or not (O(n) -> O(1)). Doing a
		similar reduction of O(n) to O(1) by avoiding the scan through
		the translation entries on a translation update (32-bit mode
		only).
		Various other minor hacks.
20051029	Quick release, without any testing at all.

==============  RELEASE 0.3.6.2  ==============


1 dpavlin 6 /*
2     * Copyright (C) 2005 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 18 * $Id: dev_pccmos.c,v 1.8 2005/10/26 14:37:04 debug Exp $
29 dpavlin 6 *
30     * PC CMOS/RTC device.
31     *
32 dpavlin 14 * The main point of this device is to be a "PC style wrapper" for accessing
33     * the MC146818 (the RTC). In most other respects, this device is bogus, and
34     * just acts as a 256-byte RAM device.
35 dpavlin 6 */
36    
37     #include <stdio.h>
38     #include <stdlib.h>
39     #include <string.h>
40    
41     #include "cpu.h"
42     #include "device.h"
43     #include "devices.h"
44     #include "emul.h"
45     #include "machine.h"
46     #include "memory.h"
47     #include "misc.h"
48    
49    
50     #define DEV_PCCMOS_LENGTH 2
51     #define PCCMOS_MC146818_FAKE_ADDR 0x1d00000000ULL
52    
53     struct pccmos_data {
54     unsigned char select;
55     unsigned char ram[256];
56     };
57    
58    
59     /*
60     * dev_pccmos_access():
61     */
62     int dev_pccmos_access(struct cpu *cpu, struct memory *mem,
63     uint64_t relative_addr, unsigned char *data, size_t len,
64     int writeflag, void *extra)
65     {
66     struct pccmos_data *d = (struct pccmos_data *) extra;
67     uint64_t idata = 0, odata = 0;
68 dpavlin 18 unsigned char b = 0;
69 dpavlin 6
70 dpavlin 18 if (writeflag == MEM_WRITE)
71     b = idata = memory_readmax64(cpu, data, len);
72 dpavlin 6
73 dpavlin 14 /*
74     * Accesses to CMOS register 0 .. 0xd are rerouted to the
75     * RTC; all other access are treated as CMOS RAM read/writes.
76     */
77    
78 dpavlin 16 if ((relative_addr & 1) == 0) {
79     if (writeflag == MEM_WRITE) {
80 dpavlin 6 d->select = idata;
81 dpavlin 14 if (idata <= 0x0d) {
82 dpavlin 6 cpu->memory_rw(cpu, cpu->mem,
83 dpavlin 14 PCCMOS_MC146818_FAKE_ADDR, &b, 1,
84 dpavlin 6 MEM_WRITE, PHYSICAL);
85 dpavlin 14 }
86 dpavlin 6 } else
87     odata = d->select;
88 dpavlin 16 } else {
89     if (d->select <= 0x0d) {
90 dpavlin 14 if (writeflag == MEM_WRITE) {
91 dpavlin 6 cpu->memory_rw(cpu, cpu->mem,
92 dpavlin 14 PCCMOS_MC146818_FAKE_ADDR + 1, &b, 1,
93 dpavlin 6 MEM_WRITE, PHYSICAL);
94 dpavlin 14 } else {
95 dpavlin 6 cpu->memory_rw(cpu, cpu->mem,
96 dpavlin 14 PCCMOS_MC146818_FAKE_ADDR + 1, &b, 1,
97 dpavlin 6 MEM_READ, PHYSICAL);
98 dpavlin 14 odata = b;
99     }
100 dpavlin 6 } else {
101     if (writeflag == MEM_WRITE)
102     d->ram[d->select] = idata;
103     else
104     odata = d->ram[d->select];
105     }
106     }
107    
108     if (writeflag == MEM_READ)
109     memory_writemax64(cpu, data, len, odata);
110    
111     return 1;
112     }
113    
114    
115     /*
116     * devinit_pccmos():
117     */
118     int devinit_pccmos(struct devinit *devinit)
119     {
120     struct pccmos_data *d = malloc(sizeof(struct pccmos_data));
121 dpavlin 16 int irq_nr, type = MC146818_PC_CMOS, len = DEV_PCCMOS_LENGTH;
122 dpavlin 6
123     if (d == NULL) {
124     fprintf(stderr, "out of memory\n");
125     exit(1);
126     }
127     memset(d, 0, sizeof(struct pccmos_data));
128    
129 dpavlin 14 /*
130     * Different machines use different IRQ schemes.
131     */
132     switch (devinit->machine->machine_type) {
133     case MACHINE_CATS:
134     irq_nr = 32 + 8;
135 dpavlin 16 type = MC146818_CATS;
136     d->ram[0x48] = 20; /* century */
137     len = DEV_PCCMOS_LENGTH * 2;
138 dpavlin 14 break;
139     case MACHINE_X86:
140     irq_nr = 16; /* "No" irq */
141     break;
142     default:fatal("devinit_pccmos(): unimplemented machine type"
143     " %i\n", devinit->machine->machine_type);
144     exit(1);
145     }
146    
147 dpavlin 16 memory_device_register(devinit->machine->memory, devinit->name,
148     devinit->addr, len, dev_pccmos_access, (void *)d,
149     MEM_DEFAULT, NULL);
150    
151 dpavlin 6 dev_mc146818_init(devinit->machine, devinit->machine->memory,
152 dpavlin 16 PCCMOS_MC146818_FAKE_ADDR, irq_nr, type, 1);
153 dpavlin 6
154     return 1;
155     }
156    

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