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/* |
/* |
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* Copyright (C) 2003-2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2003-2007 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: dev_ns16550.c,v 1.33 2005/06/26 11:43:48 debug Exp $ |
* $Id: dev_ns16550.c,v 1.58 2006/12/30 13:30:58 debug Exp $ |
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* |
* |
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* NS16550 serial controller. |
* NS16550 serial controller. |
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* |
* |
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* TODO: actually implement the fifo :) |
* |
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* TODO: Implement the FIFO. |
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*/ |
*/ |
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#include <stdio.h> |
#include <stdio.h> |
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#include "console.h" |
#include "console.h" |
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#include "cpu.h" |
#include "cpu.h" |
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#include "devices.h" |
#include "device.h" |
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#include "interrupt.h" |
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#include "machine.h" |
#include "machine.h" |
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#include "memory.h" |
#include "memory.h" |
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#include "misc.h" |
#include "misc.h" |
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#include "comreg.h" |
#include "comreg.h" |
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/* #define debug fatal */ |
/* #define debug fatal */ |
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#define NS16550_TICK_SHIFT 14 |
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/* #define DISABLE_FIFO */ |
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#define TICK_SHIFT 14 |
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#define DEV_NS16550_LENGTH 8 |
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struct ns_data { |
struct ns_data { |
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int reg[8]; |
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int irqnr; |
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int console_handle; |
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int irq_enable; |
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int addrmult; |
int addrmult; |
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int in_use; |
int in_use; |
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char *name; |
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int console_handle; |
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int enable_fifo; |
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struct interrupt irq; |
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unsigned char reg[DEV_NS16550_LENGTH]; |
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unsigned char fcr; /* FIFO control register */ |
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int int_asserted; |
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int dlab; /* Divisor Latch Access bit */ |
int dlab; /* Divisor Latch Access bit */ |
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int divisor; |
int divisor; |
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int databits; |
int databits; |
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char parity; |
char parity; |
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const char *stopbits; |
const char *stopbits; |
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}; |
}; |
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/* |
DEVICE_TICK(ns16550) |
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* dev_ns16550_tick(): |
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*/ |
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void dev_ns16550_tick(struct cpu *cpu, void *extra) |
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{ |
{ |
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/* |
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* This function is called at regular intervals. An interrupt is |
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* asserted if there is a character available for reading, or if the |
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* transmitter slot is empty (i.e. the ns16550 is ready to transmit). |
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*/ |
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struct ns_data *d = extra; |
struct ns_data *d = extra; |
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d->reg[com_iir] |= IIR_NOPEND; |
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cpu_interrupt_ack(cpu, d->irqnr); |
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d->reg[com_iir] &= ~IIR_RXRDY; |
d->reg[com_iir] &= ~IIR_RXRDY; |
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if (d->in_use) { |
if (console_charavail(d->console_handle)) |
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if (console_charavail(d->console_handle)) |
d->reg[com_iir] |= IIR_RXRDY; |
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d->reg[com_iir] |= IIR_RXRDY; |
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} |
/* |
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* If interrupts are enabled, and interrupts are pending, then |
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* cause a CPU interrupt. |
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*/ |
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if ((d->irq_enable & IER_ETXRDY && d->reg[com_iir] & IIR_TXRDY) || |
if (((d->reg[com_ier] & IER_ETXRDY) && (d->reg[com_iir] & IIR_TXRDY)) || |
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(d->irq_enable & IER_ERXRDY && d->reg[com_iir] & IIR_RXRDY)) { |
((d->reg[com_ier] & IER_ERXRDY) && (d->reg[com_iir] & IIR_RXRDY))) { |
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d->reg[com_iir] &= ~IIR_NOPEND; |
d->reg[com_iir] &= ~IIR_NOPEND; |
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if (d->reg[com_mcr] & MCR_IENABLE) |
if (d->reg[com_mcr] & MCR_IENABLE) { |
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cpu_interrupt(cpu, d->irqnr); |
INTERRUPT_ASSERT(d->irq); |
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d->int_asserted = 1; |
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} |
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} else { |
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d->reg[com_iir] |= IIR_NOPEND; |
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if (d->int_asserted) |
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INTERRUPT_DEASSERT(d->irq); |
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d->int_asserted = 0; |
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} |
} |
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} |
} |
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/* |
DEVICE_ACCESS(ns16550) |
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* dev_ns16550_access(): |
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*/ |
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int dev_ns16550_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
{ |
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uint64_t idata = 0, odata=0; |
uint64_t idata = 0, odata=0; |
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int i; |
size_t i; |
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struct ns_data *d = extra; |
struct ns_data *d = extra; |
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idata = memory_readmax64(cpu, data, len); |
if (writeflag == MEM_WRITE) |
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idata = memory_readmax64(cpu, data, len); |
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/* Always ready to transmit: */ |
#if 0 |
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/* The NS16550 should be accessed using byte read/writes: */ |
122 |
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if (len != 1) |
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fatal("[ ns16550 (%s): len=%i, idata=0x%16llx! ]\n", |
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d->name, len, (long long)idata); |
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#endif |
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/* |
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* Always ready to transmit: |
129 |
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*/ |
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d->reg[com_lsr] |= LSR_TXRDY | LSR_TSRE; |
d->reg[com_lsr] |= LSR_TXRDY | LSR_TSRE; |
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d->reg[com_lsr] &= ~LSR_RXRDY; |
d->reg[com_msr] |= MSR_DCD | MSR_DSR | MSR_CTS; |
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d->reg[com_msr] = MSR_DCD | MSR_DSR | MSR_CTS; |
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#ifdef DISABLE_FIFO |
d->reg[com_iir] &= ~0xf0; |
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/* FIFO turned off: */ |
if (d->enable_fifo) |
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d->reg[com_iir] &= 0x0f; |
d->reg[com_iir] |= ((d->fcr << 5) & 0xc0); |
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#endif |
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if (d->in_use) { |
d->reg[com_lsr] &= ~LSR_RXRDY; |
138 |
if (console_charavail(d->console_handle)) { |
if (console_charavail(d->console_handle)) |
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d->reg[com_lsr] |= LSR_RXRDY; |
d->reg[com_lsr] |= LSR_RXRDY; |
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} |
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} |
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relative_addr /= d->addrmult; |
relative_addr /= d->addrmult; |
142 |
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143 |
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if (relative_addr >= DEV_NS16550_LENGTH) { |
144 |
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fatal("[ ns16550 (%s): outside register space? relative_addr=" |
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"0x%llx. bad addrmult? bad device length? ]\n", d->name, |
146 |
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(long long)relative_addr); |
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return 0; |
148 |
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} |
149 |
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150 |
switch (relative_addr) { |
switch (relative_addr) { |
151 |
case com_data: /* com_data or com_dlbl */ |
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152 |
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case com_data: /* data AND low byte of the divisor */ |
153 |
/* Read/write of the Divisor value: */ |
/* Read/write of the Divisor value: */ |
154 |
if (d->dlab) { |
if (d->dlab) { |
155 |
if (writeflag == MEM_WRITE) { |
/* Write or read the low byte of the divisor: */ |
156 |
/* Set the low byte of the divisor: */ |
if (writeflag == MEM_WRITE) |
157 |
d->divisor &= ~0xff; |
d->divisor = (d->divisor & 0xff00) | idata; |
158 |
d->divisor |= (idata & 0xff); |
else |
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} else { |
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odata = d->divisor & 0xff; |
odata = d->divisor & 0xff; |
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} |
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160 |
break; |
break; |
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} |
} |
162 |
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/* Read write of data: */ |
/* Read/write of data: */ |
164 |
if (writeflag == MEM_WRITE) { |
if (writeflag == MEM_WRITE) { |
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if (d->reg[com_mcr] & MCR_LOOPBACK) { |
if (d->reg[com_mcr] & MCR_LOOPBACK) |
166 |
console_makeavail(d->console_handle, idata); |
console_makeavail(d->console_handle, idata); |
167 |
} else { |
else |
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#if 0 |
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/* Ugly hack: don't show form feeds: */ |
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if (idata != 12) |
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#endif |
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168 |
console_putchar(d->console_handle, idata); |
console_putchar(d->console_handle, idata); |
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} |
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d->reg[com_iir] |= IIR_TXRDY; |
d->reg[com_iir] |= IIR_TXRDY; |
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dev_ns16550_tick(cpu, d); |
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return 1; |
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} else { |
} else { |
171 |
if (d->in_use) |
int x = console_readchar(d->console_handle); |
172 |
odata = console_readchar(d->console_handle); |
odata = x < 0? 0 : x; |
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else |
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odata = 0; |
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dev_ns16550_tick(cpu, d); |
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} |
} |
174 |
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dev_ns16550_tick(cpu, d); |
175 |
break; |
break; |
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case com_ier: /* interrupt enable AND high byte of the divisor */ |
case com_ier: /* interrupt enable AND high byte of the divisor */ |
178 |
/* Read/write of the Divisor value: */ |
/* Read/write of the Divisor value: */ |
179 |
if (d->dlab) { |
if (d->dlab) { |
180 |
if (writeflag == MEM_WRITE) { |
if (writeflag == MEM_WRITE) { |
181 |
/* Set the high byte of the divisor: */ |
/* Set the high byte of the divisor: */ |
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d->divisor &= ~0xff00; |
d->divisor = (d->divisor & 0xff) | (idata << 8); |
183 |
d->divisor |= ((idata & 0xff) << 8); |
debug("[ ns16550 (%s): speed set to %i bps ]\n", |
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debug("[ ns16550 speed set to %i bps ]\n", |
d->name, (int)(115200 / d->divisor)); |
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115200 / d->divisor); |
} else |
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} else { |
odata = d->divisor >> 8; |
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odata = (d->divisor & 0xff00) >> 8; |
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} |
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break; |
break; |
188 |
} |
} |
189 |
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if (writeflag == MEM_WRITE) { |
if (writeflag == MEM_WRITE) { |
192 |
/* This is to supress Linux' behaviour */ |
/* This is to supress Linux' behaviour */ |
193 |
if (idata != 0) |
if (idata != 0) |
194 |
debug("[ ns16550 write to ier: 0x%02x ]\n", |
debug("[ ns16550 (%s): write to ier: 0x%02x ]" |
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idata); |
"\n", d->name, (int)idata); |
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/* Needed for NetBSD 2.0, but not 1.6.2? */ |
/* Needed for NetBSD 2.0.x, but not 1.6.2? */ |
198 |
if (!(d->irq_enable & IER_ETXRDY) |
if (!(d->reg[com_ier] & IER_ETXRDY) |
199 |
&& (idata & IER_ETXRDY)) |
&& (idata & IER_ETXRDY)) |
200 |
d->reg[com_iir] |= IIR_TXRDY; |
d->reg[com_iir] |= IIR_TXRDY; |
201 |
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202 |
d->irq_enable = idata; |
d->reg[com_ier] = idata; |
203 |
dev_ns16550_tick(cpu, d); |
dev_ns16550_tick(cpu, d); |
204 |
} else { |
} else |
205 |
odata = d->reg[relative_addr]; |
odata = d->reg[com_ier]; |
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} |
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206 |
break; |
break; |
207 |
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208 |
case com_iir: /* interrupt identification (r), fifo control (w) */ |
case com_iir: /* interrupt identification (r), fifo control (w) */ |
209 |
if (writeflag == MEM_WRITE) { |
if (writeflag == MEM_WRITE) { |
210 |
debug("[ ns16550 write to fifo control ]\n"); |
debug("[ ns16550 (%s): write to fifo control: 0x%02x ]" |
211 |
d->reg[relative_addr] = idata; |
"\n", d->name, (int)idata); |
212 |
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d->fcr = idata; |
213 |
} else { |
} else { |
214 |
odata = d->reg[relative_addr]; |
odata = d->reg[com_iir]; |
215 |
debug("[ ns16550 read from iir: 0x%02x ]\n", odata); |
if (d->reg[com_iir] & IIR_TXRDY) |
216 |
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d->reg[com_iir] &= ~IIR_TXRDY; |
217 |
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debug("[ ns16550 (%s): read from iir: 0x%02x ]\n", |
218 |
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d->name, (int)odata); |
219 |
dev_ns16550_tick(cpu, d); |
dev_ns16550_tick(cpu, d); |
220 |
} |
} |
221 |
break; |
break; |
222 |
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223 |
case com_lsr: |
case com_lsr: |
224 |
if (writeflag == MEM_WRITE) { |
if (writeflag == MEM_WRITE) { |
225 |
debug("[ ns16550 write to lsr ]\n"); |
debug("[ ns16550 (%s): write to lsr: 0x%02x ]\n", |
226 |
d->reg[relative_addr] = idata; |
d->name, (int)idata); |
227 |
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d->reg[com_lsr] = idata; |
228 |
} else { |
} else { |
229 |
odata = d->reg[relative_addr]; |
odata = d->reg[com_lsr]; |
230 |
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/* debug("[ ns16550 (%s): read from lsr: 0x%02x ]\n", |
231 |
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d->name, (int)odata); */ |
232 |
} |
} |
233 |
break; |
break; |
234 |
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235 |
case com_msr: |
case com_msr: |
236 |
if (writeflag == MEM_WRITE) { |
if (writeflag == MEM_WRITE) { |
237 |
debug("[ ns16550 write to msr ]\n"); |
debug("[ ns16550 (%s): write to msr: 0x%02x ]\n", |
238 |
d->reg[relative_addr] = idata; |
d->name, (int)idata); |
239 |
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d->reg[com_msr] = idata; |
240 |
} else { |
} else { |
241 |
odata = d->reg[relative_addr]; |
odata = d->reg[com_msr]; |
242 |
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debug("[ ns16550 (%s): read from msr: 0x%02x ]\n", |
243 |
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d->name, (int)odata); |
244 |
} |
} |
245 |
break; |
break; |
246 |
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247 |
case com_lctl: |
case com_lctl: |
248 |
if (writeflag == MEM_WRITE) { |
if (writeflag == MEM_WRITE) { |
249 |
d->reg[relative_addr] = idata; |
d->reg[com_lctl] = idata; |
250 |
switch (idata & 0x7) { |
switch (idata & 0x7) { |
251 |
case 0: d->databits = 5; d->stopbits = "1"; break; |
case 0: d->databits = 5; d->stopbits = "1"; break; |
252 |
case 1: d->databits = 6; d->stopbits = "1"; break; |
case 1: d->databits = 6; d->stopbits = "1"; break; |
270 |
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271 |
d->dlab = idata & 0x80? 1 : 0; |
d->dlab = idata & 0x80? 1 : 0; |
272 |
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273 |
debug("[ ns16550 write to lctl: 0x%02x (%s%s" |
debug("[ ns16550 (%s): write to lctl: 0x%02x (%s%s" |
274 |
"setting mode %i%c%s) ]\n", |
"setting mode %i%c%s) ]\n", d->name, (int)idata, |
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(int)idata, |
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275 |
d->dlab? "Divisor Latch access, " : "", |
d->dlab? "Divisor Latch access, " : "", |
276 |
idata&0x40? "sending BREAK, " : "", |
idata&0x40? "sending BREAK, " : "", |
277 |
d->databits, d->parity, d->stopbits); |
d->databits, d->parity, d->stopbits); |
278 |
} else { |
} else { |
279 |
odata = d->reg[relative_addr]; |
odata = d->reg[com_lctl]; |
280 |
debug("[ ns16550 read from lctl: 0x%02x ]\n", odata); |
debug("[ ns16550 (%s): read from lctl: 0x%02x ]\n", |
281 |
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d->name, (int)odata); |
282 |
} |
} |
283 |
break; |
break; |
284 |
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285 |
case com_mcr: |
case com_mcr: |
286 |
if (writeflag == MEM_WRITE) { |
if (writeflag == MEM_WRITE) { |
287 |
d->reg[relative_addr] = idata; |
d->reg[com_mcr] = idata; |
288 |
debug("[ ns16550 write to mcr: 0x%02x ]\n", idata); |
debug("[ ns16550 (%s): write to mcr: 0x%02x ]\n", |
289 |
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d->name, (int)idata); |
290 |
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if (!(d->reg[com_iir] & IIR_TXRDY) |
291 |
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&& (idata & MCR_IENABLE)) |
292 |
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d->reg[com_iir] |= IIR_TXRDY; |
293 |
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dev_ns16550_tick(cpu, d); |
294 |
} else { |
} else { |
295 |
odata = d->reg[relative_addr]; |
odata = d->reg[com_mcr]; |
296 |
debug("[ ns16550 read from mcr: 0x%02x ]\n", odata); |
debug("[ ns16550 (%s): read from mcr: 0x%02x ]\n", |
297 |
|
d->name, (int)odata); |
298 |
} |
} |
299 |
break; |
break; |
300 |
|
|
301 |
default: |
default: |
302 |
if (writeflag==MEM_READ) { |
if (writeflag==MEM_READ) { |
303 |
debug("[ ns16550 read from reg %i ]\n", |
debug("[ ns16550 (%s): read from reg %i ]\n", |
304 |
(int)relative_addr); |
d->name, (int)relative_addr); |
305 |
odata = d->reg[relative_addr]; |
odata = d->reg[relative_addr]; |
306 |
} else { |
} else { |
307 |
debug("[ ns16550 write to reg %i:", |
debug("[ ns16550 (%s): write to reg %i:", |
308 |
(int)relative_addr); |
d->name, (int)relative_addr); |
309 |
for (i=0; i<len; i++) |
for (i=0; i<len; i++) |
310 |
debug(" %02x", data[i]); |
debug(" %02x", data[i]); |
311 |
debug(" ]\n"); |
debug(" ]\n"); |
320 |
} |
} |
321 |
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322 |
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323 |
/* |
DEVINIT(ns16550) |
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* dev_ns16550_init(): |
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*/ |
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int dev_ns16550_init(struct machine *machine, struct memory *mem, |
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uint64_t baseaddr, int irq_nr, int addrmult, int in_use, |
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char *name) |
|
324 |
{ |
{ |
325 |
struct ns_data *d; |
struct ns_data *d = malloc(sizeof(struct ns_data)); |
326 |
size_t nlen; |
size_t nlen; |
327 |
char *name2; |
char *name; |
328 |
|
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d = malloc(sizeof(struct ns_data)); |
|
329 |
if (d == NULL) { |
if (d == NULL) { |
330 |
fprintf(stderr, "out of memory\n"); |
fprintf(stderr, "out of memory\n"); |
331 |
exit(1); |
exit(1); |
332 |
} |
} |
333 |
memset(d, 0, sizeof(struct ns_data)); |
memset(d, 0, sizeof(struct ns_data)); |
334 |
d->irqnr = irq_nr; |
|
335 |
d->addrmult = addrmult; |
d->addrmult = devinit->addr_mult; |
336 |
d->in_use = in_use; |
d->in_use = devinit->in_use; |
337 |
d->dlab = 0; |
d->enable_fifo = 1; |
338 |
d->divisor = 115200 / 9600; |
d->dlab = 0; |
339 |
d->databits = 8; |
d->divisor = 115200 / 9600; |
340 |
d->parity = 'N'; |
d->databits = 8; |
341 |
d->stopbits = "1"; |
d->parity = 'N'; |
342 |
d->console_handle = console_start_slave(machine, name); |
d->stopbits = "1"; |
343 |
|
d->name = devinit->name2 != NULL? devinit->name2 : ""; |
344 |
nlen = strlen(name) + 20; |
d->console_handle = |
345 |
name2 = malloc(nlen); |
console_start_slave(devinit->machine, devinit->name2 != NULL? |
346 |
if (name2 == NULL) { |
devinit->name2 : devinit->name, d->in_use); |
347 |
fprintf(stderr, "out of memory in dev_ns16550_init()\n"); |
|
348 |
|
INTERRUPT_CONNECT(devinit->interrupt_path, d->irq); |
349 |
|
|
350 |
|
nlen = strlen(devinit->name) + 10; |
351 |
|
if (devinit->name2 != NULL) |
352 |
|
nlen += strlen(devinit->name2); |
353 |
|
name = malloc(nlen); |
354 |
|
if (name == NULL) { |
355 |
|
fprintf(stderr, "out of memory\n"); |
356 |
exit(1); |
exit(1); |
357 |
} |
} |
358 |
if (name != NULL && name[0]) |
if (devinit->name2 != NULL && devinit->name2[0]) |
359 |
snprintf(name2, nlen, "ns16550 [%s]", name); |
snprintf(name, nlen, "%s [%s]", devinit->name, devinit->name2); |
360 |
else |
else |
361 |
snprintf(name2, nlen, "ns16550"); |
snprintf(name, nlen, "%s", devinit->name); |
362 |
|
|
363 |
memory_device_register(mem, name2, baseaddr, |
memory_device_register(devinit->machine->memory, name, devinit->addr, |
364 |
DEV_NS16550_LENGTH * addrmult, dev_ns16550_access, d, |
DEV_NS16550_LENGTH * d->addrmult, dev_ns16550_access, d, |
365 |
MEM_DEFAULT, NULL); |
DM_DEFAULT, NULL); |
366 |
machine_add_tickfunction(machine, dev_ns16550_tick, |
machine_add_tickfunction(devinit->machine, |
367 |
d, NS16550_TICK_SHIFT); |
dev_ns16550_tick, d, TICK_SHIFT, 0.0); |
368 |
|
|
369 |
|
/* |
370 |
|
* NOTE: Ugly cast into a pointer, because this is a convenient way |
371 |
|
* to return the console handle to code in src/machine.c. |
372 |
|
*/ |
373 |
|
devinit->return_ptr = (void *)(size_t)d->console_handle; |
374 |
|
|
375 |
return d->console_handle; |
return 1; |
376 |
} |
} |
377 |
|
|