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/* |
/* |
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* Copyright (C) 2003-2006 Anders Gavare. All rights reserved. |
* Copyright (C) 2003-2007 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: dev_mp.c,v 1.37 2006/07/01 21:15:46 debug Exp $ |
* $Id: dev_mp.c,v 1.40 2007/01/28 13:45:46 debug Exp $ |
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* |
* |
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* This is a fake multiprocessor (MP) device. It can be useful for |
* This is a fake multiprocessor (MP) device. It can be useful for |
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* theoretical experiments, but probably bares no resemblance to any |
* theoretical experiments, but probably bares no resemblance to any |
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* multiprocessor controller used in any real machine. |
* multiprocessor controller used in any real machine. |
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* |
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* NOTE: The devinit irq string should be the part _after_ "cpu[%i].". |
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* For MIPS, it will be MIPS_IPI_INT. |
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*/ |
*/ |
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#include <stdio.h> |
#include <stdio.h> |
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#include <string.h> |
#include <string.h> |
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#include "cpu.h" |
#include "cpu.h" |
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#include "cpu_mips.h" |
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#include "device.h" |
#include "device.h" |
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#include "machine.h" |
#include "machine.h" |
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#include "interrupt.h" |
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#include "memory.h" |
#include "memory.h" |
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#include "misc.h" |
#include "misc.h" |
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/* Each CPU has an array of pending ipis. */ |
/* Each CPU has an array of pending ipis. */ |
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int *n_pending_ipis; |
int *n_pending_ipis; |
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int **ipi; |
int **ipi; |
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/* Connections to all CPUs' IPI pins: */ |
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struct interrupt *ipi_irq; |
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}; |
}; |
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extern int single_step; |
extern int single_step; |
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/* |
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* dev_mp_access(): |
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*/ |
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DEVICE_ACCESS(mp) |
DEVICE_ACCESS(mp) |
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{ |
{ |
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struct mp_data *d = extra; |
struct mp_data *d = extra; |
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fprintf(stderr, "out of memory\n"); |
fprintf(stderr, "out of memory\n"); |
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exit(1); |
exit(1); |
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} |
} |
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/* Add the IPI last in the array: */ |
/* Add the IPI last in the array: */ |
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d->ipi[i][d->n_pending_ipis[i] - 1] = |
d->ipi[i][d->n_pending_ipis[i] - 1] = |
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idata >> 16; |
idata >> 16; |
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cpu_interrupt(d->cpus[i], MIPS_IPI_INT); |
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INTERRUPT_ASSERT(d->ipi_irq[i]); |
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} |
} |
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} |
} |
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break; |
break; |
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&d->ipi[cpu->cpu_id][1], |
&d->ipi[cpu->cpu_id][1], |
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d->n_pending_ipis[cpu->cpu_id]); |
d->n_pending_ipis[cpu->cpu_id]); |
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} |
} |
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/* Deassert the interrupt, if there are no pending IPIs: */ |
/* Deassert the interrupt, if there are no pending IPIs: */ |
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if (d->n_pending_ipis[cpu->cpu_id] == 0) |
if (d->n_pending_ipis[cpu->cpu_id] == 0) |
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cpu_interrupt_ack(d->cpus[cpu->cpu_id], MIPS_IPI_INT); |
INTERRUPT_DEASSERT(d->ipi_irq[cpu->cpu_id]); |
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break; |
break; |
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case DEV_MP_NCYCLES: |
case DEV_MP_NCYCLES: |
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DEVINIT(mp) |
DEVINIT(mp) |
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{ |
{ |
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struct mp_data *d; |
struct mp_data *d; |
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int n; |
int n, i; |
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d = malloc(sizeof(struct mp_data)); |
d = malloc(sizeof(struct mp_data)); |
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if (d == NULL) { |
if (d == NULL) { |
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d->stack_addr = INITIAL_STACK_POINTER; |
d->stack_addr = INITIAL_STACK_POINTER; |
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n = devinit->machine->ncpus; |
n = devinit->machine->ncpus; |
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/* Connect to all CPUs' IPI pins: */ |
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d->ipi_irq = malloc(n * sizeof(struct interrupt)); |
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if (d->ipi_irq == NULL) { |
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fprintf(stderr, "out of memory\n"); |
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exit(1); |
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} |
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for (i=0; i<n; i++) { |
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char tmpstr[200]; |
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snprintf(tmpstr, sizeof(tmpstr), "%s.cpu[%i].%s", |
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devinit->machine->path, i, devinit->interrupt_path); |
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INTERRUPT_CONNECT(tmpstr, d->ipi_irq[i]); |
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} |
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d->n_pending_ipis = malloc(n * sizeof(int)); |
d->n_pending_ipis = malloc(n * sizeof(int)); |
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d->ipi = malloc(n * sizeof(int *)); |
d->ipi = malloc(n * sizeof(int *)); |
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if (d->ipi == NULL || d->n_pending_ipis == NULL) { |
if (d->ipi == NULL || d->n_pending_ipis == NULL) { |