25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: dev_gt.c,v 1.21 2005/03/18 23:20:52 debug Exp $ |
* $Id: dev_gt.c,v 1.22 2005/06/20 08:19:58 debug Exp $ |
29 |
* |
* |
30 |
* The "gt" device used in Cobalt machines. |
* Galileo Technology GT-64xxx PCI controller. |
31 |
|
* |
32 |
|
* GT-64011 Used in Cobalt machines. |
33 |
|
* GT-64120 Used in evbmips machines (Malta). |
34 |
* |
* |
35 |
* TODO: This more or less just a dummy device, so far. |
* TODO: This more or less just a dummy device, so far. |
36 |
*/ |
*/ |
51 |
|
|
52 |
#define PCI_VENDOR_GALILEO 0x11ab /* Galileo Technology */ |
#define PCI_VENDOR_GALILEO 0x11ab /* Galileo Technology */ |
53 |
#define PCI_PRODUCT_GALILEO_GT64011 0x4146 /* GT-64011 System Controller */ |
#define PCI_PRODUCT_GALILEO_GT64011 0x4146 /* GT-64011 System Controller */ |
54 |
|
#define PCI_PRODUCT_GALILEO_GT64120 0x4620 /* GT-64120 */ |
55 |
|
|
56 |
struct gt_data { |
struct gt_data { |
57 |
int reg[8]; |
int reg[8]; |
58 |
int irqnr; |
int irqnr; |
59 |
int pciirq; |
int pciirq; |
60 |
|
int type; |
61 |
|
|
62 |
struct pci_data *pci_data; |
struct pci_data *pci_data; |
63 |
}; |
}; |
136 |
|
|
137 |
|
|
138 |
/* |
/* |
139 |
* pci_gt_rr(): |
* pci_gt_rr_011(): |
140 |
*/ |
*/ |
141 |
uint32_t pci_gt_rr(int reg) |
static uint32_t pci_gt_rr_011(int reg) |
142 |
{ |
{ |
143 |
switch (reg) { |
switch (reg) { |
144 |
case 0x00: |
case 0x00: |
145 |
return PCI_VENDOR_GALILEO + (PCI_PRODUCT_GALILEO_GT64011 << 16); |
return PCI_VENDOR_GALILEO + (PCI_PRODUCT_GALILEO_GT64011 << 16); |
146 |
case 0x08: |
case 0x08: |
147 |
return 0x01; /* Revision 1 */ |
return 0x06000001; /* Revision 1 */ |
148 |
|
default: |
149 |
|
return 0; |
150 |
|
} |
151 |
|
} |
152 |
|
|
153 |
|
|
154 |
|
/* |
155 |
|
* pci_gt_rr_120(): |
156 |
|
*/ |
157 |
|
static uint32_t pci_gt_rr_120(int reg) |
158 |
|
{ |
159 |
|
switch (reg) { |
160 |
|
case 0x00: |
161 |
|
return PCI_VENDOR_GALILEO + (PCI_PRODUCT_GALILEO_GT64120 << 16); |
162 |
|
case 0x08: |
163 |
|
return 0x06000002; /* Revision 2? */ |
164 |
default: |
default: |
165 |
return 0; |
return 0; |
166 |
} |
} |
183 |
* itself. |
* itself. |
184 |
*/ |
*/ |
185 |
struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem, |
struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem, |
186 |
uint64_t baseaddr, int irq_nr, int pciirq) |
uint64_t baseaddr, int irq_nr, int pciirq, int type) |
187 |
{ |
{ |
188 |
struct gt_data *d; |
struct gt_data *d; |
189 |
|
|
197 |
d->pciirq = pciirq; |
d->pciirq = pciirq; |
198 |
d->pci_data = bus_pci_init(pciirq); |
d->pci_data = bus_pci_init(pciirq); |
199 |
|
|
200 |
|
switch (type) { |
201 |
|
case 11: |
202 |
|
d->type = PCI_PRODUCT_GALILEO_GT64011; |
203 |
|
break; |
204 |
|
case 120: |
205 |
|
d->type = PCI_PRODUCT_GALILEO_GT64120; |
206 |
|
break; |
207 |
|
default:fatal("dev_gt_init(): type must be 11 or 120.\n"); |
208 |
|
exit(1); |
209 |
|
} |
210 |
|
|
211 |
/* |
/* |
212 |
* According to NetBSD/cobalt: |
* According to NetBSD/cobalt: |
213 |
* pchb0 at pci0 dev 0 function 0: Galileo GT-64011 |
* pchb0 at pci0 dev 0 function 0: Galileo GT-64011 |
214 |
* System Controller, rev 1 |
* System Controller, rev 1 |
215 |
*/ |
*/ |
216 |
bus_pci_add(machine, d->pci_data, mem, 0, 0, 0, pci_gt_init, pci_gt_rr); |
bus_pci_add(machine, d->pci_data, mem, 0, 0, 0, pci_gt_init, |
217 |
|
d->type == PCI_PRODUCT_GALILEO_GT64011? |
218 |
|
pci_gt_rr_011 : pci_gt_rr_120); |
219 |
|
|
220 |
memory_device_register(mem, "gt", baseaddr, DEV_GT_LENGTH, |
memory_device_register(mem, "gt", baseaddr, DEV_GT_LENGTH, |
221 |
dev_gt_access, d, MEM_DEFAULT, NULL); |
dev_gt_access, d, MEM_DEFAULT, NULL); |