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/* |
/* |
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* Copyright (C) 2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: dev_footbridge.c,v 1.36 2005/11/21 09:17:26 debug Exp $ |
* $Id: dev_footbridge.c,v 1.42 2006/02/09 20:02:59 debug Exp $ |
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* |
* |
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* Footbridge. Used in Netwinder and Cats. |
* Footbridge. Used in Netwinder and Cats. |
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* |
* |
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* TODO: |
* TODO: |
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* o) Add actual support for the fcom serial port. |
* o) Add actual support for the fcom serial port. |
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* o) FIQs. |
* o) FIQs. |
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* o) Pretty much everything else as well :) (This entire thing |
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* is a quick hack to work primarily with NetBSD and OpenBSD |
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* as a guest OS.) |
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*/ |
*/ |
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#include <stdio.h> |
#include <stdio.h> |
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#include "console.h" |
#include "console.h" |
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#include "cpu.h" |
#include "cpu.h" |
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#include "device.h" |
#include "device.h" |
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#include "devices.h" /* for struct footbridge_data */ |
#include "devices.h" |
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#include "machine.h" |
#include "machine.h" |
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#include "memory.h" |
#include "memory.h" |
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#include "misc.h" |
#include "misc.h" |
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d->timer_poll_mode = 0; |
d->timer_poll_mode = 0; |
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for (i=0; i<N_FOOTBRIDGE_TIMERS; i++) { |
for (i=0; i<N_FOOTBRIDGE_TIMERS; i++) { |
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int amount = 1 << DEV_FOOTBRIDGE_TICK_SHIFT; |
unsigned int amount = 1 << DEV_FOOTBRIDGE_TICK_SHIFT; |
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if (d->timer_control[i] & TIMER_FCLK_16) |
if (d->timer_control[i] & TIMER_FCLK_16) |
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amount >>= 4; |
amount >>= 4; |
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else if (d->timer_control[i] & TIMER_FCLK_256) |
else if (d->timer_control[i] & TIMER_FCLK_256) |
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* interrupt has occurred (and acknowledging it at the same time), than |
* interrupt has occurred (and acknowledging it at the same time), than |
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* dealing with the legacy 0x20/0xa0 ISA ports. |
* dealing with the legacy 0x20/0xa0 ISA ports. |
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*/ |
*/ |
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int dev_footbridge_isa_access(struct cpu *cpu, struct memory *mem, |
DEVICE_ACCESS(footbridge_isa) |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
{ |
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/* struct footbridge_data *d = extra; */ |
/* struct footbridge_data *d = extra; */ |
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uint64_t idata = 0, odata = 0; |
uint64_t idata = 0, odata = 0; |
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/* |
/* |
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* dev_footbridge_pci_access(): |
* dev_footbridge_pci_access(): |
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* |
* |
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* The Footbridge PCI configuration space is not implemented as "address + |
* The Footbridge PCI configuration space is implemented as a direct memory |
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* data port" pair, but instead a 24-bit (16 MB) chunk of physical memory |
* space (i.e. not one port for addr and one port for data). This function |
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* decodes as the address. This function translates that into bus_pci_access |
* translates that into bus_pci calls. |
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* calls. |
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*/ |
*/ |
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int dev_footbridge_pci_access(struct cpu *cpu, struct memory *mem, |
DEVICE_ACCESS(footbridge_pci) |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
{ |
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struct footbridge_data *d = extra; |
struct footbridge_data *d = extra; |
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uint64_t idata = 0, odata = 0; |
uint64_t idata = 0, odata = 0; |
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int bus, device, function, regnr, res; |
int bus, dev, func, reg; |
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uint64_t pci_word; |
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if (writeflag == MEM_WRITE) |
if (writeflag == MEM_WRITE) |
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idata = memory_readmax64(cpu, data, len); |
idata = memory_readmax64(cpu, data, len|MEM_PCI_LITTLE_ENDIAN); |
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bus = (relative_addr >> 16) & 0xff; |
/* Decompose the (direct) address into its components: */ |
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device = (relative_addr >> 11) & 0x1f; |
bus_pci_decompose_1(relative_addr, &bus, &dev, &func, ®); |
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function = (relative_addr >> 8) & 0x7; |
bus_pci_setaddr(cpu, d->pcibus, bus, dev, func, reg); |
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regnr = relative_addr & 0xff; |
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if (bus == 255) { |
if (bus == 255) { |
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fatal("[ footbridge DEBUG ERROR: bus 255 unlikely," |
fatal("[ footbridge DEBUG ERROR: bus 255 unlikely," |
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exit(1); |
exit(1); |
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} |
} |
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debug("[ footbridge_pci: %s bus %i, device %i, function " |
debug("[ footbridge pci: %s bus %i, device %i, function %i, register " |
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"%i, register %i ]\n", writeflag == MEM_READ? "read from" |
"%i ]\n", writeflag == MEM_READ? "read from" : "write to", bus, |
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: "write to", bus, device, function, regnr); |
dev, func, reg); |
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if (d->pcibus == NULL) { |
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fatal("dev_footbridge_pci_access(): no PCI bus?\n"); |
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return 0; |
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} |
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pci_word = relative_addr & 0x00ffffff; |
bus_pci_data_access(cpu, d->pcibus, writeflag == MEM_READ? |
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&odata : &idata, len, writeflag); |
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res = bus_pci_access(cpu, mem, BUS_PCI_ADDR, |
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&pci_word, sizeof(uint32_t), MEM_WRITE, d->pcibus); |
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if (writeflag == MEM_READ) { |
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res = bus_pci_access(cpu, mem, BUS_PCI_DATA, |
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&pci_word, len, MEM_READ, d->pcibus); |
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odata = pci_word; |
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} else { |
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pci_word = idata; |
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res = bus_pci_access(cpu, mem, BUS_PCI_DATA, |
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&pci_word, len, MEM_WRITE, d->pcibus); |
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} |
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if (writeflag == MEM_READ) |
if (writeflag == MEM_READ) |
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memory_writemax64(cpu, data, len, odata); |
memory_writemax64(cpu, data, len|MEM_PCI_LITTLE_ENDIAN, odata); |
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return 1; |
return 1; |
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} |
} |
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* |
* |
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* The DC21285 registers. |
* The DC21285 registers. |
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*/ |
*/ |
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int dev_footbridge_access(struct cpu *cpu, struct memory *mem, |
DEVICE_ACCESS(footbridge) |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
{ |
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struct footbridge_data *d = extra; |
struct footbridge_data *d = extra; |
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uint64_t idata = 0, odata = 0; |
uint64_t idata = 0, odata = 0; |
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"EXTENSION: 0x%llx ]\n", (long long)idata); |
"EXTENSION: 0x%llx ]\n", (long long)idata); |
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break; |
break; |
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case SA_CONTROL: |
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/* Read by Linux: */ |
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odata = PCI_CENTRAL_FUNCTION; |
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break; |
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case UART_DATA: |
case UART_DATA: |
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if (writeflag == MEM_WRITE) |
if (writeflag == MEM_WRITE) |
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console_putchar(d->console_handle, idata); |
console_putchar(d->console_handle, idata); |
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} |
} |
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/* |
DEVINIT(footbridge) |
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* devinit_footbridge(): |
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*/ |
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int devinit_footbridge(struct devinit *devinit) |
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{ |
{ |
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struct footbridge_data *d; |
struct footbridge_data *d; |
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uint64_t pci_addr = 0x7b000000; |
uint64_t pci_addr = 0x7b000000; |
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0x79000000, 8, dev_footbridge_isa_access, d, DM_DEFAULT, NULL); |
0x79000000, 8, dev_footbridge_isa_access, d, DM_DEFAULT, NULL); |
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/* The "fcom" console: */ |
/* The "fcom" console: */ |
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d->console_handle = console_start_slave(devinit->machine, "fcom"); |
d->console_handle = console_start_slave(devinit->machine, "fcom", 0); |
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/* A PCI bus: */ |
/* A PCI bus: */ |
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d->pcibus = bus_pci_init( |
d->pcibus = bus_pci_init( |
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devinit->machine, |
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devinit->irq_nr, /* PCI controller irq */ |
devinit->irq_nr, /* PCI controller irq */ |
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0x7c000000, /* PCI device io offset */ |
0x7c000000, /* PCI device io offset */ |
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0x80000000, /* PCI device mem offset */ |
0x80000000, /* PCI device mem offset */ |