/[gxemul]/trunk/src/devices/dev_eagle.c
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revision 21 by dpavlin, Mon Oct 8 16:19:23 2007 UTC revision 22 by dpavlin, Mon Oct 8 16:19:37 2007 UTC
# Line 1  Line 1 
1  /*  /*
2   *  Copyright (C) 2003-2005  Anders Gavare.  All rights reserved.   *  Copyright (C) 2003-2006  Anders Gavare.  All rights reserved.
3   *   *
4   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
5   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *     *  
27   *   *
28   *  $Id: dev_eagle.c,v 1.3 2005/11/21 09:17:26 debug Exp $   *  $Id: dev_eagle.c,v 1.9 2006/01/16 00:51:14 debug Exp $
29   *     *  
30   *  Motorola MPC105 "Eagle" host bridge.   *  Motorola MPC105 "Eagle" host bridge.
  *  
  *  TODO: This is just a dummy.  
31   */   */
32    
33  #include <stdio.h>  #include <stdio.h>
# Line 53  struct eagle_data { Line 51  struct eagle_data {
51  /*  /*
52   *  dev_eagle_access():   *  dev_eagle_access():
53   *   *
54   *  Passes accesses to ISA ports 0xcf8 and 0xcfc onto bus_pci_access().   *  Passes accesses to ISA ports 0xcf8 and 0xcfc onto bus_pci.
55   */   */
56  int dev_eagle_access(struct cpu *cpu, struct memory *mem,  DEVICE_ACCESS(eagle)
         uint64_t relative_addr, unsigned char *data, size_t len,  
         int writeflag, void *extra)  
57  {  {
58          uint64_t idata = 0, odata = 0;          uint64_t idata = 0, odata = 0;
59          struct eagle_data *d = extra;          struct eagle_data *d = extra;
60            int bus, dev, func, reg;
61    
62          if (writeflag == MEM_WRITE)          if (writeflag == MEM_WRITE)
63                  idata = memory_readmax64(cpu, data, len);                  idata = memory_readmax64(cpu, data, len|MEM_PCI_LITTLE_ENDIAN);
64    
65          relative_addr += BUS_PCI_ADDR;          switch (relative_addr) {
66            case 0: /*  Address:  */
67                    bus_pci_decompose_1(idata, &bus, &dev, &func, &reg);
68                    bus_pci_setaddr(cpu, d->pci_data, bus, dev, func, reg);
69                    break;
70    
71          if (writeflag == MEM_WRITE)          case 4: /*  Data:  */
72                  bus_pci_access(cpu, mem, relative_addr, &idata,                  bus_pci_data_access(cpu, d->pci_data, writeflag == MEM_READ?
73                      len, writeflag, d->pci_data);                      &odata : &idata, len, writeflag);
74          else                  break;
75                  bus_pci_access(cpu, mem, relative_addr, &odata,          }
                     len, writeflag, d->pci_data);  
76    
77          if (writeflag == MEM_READ)          if (writeflag == MEM_READ)
78                  memory_writemax64(cpu, data, len, odata);                  memory_writemax64(cpu, data, len|MEM_PCI_LITTLE_ENDIAN, odata);
79    
80          return 1;          return 1;
81  }  }
# Line 108  struct pci_data *dev_eagle_init(struct m Line 108  struct pci_data *dev_eagle_init(struct m
108          isa_portbase   = 0x80000000ULL;          isa_portbase   = 0x80000000ULL;
109          isa_membase    = 0xc0000000ULL;          isa_membase    = 0xc0000000ULL;
110    
111          d->pci_data = bus_pci_init(pciirq,          /*  Create a PCI bus:  */
112            d->pci_data = bus_pci_init(machine, pciirq,
113              pci_io_offset, pci_mem_offset,              pci_io_offset, pci_mem_offset,
114              pci_portbase, pci_membase, pci_irqbase,              pci_portbase, pci_membase, pci_irqbase,
115              isa_portbase, isa_membase, isa_irqbase);              isa_portbase, isa_membase, isa_irqbase);
# Line 127  struct pci_data *dev_eagle_init(struct m Line 128  struct pci_data *dev_eagle_init(struct m
128          case MACHINE_PREP:          case MACHINE_PREP:
129                  bus_pci_add(machine, d->pci_data, mem, 0, 11, 0, "ibm_isa");                  bus_pci_add(machine, d->pci_data, mem, 0, 11, 0, "ibm_isa");
130                  break;                  break;
131            case MACHINE_MVMEPPC:
132                    switch (machine->machine_subtype) {
133                    case MACHINE_MVMEPPC_1600:
134                            bus_pci_add(machine, d->pci_data, mem, 0, 11, 0,
135                                "i82378zb");
136                            break;
137                    default:fatal("unimplemented machine subtype for "
138                                "eagle/mvmeppc\n");
139                            exit(1);
140                    }
141                    break;
142            default:fatal("unimplemented machine type for eagle\n");
143                    exit(1);
144          }          }
145    
146          return d->pci_data;          return d->pci_data;

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