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/* |
/* |
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* Copyright (C) 2006 Anders Gavare. All rights reserved. |
* Copyright (C) 2006-2007 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: dev_dreamcast_asic.c,v 1.4 2006/10/28 01:37:54 debug Exp $ |
* $Id: dev_dreamcast_asic.c,v 1.7 2007/02/03 20:14:23 debug Exp $ |
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* |
* |
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* Dreamcast ASIC. |
* Dreamcast ASIC. |
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* |
* |
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#include "cpu.h" |
#include "cpu.h" |
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#include "device.h" |
#include "device.h" |
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#include "devices.h" |
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#include "machine.h" |
#include "machine.h" |
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#include "memory.h" |
#include "memory.h" |
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#include "misc.h" |
#include "misc.h" |
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int asserted_13; |
int asserted_13; |
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int asserted_11; |
int asserted_11; |
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int asserted_9; |
int asserted_9; |
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struct interrupt irq_13; |
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struct interrupt irq_11; |
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struct interrupt irq_9; |
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}; |
}; |
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if (d->asserted_13 != old_asserted_13) { |
if (d->asserted_13 != old_asserted_13) { |
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if (d->asserted_13) |
if (d->asserted_13) |
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cpu_interrupt(cpu, SH_INTEVT_IRL13); |
INTERRUPT_ASSERT(d->irq_13); |
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else |
else |
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cpu_interrupt_ack(cpu, SH_INTEVT_IRL13); |
INTERRUPT_DEASSERT(d->irq_13); |
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} |
} |
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if (d->asserted_11 != old_asserted_11) { |
if (d->asserted_11 != old_asserted_11) { |
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if (d->asserted_11) |
if (d->asserted_11) |
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cpu_interrupt(cpu, SH_INTEVT_IRL11); |
INTERRUPT_ASSERT(d->irq_11); |
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else |
else |
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cpu_interrupt_ack(cpu, SH_INTEVT_IRL11); |
INTERRUPT_DEASSERT(d->irq_11); |
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} |
} |
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if (d->asserted_9 != old_asserted_9) { |
if (d->asserted_9 != old_asserted_9) { |
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if (d->asserted_9) |
if (d->asserted_9) |
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cpu_interrupt(cpu, SH_INTEVT_IRL9); |
INTERRUPT_ASSERT(d->irq_9); |
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else |
else |
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cpu_interrupt_ack(cpu, SH_INTEVT_IRL9); |
INTERRUPT_DEASSERT(d->irq_9); |
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} |
} |
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} |
} |
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DEVINIT(dreamcast_asic) |
DEVINIT(dreamcast_asic) |
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{ |
{ |
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char tmpstr[300]; |
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struct machine *machine = devinit->machine; |
struct machine *machine = devinit->machine; |
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struct dreamcast_asic_data *d = |
struct dreamcast_asic_data *d = |
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malloc(sizeof(struct dreamcast_asic_data)); |
malloc(sizeof(struct dreamcast_asic_data)); |
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fprintf(stderr, "out of memory\n"); |
fprintf(stderr, "out of memory\n"); |
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exit(1); |
exit(1); |
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} |
} |
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memset(d, 0, sizeof(struct dreamcast_asic_data)); |
memset(d, 0, sizeof(struct dreamcast_asic_data)); |
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/* Connect to SH4 interrupt levels 13, 11, and 9: */ |
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snprintf(tmpstr, sizeof(tmpstr), "%s.irq[0x%x]", |
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devinit->interrupt_path, SH_INTEVT_IRL13); |
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INTERRUPT_CONNECT(tmpstr, d->irq_13); |
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snprintf(tmpstr, sizeof(tmpstr), "%s.irq[0x%x]", |
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devinit->interrupt_path, SH_INTEVT_IRL11); |
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INTERRUPT_CONNECT(tmpstr, d->irq_11); |
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snprintf(tmpstr, sizeof(tmpstr), "%s.irq[0x%x]", |
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devinit->interrupt_path, SH_INTEVT_IRL9); |
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INTERRUPT_CONNECT(tmpstr, d->irq_9); |
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memory_device_register(machine->memory, devinit->name, SYSASIC_BASE, |
memory_device_register(machine->memory, devinit->name, SYSASIC_BASE, |
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SYSASIC_SIZE, dev_dreamcast_asic_access, d, DM_DEFAULT, NULL); |
SYSASIC_SIZE, dev_dreamcast_asic_access, d, DM_DEFAULT, NULL); |
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