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/* |
/* |
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* Copyright (C) 2004-2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2004-2006 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: dev_dec_ioasic.c,v 1.14 2005/11/13 00:14:08 debug Exp $ |
* $Id: dev_dec_ioasic.c,v 1.15 2006/01/01 13:17:16 debug Exp $ |
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* |
* |
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* DECstation "3MIN" and "3MAX" IOASIC device. |
* DECstation "3MIN" and "3MAX" IOASIC device. |
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* |
* |
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/* |
/* |
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* dev_dec_ioasic_access(): |
* dev_dec_ioasic_access(): |
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*/ |
*/ |
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int dev_dec_ioasic_access(struct cpu *cpu, struct memory *mem, |
DEVICE_ACCESS(dec_ioasic) |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
{ |
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struct dec_ioasic_data *d = (struct dec_ioasic_data *) extra; |
struct dec_ioasic_data *d = (struct dec_ioasic_data *) extra; |
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uint64_t idata = 0, odata = 0; |
uint64_t idata = 0, odata = 0; |