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/* |
/* |
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* Copyright (C) 2003-2006 Anders Gavare. All rights reserved. |
* Copyright (C) 2003-2007 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: dev_asc.c,v 1.80 2006/03/04 12:38:47 debug Exp $ |
* $Id: dev_asc.c,v 1.86 2007/06/15 18:44:19 debug Exp $ |
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* |
* |
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* 'asc' SCSI controller for some DECstation/DECsystem models and PICA-61. |
* COMMENT: NCR53C9X "ASC" SCSI controller |
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* |
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* This is the SCSI controller used in some DECstation/DECsystem models and |
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* the PICA-61 machine. |
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* |
* |
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* Supposed to support SCSI-1 and SCSI-2. I've not yet found any docs |
* Supposed to support SCSI-1 and SCSI-2. I've not yet found any docs |
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* on NCR53C9X, so I'll try to implement this device from LSI53CF92A docs |
* on NCR53C9X, so I'll try to implement this device from LSI53CF92A docs |
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int mode; |
int mode; |
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void *turbochannel; |
void *turbochannel; |
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int irq_nr; |
struct interrupt irq; |
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int irq_caused_last_time; |
int irq_asserted; |
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/* Current state and transfer: */ |
/* Current state and transfer: */ |
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int cur_state; |
int cur_state; |
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int to_id, int dmaflag, int n_messagebytes); |
int to_id, int dmaflag, int n_messagebytes); |
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/* |
DEVICE_TICK(asc) |
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* dev_asc_tick(): |
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* |
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* This function is called "every now and then" from the CPU |
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* main loop. |
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*/ |
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void dev_asc_tick(struct cpu *cpu, void *extra) |
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{ |
{ |
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struct asc_data *d = extra; |
struct asc_data *d = extra; |
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int new_assert = d->reg_ro[NCR_STAT] & NCRSTAT_INT; |
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if (new_assert && !d->irq_asserted) |
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INTERRUPT_ASSERT(d->irq); |
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if (d->reg_ro[NCR_STAT] & NCRSTAT_INT) |
d->irq_asserted = new_assert; |
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cpu_interrupt(cpu, d->irq_nr); |
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} |
} |
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(int)len, (int)len2); */ |
(int)len, (int)len2); */ |
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d->xferp->data_in_len -= len2; |
d->xferp->data_in_len -= len2; |
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n = malloc(d->xferp->data_in_len); |
CHECK_ALLOCATION(n = |
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if (n == NULL) { |
malloc(d->xferp->data_in_len)); |
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fprintf(stderr, "out of memory" |
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" in dev_asc\n"); |
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exit(1); |
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} |
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memcpy(n, d->xferp->data_in + len2, |
memcpy(n, d->xferp->data_in + len2, |
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d->xferp->data_in_len); |
d->xferp->data_in_len); |
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free(d->xferp->data_in); |
free(d->xferp->data_in); |
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} |
} |
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newlen = oldlen + d->n_bytes_in_fifo; |
newlen = oldlen + d->n_bytes_in_fifo; |
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d->xferp->msg_out = realloc(d->xferp->msg_out, newlen); |
CHECK_ALLOCATION(d->xferp->msg_out = |
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realloc(d->xferp->msg_out, newlen)); |
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d->xferp->msg_out_len = newlen; |
d->xferp->msg_out_len = newlen; |
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if (d->xferp->msg_out == NULL) { |
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fprintf(stderr, "out of memory realloc'ing " |
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"msg_out\n"); |
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exit(1); |
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} |
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i = oldlen; |
i = oldlen; |
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while (d->fifo_in != d->fifo_out) { |
while (d->fifo_in != d->fifo_out) { |
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} |
} |
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/* |
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* dev_asc_address_reg_access(): |
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*/ |
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DEVICE_ACCESS(asc_address_reg) |
DEVICE_ACCESS(asc_address_reg) |
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{ |
{ |
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struct asc_data *d = extra; |
struct asc_data *d = extra; |
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} |
} |
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/* |
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* dev_asc_dma_access(): |
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*/ |
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DEVICE_ACCESS(asc_dma) |
DEVICE_ACCESS(asc_dma) |
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{ |
{ |
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struct asc_data *d = extra; |
struct asc_data *d = extra; |
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} |
} |
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/* |
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* dev_asc_access(): |
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*/ |
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DEVICE_ACCESS(asc) |
DEVICE_ACCESS(asc) |
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{ |
{ |
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int regnr; |
int regnr; |
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d->reg_ro[NCR_STAT] = PHASE_COMMAND; |
d->reg_ro[NCR_STAT] = PHASE_COMMAND; |
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} |
} |
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cpu_interrupt_ack(cpu, d->irq_nr); |
INTERRUPT_DEASSERT(d->irq); |
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d->irq_asserted = 0; |
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} |
} |
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if (regnr == NCR_CFG1) { |
if (regnr == NCR_CFG1) { |
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* Register an 'asc' device. |
* Register an 'asc' device. |
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*/ |
*/ |
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void dev_asc_init(struct machine *machine, struct memory *mem, |
void dev_asc_init(struct machine *machine, struct memory *mem, |
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uint64_t baseaddr, int irq_nr, void *turbochannel, |
uint64_t baseaddr, char *irq_path, void *turbochannel, int mode, |
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int mode, |
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size_t (*dma_controller)(void *dma_controller_data, |
size_t (*dma_controller)(void *dma_controller_data, |
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unsigned char *data, size_t len, int writeflag), |
unsigned char *data, size_t len, int writeflag), |
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void *dma_controller_data) |
void *dma_controller_data) |
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{ |
{ |
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struct asc_data *d; |
struct asc_data *d; |
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d = malloc(sizeof(struct asc_data)); |
CHECK_ALLOCATION(d = malloc(sizeof(struct asc_data))); |
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if (d == NULL) { |
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fprintf(stderr, "out of memory\n"); |
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exit(1); |
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} |
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memset(d, 0, sizeof(struct asc_data)); |
memset(d, 0, sizeof(struct asc_data)); |
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d->irq_nr = irq_nr; |
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INTERRUPT_CONNECT(irq_path, d->irq); |
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d->turbochannel = turbochannel; |
d->turbochannel = turbochannel; |
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d->mode = mode; |
d->mode = mode; |
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d->reg_ro[NCR_CFG3] = NCRF9XCFG3_CDB; |
d->reg_ro[NCR_CFG3] = NCRF9XCFG3_CDB; |
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d->dma_address_reg_memory = malloc(machine->arch_pagesize); |
CHECK_ALLOCATION(d->dma_address_reg_memory = |
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d->dma = malloc(ASC_DMA_SIZE); |
malloc(machine->arch_pagesize)); |
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if (d->dma == NULL || d->dma_address_reg_memory == NULL) { |
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fprintf(stderr, "out of memory\n"); |
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exit(1); |
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} |
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memset(d->dma_address_reg_memory, 0, machine->arch_pagesize); |
memset(d->dma_address_reg_memory, 0, machine->arch_pagesize); |
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CHECK_ALLOCATION(d->dma = malloc(ASC_DMA_SIZE)); |
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memset(d->dma, 0, ASC_DMA_SIZE); |
memset(d->dma, 0, ASC_DMA_SIZE); |
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d->dma_controller = dma_controller; |
d->dma_controller = dma_controller; |
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DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK, d->dma); |
DM_DYNTRANS_OK | DM_DYNTRANS_WRITE_OK, d->dma); |
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} |
} |
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machine_add_tickfunction(machine, dev_asc_tick, d, ASC_TICK_SHIFT, 0.0); |
machine_add_tickfunction(machine, dev_asc_tick, d, ASC_TICK_SHIFT); |
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} |
} |
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