/[gxemul]/trunk/src/cpus/cpu_alpha_palcode.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Contents of /trunk/src/cpus/cpu_alpha_palcode.c

Parent Directory Parent Directory | Revision Log Revision Log


Revision 22 - (show annotations)
Mon Oct 8 16:19:37 2007 UTC (16 years, 5 months ago) by dpavlin
File MIME type: text/plain
File size: 6976 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1121 2006/02/18 21:03:08 debug Exp $
20051126	Cobalt and PReP now work with the 21143 NIC.
		Continuing on Alpha dyntrans things.
		Fixing some more left-shift-by-24 to unsigned.
20051127	Working on OpenFirmware emulation; major cleanup/redesign.
		Progress on MacPPC emulation: NetBSD detects two CPUs (when
		running with -n 2), framebuffer output (for text) works.
		Adding quick-hack Bandit PCI controller and "gc" interrupt
		controller for MacPPC.
20051128	Changing from a Bandit to a Uni-North controller for macppc.
		Continuing on OpenFirmware and MacPPC emulation in general
		(obio controller, and wdc attached to the obio seems to work).
20051129	More work on MacPPC emulation (adding a dummy ADB controller).
		Continuing the PCI bus cleanup (endianness and tag composition)
		and rewriting all PCI controllers' access functions.
20051130	Various minor PPC dyntrans optimizations.
		Manually inlining some parts of the framebuffer redraw routine.
		Slowly beginning the conversion of the old MIPS emulation into
		dyntrans (but this will take quite some time to get right).
		Generalizing quick_pc_to_pointers.
20051201	Documentation update (David Muse has made available a kernel
		which simplifies Debian/DECstation installation).
		Continuing on the ADB bus controller.
20051202	Beginning a rewrite of the Zilog serial controller (dev_zs).
20051203	Continuing on the zs rewrite (now called dev_z8530); conversion
		to devinit style.
		Reworking some of the input-only vs output-only vs input-output
		details of src/console.c, better warning messages, and adding
		a debug dump.
		Removing the concept of "device state"; it wasn't really used.
		Changing some debug output (-vv should now be used to show all
		details about devices and busses; not shown during normal
		startup anymore).
		Beginning on some SPARC instruction disassembly support.
20051204	Minor PPC updates (WALNUT skeleton stuff).
		Continuing on the MIPS dyntrans rewrite.
		More progress on the ADB controller (a keyboard is "detected"
		by NetBSD and OpenBSD).
		Downgrading OpenBSD/arc as a guest OS from "working" to
		"almost working" in the documentation.
		Progress on Algor emulation ("v3" PCI controller).
20051205	Minor updates.
20051207	Sorting devices according to address; this reduces complexity
		of device lookups from O(n) to O(log n) in memory_rw (but no
		real performance increase (yet) in experiments).
20051210	Beginning the work on native dyntrans backends (by making a
		simple skeleton; so far only for Alpha hosts).
20051211	Some very minor SPARC updates.
20051215	Fixing a bug in the MIPS mul (note: not mult) instruction,
		so it also works with non-64-bit emulation. (Thanks to Alec
		Voropay for noticing the problem.)
20051216	More work on the fake/empty/simple/skeleton/whatever backend;
		performance doesn't increase, so this isn't really worth it,
		but it was probably worth it to prepare for a real backend
		later.
20051219	More instr call statistics gathering and analysis stuff.
20051220	Another fix for MIPS 'mul'. Also converting mul and {d,}cl{o,z}
		to dyntrans.
		memory_ppc.c syntax error fix (noticed by Peter Valchev).
		Beginning to move out machines from src/machine.c into
		individual files in src/machines (in a way similar to the
		autodev system for devices).
20051222	Updating the documentation regarding NetBSD/pmax 3.0.
20051223	- " - NetBSD/cats 3.0.
20051225	- " - NetBSD/hpcmips 3.0.
20051226	Continuing on the machine registry redesign.
		Adding support for ARM rrx (33-bit rotate).
		Fixing some signed/unsigned issues (exposed by gcc -W).
20051227	Fixing the bug which prevented a NetBSD/prep 3.0 install kernel
		from starting (triggered when an mtmsr was the last instruction
		on a page). Unfortunately not enough to get the kernel to run
		as well as the 2.1 kernels did.
20051230	Some dyntrans refactoring.
20051231	Continuing on the machine registry redesign.
20060101-10	Continuing... moving more machines. Moving MD interrupt stuff
		from machine.c into a new src/machines/interrupts.c.
20060114	Adding various mvmeppc machine skeletons.
20060115	Continuing on mvme* stuff. NetBSD/mvmeppc prints boot messages
		(for MVME1600) and reaches the root device prompt, but no
		specific hardware devices are emulated yet.
20060116	Minor updates to the mvme1600 emulation mode; the Eagle PCI bus
		seems to work without much modification, and a 21143 can be
		detected, interrupts might work (but untested so far).
		Adding a fake MK48Txx (mkclock) device, for NetBSD/mvmeppc.
20060121	Adding an aux control register for ARM. (A BIG thank you to
		Olivier Houchard for tracking down this bug.)
20060122	Adding more ARM instructions (smulXY), and dev_iq80321_7seg.
20060124	Adding disassembly of more ARM instructions (mia*, mra/mar),
		and some semi-bogus XScale and i80321 registers.
20060201-02	Various minor updates. Moving the last machines out of
		machine.c.
20060204	Adding a -c command line option, for running debugger commands
		before the simulation starts, but after all files have been
		loaded.
		Minor iq80321-related updates.
20060209	Minor hacks (DEVINIT macro, etc).
		Preparing for the generalization of the 64-bit dyntrans address
		translation subsystem.
20060216	Adding ARM ldrd (double-register load).
20060217	Continuing on various ARM-related stuff.
20060218	More progress on the ATA/wdc emulation for NetBSD/iq80321.
		NetBSD/evbarm can now be installed :-)  Updating the docs, etc.
		Continuing on Algor emulation.

==============  RELEASE 0.3.8  ==============


1 /*
2 * Copyright (C) 2005-2006 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: cpu_alpha_palcode.c,v 1.5 2006/01/14 13:15:32 debug Exp $
29 *
30 * Alpha PALcode-related functionality.
31 */
32
33
34 #include <stdio.h>
35 #include <stdlib.h>
36 #include <string.h>
37 #include <ctype.h>
38
39 #include "misc.h"
40
41
42 #ifndef ENABLE_ALPHA
43
44
45 #include "cpu_alpha.h"
46
47
48 void alpha_palcode_name(uint32_t palcode, char *buf, size_t buflen)
49 { buf[0]='\0'; }
50 void alpha_palcode(struct cpu *cpu, uint32_t palcode) { }
51
52
53 #else /* ENABLE_ALPHA */
54
55
56 #include "console.h"
57 #include "cpu.h"
58 #include "machine.h"
59 #include "memory.h"
60 #include "symbol.h"
61
62
63 /*
64 * alpha_palcode_name():
65 *
66 * Return the name of a PALcode number, as a string.
67 */
68 void alpha_palcode_name(uint32_t palcode, char *buf, size_t buflen)
69 {
70 switch (palcode) {
71 case 0x10: snprintf(buf, buflen, "PAL_OSF1_rdmces"); break;
72 case 0x11: snprintf(buf, buflen, "PAL_OSF1_wrmces"); break;
73 case 0x2b: snprintf(buf, buflen, "PAL_OSF1_wrfen"); break;
74 case 0x2d: snprintf(buf, buflen, "PAL_OSF1_wrvptptr"); break;
75 case 0x30: snprintf(buf, buflen, "PAL_OSF1_swpctx"); break;
76 case 0x31: snprintf(buf, buflen, "PAL_OSF1_wrval"); break;
77 case 0x32: snprintf(buf, buflen, "PAL_OSF1_rdval"); break;
78 case 0x33: snprintf(buf, buflen, "PAL_OSF1_tbi"); break;
79 case 0x34: snprintf(buf, buflen, "PAL_OSF1_wrent"); break;
80 case 0x35: snprintf(buf, buflen, "PAL_OSF1_swpipl"); break;
81 case 0x36: snprintf(buf, buflen, "PAL_OSF1_rdps"); break;
82 case 0x37: snprintf(buf, buflen, "PAL_OSF1_wrkgp"); break;
83 case 0x38: snprintf(buf, buflen, "PAL_OSF1_wrusp"); break;
84 case 0x39: snprintf(buf, buflen, "PAL_OSF1_wrperfmon"); break;
85 case 0x3a: snprintf(buf, buflen, "PAL_OSF1_rdusp"); break;
86 case 0x3c: snprintf(buf, buflen, "PAL_OSF1_whami"); break;
87 case 0x3d: snprintf(buf, buflen, "PAL_OSF1_retsys"); break;
88 case 0x3f: snprintf(buf, buflen, "PAL_OSF1_rti"); break;
89 case 0x81: snprintf(buf, buflen, "PAL_bugchk"); break;
90 case 0x83: snprintf(buf, buflen, "PAL_OSF1_callsys"); break;
91 case 0x86: snprintf(buf, buflen, "PAL_OSF1_imb"); break;
92 case 0x92: snprintf(buf, buflen, "PAL_OSF1_urti"); break;
93 case 0x3fffffe: snprintf(buf, buflen, "GXemul_PROM"); break;
94 default:snprintf(buf, buflen, "UNKNOWN 0x%x", palcode);
95 }
96 }
97
98
99 /*
100 * alpha_prom_call():
101 */
102 void alpha_prom_call(struct cpu *cpu)
103 {
104 uint64_t addr;
105
106 switch (cpu->cd.alpha.r[ALPHA_A0]) {
107 case 0x02:
108 /* puts: a1 = channel, a2 = ptr to buf, a3 = len */
109 for (addr = cpu->cd.alpha.r[ALPHA_A2];
110 addr < cpu->cd.alpha.r[ALPHA_A2] +
111 cpu->cd.alpha.r[ALPHA_A3]; addr ++) {
112 unsigned char ch;
113 cpu->memory_rw(cpu, cpu->mem, addr, &ch, sizeof(ch),
114 MEM_READ, CACHE_DATA | NO_EXCEPTIONS);
115 console_putchar(cpu->machine->main_console_handle, ch);
116 }
117 cpu->cd.alpha.r[ALPHA_V0] = cpu->cd.alpha.r[ALPHA_A3];
118 break;
119 case 0x22:
120 /* getenv */
121 fatal("[ Alpha PALcode: GXemul PROM call 0x22: TODO ]\n");
122 break;
123 default:fatal("[ Alpha PALcode: GXemul PROM call, a0=0x%llx ]\n",
124 (long long)cpu->cd.alpha.r[ALPHA_A0]);
125 cpu->running = 0;
126 }
127
128 /* Return from the PROM call. */
129 cpu->pc = cpu->cd.alpha.r[ALPHA_RA];
130 }
131
132
133 /*
134 * alpha_palcode():
135 *
136 * Execute an Alpha PALcode instruction. (Most of these correspond to
137 * OSF1 palcodes, used by for example NetBSD/alpha.)
138 */
139 void alpha_palcode(struct cpu *cpu, uint32_t palcode)
140 {
141 switch (palcode) {
142 case 0x10: /* PAL_OSF1_rdmces */
143 /* TODO? Return something in v0. */
144 break;
145 case 0x11: /* PAL_OSF1_wrmces */
146 /* TODO? Set something to a0. */
147 break;
148 case 0x2b: /* PAL_OSF1_wrfen */
149 /* Floating point enable: a0 = 1 or 0. */
150 /* TODO */
151 break;
152 case 0x31: /* PAL_OSF1_wrval */
153 /* a0 = value */
154 cpu->cd.alpha.sysvalue = cpu->cd.alpha.r[ALPHA_A0];
155 break;
156 case 0x32: /* PAL_OSF1_rdval */
157 /* return: v0 = value */
158 cpu->cd.alpha.r[ALPHA_V0] = cpu->cd.alpha.sysvalue;
159 break;
160 case 0x33: /* PAL_OSF1_tbi */
161 /* a0 = op, a1 = vaddr */
162 debug("[ Alpha PALcode: PAL_OSF1_tbi: a0=%lli a1=0x%llx ]\n",
163 (signed long long)cpu->cd.alpha.r[ALPHA_A0],
164 (long long)cpu->cd.alpha.r[ALPHA_A1]);
165 /* TODO */
166 break;
167 case 0x34: /* PAL_OSF1_wrent (Write System Entry Address) */
168 /* a0 = new vector, a1 = vector selector */
169 debug("[ Alpha PALcode: PAL_OSF1_tbi: a0=%lli a1=0x%llx ]\n",
170 (signed long long)cpu->cd.alpha.r[ALPHA_A0],
171 (long long)cpu->cd.alpha.r[ALPHA_A1]);
172 /* TODO */
173 break;
174 case 0x35: /* PAL_OSF1_swpipl */
175 /* a0 = new ipl, v0 = return old ipl */
176 cpu->cd.alpha.r[ALPHA_V0] = cpu->cd.alpha.ipl;
177 cpu->cd.alpha.ipl = cpu->cd.alpha.r[ALPHA_A0];
178 break;
179 case 0x36: /* PAL_OSF1_rdps */
180 /* TODO */
181 cpu->cd.alpha.r[ALPHA_V0] = 0;
182 break;
183 case 0x37: /* PAL_OSF1_wrkgp */
184 /* "clobbers a0, t0, t8-t11" according to comments in
185 NetBSD sources */
186
187 /* KGP shoudl be set to a0. (TODO) */
188 break;
189 case 0x3c: /* PAL_OSF1_whami */
190 /* Returns CPU id in v0: */
191 cpu->cd.alpha.r[ALPHA_V0] = cpu->cpu_id;
192 break;
193 case 0x81: /* PAL_bugchk */
194 cpu->running = 0;
195 break;
196 case 0x83: /* PAL_OSF1_syscall */
197 if (cpu->machine->userland_emul != NULL)
198 useremul_syscall(cpu, 0);
199 else {
200 fatal("[ Alpha PALcode: syscall, but no"
201 " syscall handler? ]\n");
202 cpu->running = 0;
203 }
204 break;
205 case 0x86: /* PAL_OSF1_imb */
206 /* TODO */
207 break;
208 case 0x3fffffe:
209 alpha_prom_call(cpu);
210 break;
211 default:fatal("[ Alpha PALcode 0x%x unimplemented! ]\n", palcode);
212 cpu->running = 0;
213 }
214 }
215
216
217 #endif /* ENABLE_ALPHA */

  ViewVC Help
Powered by ViewVC 1.1.26