25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: cpu_alpha.c,v 1.19 2006/07/20 21:52:59 debug Exp $ |
* $Id: cpu_alpha.c,v 1.23 2006/09/19 10:50:08 debug Exp $ |
29 |
* |
* |
30 |
* Alpha CPU emulation. |
* Alpha CPU emulation. |
31 |
* |
* |
44 |
#include "machine.h" |
#include "machine.h" |
45 |
#include "memory.h" |
#include "memory.h" |
46 |
#include "misc.h" |
#include "misc.h" |
47 |
|
#include "settings.h" |
48 |
#include "symbol.h" |
#include "symbol.h" |
49 |
|
|
50 |
#define DYNTRANS_8K |
#define DYNTRANS_8K |
78 |
if (cpu_type_defs[i].name == NULL) |
if (cpu_type_defs[i].name == NULL) |
79 |
return 0; |
return 0; |
80 |
|
|
81 |
|
cpu->is_32bit = 0; |
82 |
|
cpu->byte_order = EMUL_LITTLE_ENDIAN; |
83 |
|
|
84 |
cpu->memory_rw = alpha_memory_rw; |
cpu->memory_rw = alpha_memory_rw; |
85 |
cpu->run_instr = alpha_run_instr; |
cpu->run_instr = alpha_run_instr; |
86 |
cpu->translate_v2p = alpha_translate_v2p; |
cpu->translate_v2p = alpha_translate_v2p; |
88 |
cpu->invalidate_translation_caches = |
cpu->invalidate_translation_caches = |
89 |
alpha_invalidate_translation_caches; |
alpha_invalidate_translation_caches; |
90 |
cpu->invalidate_code_translation = alpha_invalidate_code_translation; |
cpu->invalidate_code_translation = alpha_invalidate_code_translation; |
91 |
cpu->is_32bit = 0; |
|
92 |
|
cpu->cd.alpha.cpu_type = cpu_type_defs[i]; |
93 |
|
|
94 |
/* Only show name and caches etc for CPU nr 0: */ |
/* Only show name and caches etc for CPU nr 0: */ |
95 |
if (cpu_id == 0) { |
if (cpu_id == 0) { |
98 |
|
|
99 |
cpu->cd.alpha.r[ALPHA_SP] = 0xfffffc000000ff00ULL; |
cpu->cd.alpha.r[ALPHA_SP] = 0xfffffc000000ff00ULL; |
100 |
|
|
101 |
|
/* Set up dummy kentry pointers to something which crashes |
102 |
|
the machine: */ |
103 |
|
store_32bit_word(cpu, 0x10010, 0x3fffffc); |
104 |
|
for (i=0; i<N_ALPHA_KENTRY; i++) |
105 |
|
cpu->cd.alpha.kentry[i] = 0x10010; |
106 |
|
|
107 |
|
/* Bogus initial context (will be overwritten on first |
108 |
|
context switch): */ |
109 |
|
cpu->cd.alpha.ctx = 0x10100; |
110 |
|
|
111 |
|
CPU_SETTINGS_ADD_REGISTER64("pc", cpu->pc); |
112 |
|
for (i=0; i<N_ALPHA_REGS; i++) |
113 |
|
CPU_SETTINGS_ADD_REGISTER64(alpha_regname[i], |
114 |
|
cpu->cd.alpha.r[i]); |
115 |
|
|
116 |
return 1; |
return 1; |
117 |
} |
} |
118 |
|
|
150 |
|
|
151 |
|
|
152 |
/* |
/* |
|
* alpha_cpu_register_match(): |
|
|
*/ |
|
|
void alpha_cpu_register_match(struct machine *m, char *name, |
|
|
int writeflag, uint64_t *valuep, int *match_register) |
|
|
{ |
|
|
int i, cpunr = 0; |
|
|
|
|
|
/* CPU number: */ |
|
|
|
|
|
/* TODO */ |
|
|
|
|
|
if (strcasecmp(name, "pc") == 0) { |
|
|
if (writeflag) { |
|
|
m->cpus[cpunr]->pc = *valuep; |
|
|
} else |
|
|
*valuep = m->cpus[cpunr]->pc; |
|
|
*match_register = 1; |
|
|
} |
|
|
|
|
|
/* Register names: */ |
|
|
for (i=0; i<N_ALPHA_REGS; i++) { |
|
|
if (strcasecmp(name, alpha_regname[i]) == 0) { |
|
|
if (writeflag) |
|
|
m->cpus[cpunr]->cd.alpha.r[i] = *valuep; |
|
|
else |
|
|
*valuep = m->cpus[cpunr]->cd.alpha.r[i]; |
|
|
*match_register = 1; |
|
|
} |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
/* |
|
153 |
* alpha_cpu_register_dump(): |
* alpha_cpu_register_dump(): |
154 |
* |
* |
155 |
* Dump cpu registers in a relatively readable format. |
* Dump cpu registers in a relatively readable format. |
488 |
case 0x061: mnem = "amask"; break; |
case 0x061: mnem = "amask"; break; |
489 |
case 0x064: mnem = "cmovle"; break; |
case 0x064: mnem = "cmovle"; break; |
490 |
case 0x066: mnem = "cmovgt"; break; |
case 0x066: mnem = "cmovgt"; break; |
491 |
|
case 0x06c: mnem = "implver"; break; |
492 |
default:debug("UNIMPLEMENTED opcode 0x%x func 0x%x\n", |
default:debug("UNIMPLEMENTED opcode 0x%x func 0x%x\n", |
493 |
opcode, func); |
opcode, func); |
494 |
} |
} |
507 |
else |
else |
508 |
debug("mov\t%s,%s\n", alpha_regname[ra], |
debug("mov\t%s,%s\n", alpha_regname[ra], |
509 |
alpha_regname[rc]); |
alpha_regname[rc]); |
510 |
|
} else if (func == 0x1ec) { |
511 |
|
/* implver */ |
512 |
|
debug("%s\t%s\n", mnem, alpha_regname[rc]); |
513 |
} else if (func & 0x80) |
} else if (func & 0x80) |
514 |
debug("%s\t%s,0x%x,%s\n", mnem, |
debug("%s\t%s,0x%x,%s\n", mnem, |
515 |
alpha_regname[ra], (rb << 3) + (func >> 8), |
alpha_regname[ra], (rb << 3) + (func >> 8), |