25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: bintrans.c,v 1.167 2005/05/14 19:47:59 debug Exp $ |
* $Id: bintrans.c,v 1.169 2005/06/22 10:12:25 debug Exp $ |
29 |
* |
* |
30 |
* Dynamic binary translation. |
* Dynamic binary translation. |
31 |
* |
* |
312 |
a = (vaddr >> 22) & 0x3ff; |
a = (vaddr >> 22) & 0x3ff; |
313 |
b = (vaddr >> 12) & 0x3ff; |
b = (vaddr >> 12) & 0x3ff; |
314 |
tbl1 = cpu->cd.mips.vaddr_to_hostaddr_table0_kernel[a]; |
tbl1 = cpu->cd.mips.vaddr_to_hostaddr_table0_kernel[a]; |
315 |
if (tbl1->haddr_entry[b] != NULL) |
if (tbl1->haddr_entry[b*2] != NULL) |
316 |
tbl1->bintrans_chunks[b] = chunk0; |
tbl1->bintrans_chunks[b] = chunk0; |
317 |
break; |
break; |
318 |
default: |
default: |
918 |
/* tbl1 = cpu->cd.mips.vaddr_to_hostaddr_table0_kernel[a]; */ |
/* tbl1 = cpu->cd.mips.vaddr_to_hostaddr_table0_kernel[a]; */ |
919 |
|
|
920 |
tbl1 = cpu->cd.mips.vaddr_to_hostaddr_table0[a]; |
tbl1 = cpu->cd.mips.vaddr_to_hostaddr_table0[a]; |
921 |
if (tbl1->haddr_entry[b] != NULL) { |
if (tbl1->haddr_entry[b*2] != NULL) { |
922 |
paddr = tbl1->paddr_entry[b] | (cpu->pc & 0xfff); |
paddr = tbl1->paddr_entry[b] | (cpu->pc & 0xfff); |
923 |
ok = 1; |
ok = 1; |
924 |
} |
} |
963 |
|
|
964 |
#if 1 |
#if 1 |
965 |
/* We have no translation. */ |
/* We have no translation. */ |
966 |
if ((cpu->pc & 0xfff00000) == 0xbfc00000 && |
if ((cpu->pc & 0xdff00000) == 0x9fc00000 && |
967 |
cpu->machine->prom_emulation) |
cpu->machine->prom_emulation) |
968 |
return cpu->cd.mips.bintrans_instructions_executed; |
return cpu->cd.mips.bintrans_instructions_executed; |
969 |
|
|
981 |
cpu->cd.mips.vaddr_to_hostaddr_table0_kernel) |
cpu->cd.mips.vaddr_to_hostaddr_table0_kernel) |
982 |
ok = 0; |
ok = 0; |
983 |
tbl1 = cpu->cd.mips.vaddr_to_hostaddr_table0_kernel[a]; |
tbl1 = cpu->cd.mips.vaddr_to_hostaddr_table0_kernel[a]; |
984 |
if (ok && tbl1->haddr_entry[b] != NULL) { |
if (ok && tbl1->haddr_entry[b*2] != NULL) { |
985 |
cpu->cd.mips.pc_last_virtual_page = cpu->pc & ~0xfff; |
cpu->cd.mips.pc_last_virtual_page = cpu->pc & ~0xfff; |
986 |
cpu->cd.mips.pc_last_physical_page = paddr & ~0xfff; |
cpu->cd.mips.pc_last_physical_page = paddr & ~0xfff; |
987 |
cpu->cd.mips.pc_last_host_4k_page = (unsigned char *) |
cpu->cd.mips.pc_last_host_4k_page = (unsigned char *)tbl1->haddr_entry[b*2]; |
|
(((size_t)tbl1->haddr_entry[b]) & ~1); |
|
988 |
cpu->cd.mips.pc_bintrans_host_4kpage = cpu->cd.mips.pc_last_host_4k_page; |
cpu->cd.mips.pc_bintrans_host_4kpage = cpu->cd.mips.pc_last_host_4k_page; |
989 |
cpu->cd.mips.pc_bintrans_paddr = paddr; |
cpu->cd.mips.pc_bintrans_paddr = paddr; |
990 |
|
|
1040 |
int i, offset; |
int i, offset; |
1041 |
|
|
1042 |
cpu->cd.mips.chunk_base_address = cpu->mem->translation_code_chunk_space; |
cpu->cd.mips.chunk_base_address = cpu->mem->translation_code_chunk_space; |
1043 |
cpu->cd.mips.bintrans_loadstore_32bit = bintrans_loadstore_32bit; |
cpu->cd.mips.bintrans_load_32bit = bintrans_load_32bit; |
1044 |
|
cpu->cd.mips.bintrans_store_32bit = bintrans_store_32bit; |
1045 |
cpu->cd.mips.bintrans_jump_to_32bit_pc = bintrans_jump_to_32bit_pc; |
cpu->cd.mips.bintrans_jump_to_32bit_pc = bintrans_jump_to_32bit_pc; |
1046 |
cpu->cd.mips.bintrans_fast_tlbwri = coproc_tlbwri; |
cpu->cd.mips.bintrans_fast_tlbwri = coproc_tlbwri; |
1047 |
cpu->cd.mips.bintrans_fast_tlbpr = coproc_tlbpr; |
cpu->cd.mips.bintrans_fast_tlbpr = coproc_tlbpr; |
1059 |
cpu->cd.mips.vaddr_to_hostaddr_r2k3k_dcachetable = |
cpu->cd.mips.vaddr_to_hostaddr_r2k3k_dcachetable = |
1060 |
zeroed_alloc(sizeof(struct vth32_table)); |
zeroed_alloc(sizeof(struct vth32_table)); |
1061 |
for (i=0; i<1024; i++) { |
for (i=0; i<1024; i++) { |
1062 |
cpu->cd.mips.vaddr_to_hostaddr_r2k3k_dcachetable->haddr_entry[i] = |
cpu->cd.mips.vaddr_to_hostaddr_r2k3k_dcachetable-> |
1063 |
(void *)(((size_t)cpu->cd.mips.cache[0]+offset) | 1); |
haddr_entry[i*2] = (void *)((size_t)cpu->cd.mips.cache[0]+offset); |
1064 |
|
cpu->cd.mips.vaddr_to_hostaddr_r2k3k_dcachetable-> |
1065 |
|
haddr_entry[i*2+1] = (void *)((size_t)cpu->cd.mips.cache[0]+offset); |
1066 |
offset = (offset + 4096) % cpu->cd.mips.cache_size[0]; |
offset = (offset + 4096) % cpu->cd.mips.cache_size[0]; |
1067 |
} |
} |
1068 |
cpu->cd.mips.vaddr_to_hostaddr_r2k3k_dcachetable->refcount = 1024; |
cpu->cd.mips.vaddr_to_hostaddr_r2k3k_dcachetable->refcount = 1024; |
1072 |
cpu->cd.mips.vaddr_to_hostaddr_r2k3k_icachetable = |
cpu->cd.mips.vaddr_to_hostaddr_r2k3k_icachetable = |
1073 |
zeroed_alloc(sizeof(struct vth32_table)); |
zeroed_alloc(sizeof(struct vth32_table)); |
1074 |
for (i=0; i<1024; i++) { |
for (i=0; i<1024; i++) { |
1075 |
cpu->cd.mips.vaddr_to_hostaddr_r2k3k_icachetable->haddr_entry[i] = |
cpu->cd.mips.vaddr_to_hostaddr_r2k3k_icachetable-> |
1076 |
(void *)(((size_t)cpu->cd.mips.cache[1]+offset) | 1); |
haddr_entry[i*2] = |
1077 |
|
(void *)((size_t)cpu->cd.mips.cache[1]+offset); |
1078 |
|
cpu->cd.mips.vaddr_to_hostaddr_r2k3k_icachetable-> |
1079 |
|
haddr_entry[i*2+1] = |
1080 |
|
(void *)((size_t)cpu->cd.mips.cache[1]+offset); |
1081 |
offset = (offset + 4096) % cpu->cd.mips.cache_size[1]; |
offset = (offset + 4096) % cpu->cd.mips.cache_size[1]; |
1082 |
} |
} |
1083 |
cpu->cd.mips.vaddr_to_hostaddr_r2k3k_icachetable->refcount = 1024; |
cpu->cd.mips.vaddr_to_hostaddr_r2k3k_icachetable->refcount = 1024; |