/[dynamips]/upstream/dynamips-0.2.8-RC1/dev_c3745.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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upstream/dynamips-0.2.7/dev_c3745.h revision 10 by dpavlin, Sat Oct 6 16:29:14 2007 UTC upstream/dynamips-0.2.8-RC1/dev_c3745.h revision 11 by dpavlin, Sat Oct 6 16:33:40 2007 UTC
# Line 15  Line 15 
15  #include "device.h"  #include "device.h"
16  #include "pci_dev.h"  #include "pci_dev.h"
17  #include "nmc93cX6.h"  #include "nmc93cX6.h"
18    #include "dev_gt.h"
19  #include "net_io.h"  #include "net_io.h"
20  #include "vm.h"  #include "vm.h"
21    
# Line 29  Line 30 
30  #define C3745_DEFAULT_DISK1_SIZE   0  #define C3745_DEFAULT_DISK1_SIZE   0
31  #define C3745_DEFAULT_IOMEM_SIZE   5   /* Percents! */  #define C3745_DEFAULT_IOMEM_SIZE   5   /* Percents! */
32    
33  /* 3745 characteritics: 4 NM, 3 WIC, 2 AIM */  /* 3745 characteritics: 4 NM (+ motherboard), 3 WIC, 2 AIM */
34  #define C3745_MAX_NM_BAYS  5  #define C3745_MAX_NM_BAYS   5
35    #define C3745_MAX_WIC_BAYS  3
36    
37  /* C3745 DUART Interrupt */  /* C3745 DUART Interrupt */
38  #define C3745_DUART_IRQ  5  #define C3745_DUART_IRQ  5
# Line 50  Line 52 
52  #define C3745_NETIO_IRQ_PORT_MASK  ((1 << C3745_NETIO_IRQ_PORT_BITS) - 1)  #define C3745_NETIO_IRQ_PORT_MASK  ((1 << C3745_NETIO_IRQ_PORT_BITS) - 1)
53  #define C3745_NETIO_IRQ_PER_SLOT   (1 << C3745_NETIO_IRQ_PORT_BITS)  #define C3745_NETIO_IRQ_PER_SLOT   (1 << C3745_NETIO_IRQ_PORT_BITS)
54  #define C3745_NETIO_IRQ_END        \  #define C3745_NETIO_IRQ_END        \
55      (C3745_NETIO_IRQ_BASE + (C3745_MAX_NM_BAYS * C3745_NETIO_IRQ_PER_SLOT) - 1)    (C3745_NETIO_IRQ_BASE + (C3745_MAX_NM_BAYS * C3745_NETIO_IRQ_PER_SLOT) - 1)
56    
57  /* C3745 common device addresses */  /* C3745 common device addresses */
 #define C3745_GT96K_ADDR      0x24000000ULL  
 #define C3745_IOFPGA_ADDR     0x1fa00000ULL  
 #define C3745_DUART_ADDR      0x3c100000ULL  
58  #define C3745_BITBUCKET_ADDR  0x1ec00000ULL  #define C3745_BITBUCKET_ADDR  0x1ec00000ULL
59    #define C3745_IOFPGA_ADDR     0x1fa00000ULL
60  #define C3745_ROM_ADDR        0x1fc00000ULL  #define C3745_ROM_ADDR        0x1fc00000ULL
61    #define C3745_GT96K_ADDR      0x24000000ULL
62  #define C3745_SLOT0_ADDR      0x30000000ULL  #define C3745_SLOT0_ADDR      0x30000000ULL
63  #define C3745_SLOT1_ADDR      0x32000000ULL  #define C3745_SLOT1_ADDR      0x32000000ULL
64    #define C3745_DUART_ADDR      0x3c100000ULL
65    #define C3745_WIC_ADDR        0x3c200000ULL
66    #define C3745_BSWAP_ADDR      0xc0000000ULL
67  #define C3745_PCI_IO_ADDR     0x100000000ULL  #define C3745_PCI_IO_ADDR     0x100000000ULL
68    
69    /* WIC interval in address space */
70    #define C3745_WIC_SIZE  0x2000
71    
72  /* Offset of simulated NVRAM in ROM flash */  /* Offset of simulated NVRAM in ROM flash */
73  #define C3745_NVRAM_OFFSET    0xB0000  #define C3745_NVRAM_OFFSET    0xB0000
74  #define C3745_NVRAM_SIZE      0x20000  #define C3745_NVRAM_SIZE      0x20000
# Line 70  Line 77 
77  #define C3745_NVRAM_ROM_RES_SIZE  2048  #define C3745_NVRAM_ROM_RES_SIZE  2048
78    
79  /* C3745 ELF Platform ID */  /* C3745 ELF Platform ID */
80  #define C3745_ELF_MACHINE_ID  0xFF /* ??? */  #define C3745_ELF_MACHINE_ID  0x69
81    
82    #define VM_C3745(vm) ((c3745_t *)vm->hw_data)
83    
84  /* C3745 router */  /* C3745 router */
85  typedef struct c3745_router c3745_t;  typedef struct c3745_router c3745_t;
86    
 /* Prototype of NM driver initialization function */  
 typedef int (*c3745_nm_init_fn)(c3745_t *router,char *name,u_int nm_bay);  
   
 /* Prototype of NM driver shutdown function */  
 typedef int (*c3745_nm_shutdown_fn)(c3745_t *router,u_int nm_bay);  
   
 /* Prototype of NM NIO set function */  
 typedef int (*c3745_nm_set_nio_fn)(c3745_t *router,u_int nm_bay,u_int port_id,  
                                    netio_desc_t *nio);  
   
 /* Prototype of NM NIO unset function */  
 typedef int (*c3745_nm_unset_nio_fn)(c3745_t *router,u_int nm_bay,  
                                      u_int port_id);  
   
 /* Prototype of NM NIO show info function */  
 typedef int (*c3745_nm_show_info_fn)(c3745_t *router,u_int nm_bay);  
   
 /* C3745 Network Module Driver */  
 struct c3745_nm_driver {  
    char *dev_type;  
    int supported;  
    int wic_slots;  
    c3745_nm_init_fn nm_init;  
    c3745_nm_shutdown_fn nm_shutdown;  
    c3745_nm_set_nio_fn nm_set_nio;  
    c3745_nm_unset_nio_fn nm_unset_nio;  
    c3745_nm_show_info_fn nm_show_info;  
   
    /* TODO: WAN Interface Cards (WIC) */  
 };  
   
 /* C3745 NIO binding to a slot/port */  
 struct c3745_nio_binding {  
    netio_desc_t *nio;  
    u_int port_id;  
    struct c3745_nio_binding *prev,*next;  
 };  
   
 /* C3745 NM bay */  
 struct c3745_nm_bay {  
    char *dev_name;                       /* Device name */  
    char *dev_type;                       /* Device Type */  
    struct cisco_eeprom eeprom;           /* NM EEPROM */  
    struct pci_bus *pci_map;              /* PCI bus */  
    struct c3745_nm_driver *nm_driver;    /* NM Driver */  
    void *drv_info;                       /* Private driver info */  
    struct c3745_nio_binding *nio_list;   /* NIO bindings to ports */  
 };  
   
87  /* C3745 router */  /* C3745 router */
88  struct c3745_router {  struct c3745_router {
89     /* Chassis MAC address */     /* Chassis MAC address */
# Line 132  struct c3745_router { Line 92  struct c3745_router {
92     /* Associated VM instance */     /* Associated VM instance */
93     vm_instance_t *vm;     vm_instance_t *vm;
94    
95     /* IO memory size to be passed to Smart Init */     /* GT96100 data */
96     u_int nm_iomem_size;     struct gt_data *gt_data;
97    
98     /* I/O FPGA */     /* I/O FPGA */
99     struct c3745_iofpga_data *iofpga_data;     struct c3745_iofpga_data *iofpga_data;
100    
101     /* Chassis information */     /* OIR status */
    struct c3745_nm_bay nm_bay[C3745_MAX_NM_BAYS];  
102     m_uint8_t oir_status;     m_uint8_t oir_status;
103    
104     /*     /*
# Line 153  struct c3745_router { Line 112  struct c3745_router {
112     struct nmc93cX6_group nm_eeprom_group[4];     struct nmc93cX6_group nm_eeprom_group[4];
113  };  };
114    
115  /* Create a new router instance */  /* Get WIC device address for the specified onboard port */
116  c3745_t *c3745_create_instance(char *name,int instance_id);  int c3745_get_onboard_wic_addr(u_int slot,m_uint64_t *phys_addr);
   
 /* Delete a router instance */  
 int c3745_delete_instance(char *name);  
   
 /* Delete all router instances */  
 int c3745_delete_all_instances(void);  
   
 /* Save configuration of a C3745 instance */  
 void c3745_save_config(c3745_t *router,FILE *fd);  
117    
118  /* Save configurations of all C3745 instances */  /* Set EEPROM for the specified slot */
119  void c3745_save_config_all(FILE *fd);  int c3745_set_slot_eeprom(c3745_t *router,u_int slot,
120                              struct cisco_eeprom *eeprom);
121    
122  /* Get network IRQ for specified slot/port */  /* Get network IRQ for specified slot/port */
123  u_int c3745_net_irq_for_slot_port(u_int slot,u_int port);  u_int c3745_net_irq_for_slot_port(u_int slot,u_int port);
124    
 /* Set NM EEPROM definition */  
 int c3745_nm_set_eeprom(c3745_t *router,u_int nm_bay,  
                         const struct cisco_eeprom *eeprom);  
   
 /* Unset NM EEPROM definition (empty bay) */  
 int c3745_nm_unset_eeprom(c3745_t *router,u_int nm_bay);  
   
 /* Check if a bay has a Network Module */  
 int c3745_nm_check_eeprom(c3745_t *router,u_int nm_bay);  
   
 /* Get bay info */  
 struct c3745_nm_bay *c3745_nm_get_info(c3745_t *router,u_int nm_bay);  
   
 /* Get NM type */  
 char *c3745_nm_get_type(c3745_t *router,u_int nm_bay);  
   
 /* Get driver info about the specified slot */  
 void *c3745_nm_get_drvinfo(c3745_t *router,u_int nm_bay);  
   
 /* Set driver info for the specified slot */  
 int c3745_nm_set_drvinfo(c3745_t *router,u_int nm_bay,void *drv_info);  
   
 /* Add a NM binding */  
 int c3745_nm_add_binding(c3745_t *router,char *dev_type,u_int nm_bay);  
   
 /* Remove a NM binding */  
 int c3745_nm_remove_binding(c3745_t *router,u_int nm_bay);  
   
 /* Find a NIO binding */  
 struct c3745_nio_binding *  
 c3745_nm_find_nio_binding(c3745_t *router,u_int nm_bay,u_int port_id);  
   
 /* Add a network IO binding */  
 int c3745_nm_add_nio_binding(c3745_t *router,u_int nm_bay,u_int port_id,  
                              char *nio_name);  
   
 /* Remove a NIO binding */  
 int c3745_nm_remove_nio_binding(c3745_t *router,u_int nm_bay,u_int port_id);  
   
 /* Remove all NIO bindings for the specified NM */  
 int c3745_nm_remove_all_nio_bindings(c3745_t *router,u_int nm_bay);  
   
 /* Enable a Network IO descriptor for a Network Module */  
 int c3745_nm_enable_nio(c3745_t *router,u_int nm_bay,u_int port_id);  
   
 /* Disable Network IO descriptor of a Network Module */  
 int c3745_nm_disable_nio(c3745_t *router,u_int nm_bay,u_int port_id);  
   
 /* Enable all NIO of the specified NM */  
 int c3745_nm_enable_all_nio(c3745_t *router,u_int nm_bay);  
   
 /* Disable all NIO of the specified NM */  
 int c3745_nm_disable_all_nio(c3745_t *router,u_int nm_bay);  
   
 /* Initialize a Network Module */  
 int c3745_nm_init(c3745_t *router,u_int nm_bay);  
   
 /* Shutdown a Network Module */  
 int c3745_nm_shutdown(c3745_t *router,u_int nm_bay);  
   
 /* Shutdown all NM of a router */  
 int c3745_nm_shutdown_all(c3745_t *router);  
   
 /* Show info about all NMs */  
 int c3745_nm_show_all_info(c3745_t *router);  
   
 /* Create a Network Module (command line) */  
 int c3745_cmd_nm_create(c3745_t *router,char *str);  
   
 /* Add a Network IO descriptor binding (command line) */  
 int c3745_cmd_add_nio(c3745_t *router,char *str);  
   
 /* Show the list of available NM drivers */  
 void c3745_nm_show_drivers(void);  
   
125  /* Set chassis MAC address */  /* Set chassis MAC address */
126  int c3745_chassis_set_mac_addr(c3745_t *router,char *mac_addr);  int c3745_chassis_set_mac_addr(c3745_t *router,char *mac_addr);
127    
128  /* Show C3745 hardware info */  /* Show C3745 hardware info */
129  void c3745_show_hardware(c3745_t *router);  void c3745_show_hardware(c3745_t *router);
130    
 /* Initialize default parameters for a C3745 */  
 void c3745_init_defaults(c3745_t *router);  
   
 /* Initialize the C3745 Platform */  
 int c3745_init_platform(c3745_t *router);  
   
 /* Initialize a Cisco 3745 instance */  
 int c3745_init_instance(c3745_t *router);  
   
 /* Stop a Cisco 3745 instance */  
 int c3745_stop_instance(c3745_t *router);  
   
131  /* Initialize EEPROM groups */  /* Initialize EEPROM groups */
132  void c3745_init_eeprom_groups(c3745_t *router);  void c3745_init_eeprom_groups(c3745_t *router);
133    
134  /* dev_c3745_iofpga_init() */  /* dev_c3745_iofpga_init() */
135  int dev_c3745_iofpga_init(c3745_t *router,m_uint64_t paddr,m_uint32_t len);  int dev_c3745_iofpga_init(c3745_t *router,m_uint64_t paddr,m_uint32_t len);
136    
137    /* Register the c3745 platform */
138    int c3745_platform_register(void);
139    
140    /* Hypervisor C3745 initialization */
141    extern int hypervisor_c3745_init(vm_platform_t *platform);
142    
143  /* NM drivers */  /* NM drivers */
144  extern struct c3745_nm_driver dev_c3745_nm_1fe_tx_driver;  extern struct cisco_card_driver dev_c3745_nm_1fe_tx_driver;
145  extern struct c3745_nm_driver dev_c3745_gt96100_fe_driver;  extern struct cisco_card_driver dev_c3745_gt96100_fe_driver;
146  extern struct c3745_nm_driver dev_c3745_nm_4t_driver;  extern struct cisco_card_driver dev_c3745_nm_4t_driver;
147  extern struct c3745_nm_driver dev_c3745_nm_16esw_driver;  extern struct cisco_card_driver dev_c3745_nm_16esw_driver;
148    extern struct cisco_card_driver dev_c3745_nm_nam_driver;
149    extern struct cisco_card_driver dev_c3745_nm_cids_driver;
150    
151    /* WIC drivers */
152    extern struct cisco_card_driver *dev_c3745_mb_wic_drivers[];
153    
154  #endif  #endif
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