/[dynamips]/upstream/dynamips-0.2.8-RC1/dev_c2691_iofpga.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Diff of /upstream/dynamips-0.2.8-RC1/dev_c2691_iofpga.c

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upstream/dynamips-0.2.7/dev_c2691_iofpga.c revision 10 by dpavlin, Sat Oct 6 16:29:14 2007 UTC upstream/dynamips-0.2.8-RC1/dev_c2691_iofpga.c revision 11 by dpavlin, Sat Oct 6 16:33:40 2007 UTC
# Line 61  struct c2691_iofpga_data { Line 61  struct c2691_iofpga_data {
61        
62     /* Interrupt mask */     /* Interrupt mask */
63     m_uint16_t intr_mask;     m_uint16_t intr_mask;
64    
65       /* WIC select */
66       u_int wic_select;
67       u_int wic_cmd_pos;
68       u_int wic_cmd_valid;
69       m_uint16_t wic_cmd[2];
70  };  };
71    
72  /* Mainboard EEPROM definition */  /* Mainboard EEPROM definition */
# Line 71  static const struct nmc93cX6_eeprom_def Line 77  static const struct nmc93cX6_eeprom_def
77    
78  /* Mainboard EEPROM */  /* Mainboard EEPROM */
79  static const struct nmc93cX6_group eeprom_mb_group = {  static const struct nmc93cX6_group eeprom_mb_group = {
80     EEPROM_TYPE_NMC93C46, 1, 0, "Mainboard EEPROM", 0, { &eeprom_mb_def },     EEPROM_TYPE_NMC93C46, 1, 0,
81       EEPROM_DORD_NORMAL,
82       EEPROM_DOUT_HIGH,
83       EEPROM_DEBUG_DISABLED,
84       "Mainboard EEPROM",
85       { &eeprom_mb_def },
86  };  };
87    
88  /* NM EEPROM definition */  /* NM EEPROM definition */
# Line 82  static const struct nmc93cX6_eeprom_def Line 93  static const struct nmc93cX6_eeprom_def
93    
94  /* NM EEPROM */  /* NM EEPROM */
95  static const struct nmc93cX6_group eeprom_nm_group = {  static const struct nmc93cX6_group eeprom_nm_group = {
96     EEPROM_TYPE_NMC93C46, 1, 0, "NM EEPROM", 0, { &eeprom_nm_def },     EEPROM_TYPE_NMC93C46, 1, 0,
97       EEPROM_DORD_NORMAL,
98       EEPROM_DOUT_HIGH,
99       EEPROM_DEBUG_DISABLED,
100       "NM EEPROM",
101       { &eeprom_nm_def },
102  };  };
103    
104  /* Update network interrupt status */  /* Update network interrupt status */
# Line 125  void dev_c2691_iofpga_net_clear_irq(stru Line 141  void dev_c2691_iofpga_net_clear_irq(stru
141     dev_c2691_iofpga_net_update_irq(d);     dev_c2691_iofpga_net_update_irq(d);
142  }  }
143    
144    /* Read a WIC EEPROM */
145    static m_uint16_t dev_c2691_read_wic_eeprom(struct c2691_iofpga_data *d)
146    {  
147       struct cisco_eeprom *eeprom;
148       u_int wic_port;
149       u_int eeprom_offset;
150       m_uint8_t val[2];
151    
152       switch(d->wic_select) {
153          case 0x1700:
154             wic_port = 0x10;
155             break;
156          case 0x1D00:
157             wic_port = 0x20;
158             break;
159          case 0x3500:
160             wic_port = 0x30;
161             break;
162          default:
163             wic_port = 0;
164       }
165    
166       /* No WIC in slot or no EEPROM: fake an empty EEPROM */
167       if (!wic_port || !(eeprom = vm_slot_get_eeprom(d->router->vm,0,wic_port)))
168          return(0xFFFF);
169    
170       /* EEPROM offset is in the lowest 6 bits */
171       eeprom_offset = d->wic_cmd[0] & 0x3F;
172    
173       cisco_eeprom_get_byte(eeprom,eeprom_offset,&val[0]);
174       cisco_eeprom_get_byte(eeprom,eeprom_offset+1,&val[1]);
175    
176       return(((m_uint16_t)val[0] << 8) | val[1]);
177    }
178    
179  /*  /*
180   * dev_c2691_iofpga_access()   * dev_c2691_iofpga_access()
181   */   */
# Line 169  dev_c2691_iofpga_access(cpu_gen_t *cpu,s Line 220  dev_c2691_iofpga_access(cpu_gen_t *cpu,s
220    
221        case 0x12:        case 0x12:
222           /*           /*
223            * Bit 0: 1=No WIC in slot 0 ?            * Bit 0: 1=No WIC in slot 0.
224            * Bit 1: 1=No WIC in slot 1 ?            * Bit 1: 1=No WIC in slot 1.
225            * Bit 2: 1=No WIC in slot 2 ?            * Bit 2: 1=No WIC in slot 2.
226            */            */
227           if (op_type == MTS_READ)           if (op_type == MTS_READ) {
228              *data = 0x0007;              *data = 0xFFFF;
229                
230                /* check WIC 0 */
231                if (vm_slot_check_eeprom(d->router->vm,0,0x10))
232                   *data &= ~0x01;
233    
234                /* check WIC 1 */
235                if (vm_slot_check_eeprom(d->router->vm,0,0x20))
236                   *data &= ~0x02;
237    
238                /* check WIC 2 */
239                if (vm_slot_check_eeprom(d->router->vm,0,0x30))
240                   *data &= ~0x04;
241             } else {
242                d->wic_select = *data;
243             }
244           break;           break;
245    
246        case 0x14:        case 0x14:
# Line 195  dev_c2691_iofpga_access(cpu_gen_t *cpu,s Line 261  dev_c2691_iofpga_access(cpu_gen_t *cpu,s
261    
262        /* WIC related: 16-bit data */        /* WIC related: 16-bit data */
263        case 0x42:        case 0x42:
264             if (op_type == MTS_READ) {
265                if (d->wic_cmd_valid) {
266                   *data = dev_c2691_read_wic_eeprom(d);
267                   d->wic_cmd_valid = FALSE;
268                } else {
269                   *data = 0xFFFF;
270                }
271             } else {
272                /*
273                 * Store the EEPROM command (in 2 words).
274                 *
275                 * For a read, we have:
276                 *    Word 0: 0x180 (nmc93c46 READ) + offset (6-bits).
277                 *    Word 1: 0 (no data).
278                 */
279                d->wic_cmd[d->wic_cmd_pos++] = *data;
280                
281                if (d->wic_cmd_pos == 2) {
282                   d->wic_cmd_pos = 0;
283                   d->wic_cmd_valid = TRUE;
284                }
285             }
286           break;           break;
287    
288        /* NM Slot 1 EEPROM */        /* NM Slot 1 EEPROM */
# Line 227  dev_c2691_iofpga_access(cpu_gen_t *cpu,s Line 315  dev_c2691_iofpga_access(cpu_gen_t *cpu,s
315           if (op_type == MTS_READ) {           if (op_type == MTS_READ) {
316              *data = 0xFFFF;              *data = 0xFFFF;
317    
318              if (c2691_nm_check_eeprom(d->router,1))              if (vm_slot_get_card_ptr(d->router->vm,1))
319                 *data &= ~0x08;                 *data &= ~0x08;
320           }           }
321           break;           break;
# Line 341  void c2691_init_eeprom_groups(c2691_t *r Line 429  void c2691_init_eeprom_groups(c2691_t *r
429    
430     /* EEPROM for NM slot 1 */     /* EEPROM for NM slot 1 */
431     router->nm_eeprom_group = eeprom_nm_group;     router->nm_eeprom_group = eeprom_nm_group;
432     router->nm_eeprom_group.eeprom[0] = &router->nm_bay[1].eeprom;     router->nm_eeprom_group.eeprom[0] = NULL;
433  }  }
434    
435  /* Shutdown the IO FPGA device */  /* Shutdown the IO FPGA device */

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