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dpavlin |
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/* |
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* Cisco router simulation platform. |
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* Copyright (c) 2005,2006 Christophe Fillot. |
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* |
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* NMC93C46/NMC93C56 Serial EEPROM. |
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*/ |
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#ifndef __NMC93CX6_H__ |
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#define __NMC93CX6_H__ |
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#include <sys/types.h> |
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#include "utils.h" |
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#include "cisco_eeprom.h" |
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/* EEPROM types */ |
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enum { |
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EEPROM_TYPE_NMC93C46, |
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EEPROM_TYPE_NMC93C56, |
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}; |
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/* 8 groups with 4 differents bits (clock,select,data_in,data_out) */ |
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#define NMC93CX6_MAX_EEPROM_PER_GROUP 8 |
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/* NMC93C46 EEPROM command bit length */ |
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#define NMC93C46_CMD_BITLEN 9 |
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/* NMC93C56 EEPROM command bit length */ |
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#define NMC93C56_CMD_BITLEN 11 |
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/* NMC93C46 EEPROM data bit length */ |
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#define NMC93CX6_CMD_DATALEN 16 |
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/* NMC93C46 EEPROM commands: SB (1) OP(2) Address(6/9) */ |
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#define NMC93CX6_CMD_CONTROL (0x1 | 0x0) |
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#define NMC93CX6_CMD_WRDS (0x1 | 0x0 | 0x00) |
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#define NMC93CX6_CMD_ERASE_ALL (0x1 | 0x0 | 0x08) |
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#define NMC93CX6_CMD_WRITE_ALL (0x1 | 0x0 | 0x10) |
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#define NMC93CX6_CMD_WREN (0x1 | 0x0 | 0x18) |
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#define NMC93CX6_CMD_READ (0x1 | 0x2) |
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#define NMC93CX6_CMD_WRITE (0x1 | 0x4) |
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#define NMC93CX6_CMD_ERASE (0x1 | 0x6) |
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struct nmc93cX6_eeprom_def { |
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u_int clock_bit; |
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u_int select_bit; |
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u_int din_bit; |
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u_int dout_bit; |
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}; |
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struct nmc93cX6_eeprom_state { |
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u_int cmd_len; |
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u_int cmd_val; |
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u_int state; |
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u_int dataout_pos; |
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u_int dataout_val; |
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}; |
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struct nmc93cX6_group { |
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u_int eeprom_type; |
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u_int nr_eeprom; |
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u_int eeprom_reg; |
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char *description; |
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int debug; |
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const struct nmc93cX6_eeprom_def *def[NMC93CX6_MAX_EEPROM_PER_GROUP]; |
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struct nmc93cX6_eeprom_state state[NMC93CX6_MAX_EEPROM_PER_GROUP]; |
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struct cisco_eeprom *eeprom[NMC93CX6_MAX_EEPROM_PER_GROUP]; |
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}; |
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/* Handle write */ |
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void nmc93cX6_write(struct nmc93cX6_group *g,u_int data); |
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/* Handle read */ |
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u_int nmc93cX6_read(struct nmc93cX6_group *p); |
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#endif /* __NMC93CX6_H__ */ |