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dpavlin |
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/* |
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* Cisco C7200 (Predator) Simulation Platform. |
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* Copyright (c) 2006 Christophe Fillot. All rights reserved. |
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* |
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* PCI configuration space for SB-1 processor. |
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*/ |
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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#include <time.h> |
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#include <errno.h> |
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#include "mips64.h" |
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#include "dynamips.h" |
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#include "memory.h" |
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#include "device.h" |
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#define DEBUG_ACCESS 0 |
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/* Sibyte PCI ID */ |
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#define SB1_PCI_VENDOR_ID 0x166D |
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/* SB-1 PCI private data */ |
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struct sb1_pci_data { |
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vm_obj_t vm_obj; |
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struct vdevice dev; |
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struct pci_bus *pci_bus; |
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/* PCI configuration (Bus 0, Device 0) */ |
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struct pci_device *pci_cfg_dev; |
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/* HyperTransport configuration (Bus 0, Device 1) */ |
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struct pci_device *ht_cfg_dev; |
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}; |
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/* |
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* sb1_pci_cfg_read() |
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* |
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* PCI Configuration (Bus 0, Device 0). |
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*/ |
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static m_uint32_t sb1_pci_cfg_read(cpu_mips_t *cpu,struct pci_device *dev, |
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int reg) |
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{ |
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switch(reg) { |
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case 0x08: |
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return(0x06000002); |
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default: |
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return(0); |
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} |
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} |
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/* |
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* sb1_ht_cfg_read() |
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* |
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* HyperTransport Configuration (Bus 0, Device 1). |
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*/ |
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static m_uint32_t sb1_ht_cfg_read(cpu_mips_t *cpu,struct pci_device *dev, |
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int reg) |
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{ |
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switch(reg) { |
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case 0x08: |
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return(0x06000002); |
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case 0x44: |
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return(1<<5); /* HyperTransport OK */ |
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default: |
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return(0); |
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} |
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} |
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/* |
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* dev_sb1_pci_access() |
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*/ |
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void *dev_sb1_pci_access(cpu_mips_t *cpu,struct vdevice *dev, |
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m_uint32_t offset,u_int op_size,u_int op_type, |
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m_uint64_t *data) |
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{ |
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struct sb1_pci_data *d = dev->priv_data; |
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#if DEBUG_ACCESS |
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if (op_type == MTS_READ) |
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cpu_log(cpu,dev->name,"read access to offset = 0x%x, pc = 0x%llx\n", |
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offset,cpu->pc); |
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else |
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cpu_log(cpu,dev->name,"write access to vaddr = 0x%x, pc = 0x%llx, " |
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"val = 0x%llx\n",offset,cpu->pc,*data); |
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#endif |
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if (op_type == MTS_READ) |
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*data = 0; |
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d->pci_bus->pci_addr = offset; |
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pci_dev_data_handler(cpu,d->pci_bus,op_type,FALSE,data); |
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return NULL; |
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} |
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/* Shutdown the PCI bus configuration zone */ |
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void dev_sb1_pci_shutdown(vm_instance_t *vm,struct sb1_pci_data *d) |
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{ |
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if (d != NULL) { |
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/* Remove the device */ |
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dev_remove(vm,&d->dev); |
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/* Free the structure itself */ |
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free(d); |
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} |
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} |
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/* Create the SB-1 PCI bus configuration zone */ |
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int dev_sb1_pci_init(vm_instance_t *vm,char *name,m_uint64_t paddr) |
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{ |
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struct sb1_pci_data *d; |
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/* allocate the private data structure */ |
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if (!(d = malloc(sizeof(*d)))) { |
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fprintf(stderr,"SB1_PCI: unable to create device.\n"); |
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return(-1); |
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} |
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memset(d,0,sizeof(*d)); |
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d->pci_bus = vm->pci_bus[0]; |
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vm_object_init(&d->vm_obj); |
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d->vm_obj.name = name; |
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d->vm_obj.data = d; |
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d->vm_obj.shutdown = (vm_shutdown_t)dev_sb1_pci_shutdown; |
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dev_init(&d->dev); |
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d->dev.name = name; |
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d->dev.priv_data = d; |
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d->dev.phys_addr = paddr; |
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d->dev.phys_len = 1 << 24; |
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d->dev.handler = dev_sb1_pci_access; |
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/* PCI configuration header on Bus 0, Device 0 */ |
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d->pci_cfg_dev = pci_dev_add(d->pci_bus,"sb1_pci_cfg", |
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SB1_PCI_VENDOR_ID,0x0001,0,0,-1,NULL, |
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NULL,sb1_pci_cfg_read,NULL); |
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/* Create the HyperTransport bus #1 */ |
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vm->pci_bus_pool[28] = pci_bus_create("HT bus #1",-1); |
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/* HyperTransport configuration header on Bus 0, Device 1 */ |
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d->ht_cfg_dev = pci_bridge_create_dev(d->pci_bus,"sb1_ht_cfg", |
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SB1_PCI_VENDOR_ID,0x0002, |
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1,0,vm->pci_bus_pool[28], |
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sb1_ht_cfg_read,NULL); |
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/* Map this device to the VM */ |
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vm_bind_device(vm,&d->dev); |
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vm_object_add(vm,&d->vm_obj); |
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return(0); |
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} |