/[dynamips]/upstream/dynamips-0.2.6-RC3/dev_c7200.c
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upstream/dynamips-0.2.5/dev_c7200.c revision 1 by dpavlin, Sat Oct 6 16:01:44 2007 UTC upstream/dynamips-0.2.6-RC3/dev_c7200.c revision 4 by dpavlin, Sat Oct 6 16:06:49 2007 UTC
# Line 17  Line 17 
17  #include "memory.h"  #include "memory.h"
18  #include "device.h"  #include "device.h"
19  #include "pci_io.h"  #include "pci_io.h"
20    #include "dev_gt.h"
21  #include "cisco_eeprom.h"  #include "cisco_eeprom.h"
22  #include "dev_c7200.h"  #include "dev_c7200.h"
23  #include "dev_vtty.h"  #include "dev_vtty.h"
# Line 90  static m_uint16_t eeprom_cpu_npeg1_data[ Line 91  static m_uint16_t eeprom_cpu_npeg1_data[
91  /*  /*
92   * CPU EEPROM array.   * CPU EEPROM array.
93   */   */
94  static struct c7200_eeprom c7200_cpu_eeprom[] = {  static struct cisco_eeprom c7200_cpu_eeprom[] = {
95     { "npe-100", eeprom_cpu_npe100_data, sizeof(eeprom_cpu_npe100_data)/2 },     { "npe-100", eeprom_cpu_npe100_data, sizeof(eeprom_cpu_npe100_data)/2 },
96     { "npe-150", eeprom_cpu_npe150_data, sizeof(eeprom_cpu_npe150_data)/2 },     { "npe-150", eeprom_cpu_npe150_data, sizeof(eeprom_cpu_npe150_data)/2 },
97     { "npe-175", eeprom_cpu_npe175_data, sizeof(eeprom_cpu_npe175_data)/2 },     { "npe-175", eeprom_cpu_npe175_data, sizeof(eeprom_cpu_npe175_data)/2 },
# Line 125  static m_uint16_t eeprom_vxr_midplane_da Line 126  static m_uint16_t eeprom_vxr_midplane_da
126  /*  /*
127   * Midplane EEPROM array.   * Midplane EEPROM array.
128   */   */
129  static struct c7200_eeprom c7200_midplane_eeprom[] = {  static struct cisco_eeprom c7200_midplane_eeprom[] = {
130     { "std", eeprom_midplane_data, sizeof(eeprom_midplane_data)/2 },     { "std", eeprom_midplane_data, sizeof(eeprom_midplane_data)/2 },
131     { "vxr", eeprom_vxr_midplane_data, sizeof(eeprom_vxr_midplane_data)/2 },     { "vxr", eeprom_vxr_midplane_data, sizeof(eeprom_vxr_midplane_data)/2 },
132     { NULL, NULL, 0 },     { NULL, NULL, 0 },
# Line 150  static m_uint16_t eeprom_pem_npe225_data Line 151  static m_uint16_t eeprom_pem_npe225_data
151  /*  /*
152   * PEM EEPROM array.   * PEM EEPROM array.
153   */   */
154  static struct c7200_eeprom c7200_pem_eeprom[] = {  static struct cisco_eeprom c7200_pem_eeprom[] = {
155     { "npe-175", eeprom_pem_npe175_data, sizeof(eeprom_pem_npe175_data)/2 },     { "npe-175", eeprom_pem_npe175_data, sizeof(eeprom_pem_npe175_data)/2 },
156     { "npe-225", eeprom_pem_npe225_data, sizeof(eeprom_pem_npe225_data)/2 },     { "npe-225", eeprom_pem_npe225_data, sizeof(eeprom_pem_npe225_data)/2 },
157     { NULL, NULL, 0 },     { NULL, NULL, 0 },
# Line 168  static struct c7200_pa_driver *pa_driver Line 169  static struct c7200_pa_driver *pa_driver
169     &dev_c7200_pa_8t_driver,     &dev_c7200_pa_8t_driver,
170     &dev_c7200_pa_a1_driver,     &dev_c7200_pa_a1_driver,
171     &dev_c7200_pa_pos_oc3_driver,     &dev_c7200_pa_pos_oc3_driver,
172     &dev_c7200_pa_4b_driver,     &dev_c7200_pa_4b_driver,  
173       &dev_c7200_pa_mc8te1_driver,
174     NULL,     NULL,
175  };  };
176    
# Line 201  static struct c7200_npe_driver npe_drive Line 203  static struct c7200_npe_driver npe_drive
203  };  };
204    
205  /* ======================================================================== */  /* ======================================================================== */
 /* Empty EEPROM for PAs                                                     */  
 /* ======================================================================== */  
 static const m_uint16_t eeprom_pa_empty[64] = {  
    0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,  
    0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,  
    0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,  
    0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,  
 };  
   
 /* ======================================================================== */  
206  /* Cisco 7200 router instances                                              */  /* Cisco 7200 router instances                                              */
207  /* ======================================================================== */  /* ======================================================================== */
208    
209  /* Directly extract the configuration from the NVRAM device */  /* Directly extract the configuration from the NVRAM device */
210  ssize_t c7200_nvram_extract_config(vm_instance_t *vm,char **buffer)  ssize_t c7200_nvram_extract_config(vm_instance_t *vm,char **buffer)
211  {    {  
212       u_char *base_ptr,*ios_ptr,*cfg_ptr,*end_ptr;
213       m_uint32_t start,end,nvlen,clen;
214       m_uint16_t magic1,magic2;
215     struct vdevice *nvram_dev;     struct vdevice *nvram_dev;
216     m_uint32_t start,end,clen,nvlen;     m_uint64_t nvram_addr;
217     m_uint16_t magic1,magic2;     off_t nvram_size;
218     m_uint64_t addr;     int fd;
219    
220       if ((nvram_dev = dev_get_by_name(vm,"nvram")))
221          dev_sync(nvram_dev);
222    
223       fd = vm_mmap_open_file(vm,"nvram",&base_ptr,&nvram_size);
224    
225     if (!(nvram_dev = dev_get_by_name(vm,"nvram")))     if (fd == -1)
226        return(-1);        return(-1);
227    
228     addr = nvram_dev->phys_addr + vm->nvram_rom_space;     nvram_addr = VM_C7200(vm)->npe_driver->nvram_addr;
229     magic1 = physmem_copy_u16_from_vm(vm,addr+0x06);     ios_ptr = base_ptr + vm->nvram_rom_space;
230     magic2 = physmem_copy_u16_from_vm(vm,addr+0x08);     end_ptr = base_ptr + nvram_size;
231    
232       if ((ios_ptr + 0x30) >= end_ptr) {
233          vm_error(vm,"NVRAM file too small\n");
234          return(-1);
235       }
236    
237       magic1  = ntohs(*PTR_ADJUST(m_uint16_t *,ios_ptr,0x06));
238       magic2  = ntohs(*PTR_ADJUST(m_uint16_t *,ios_ptr,0x08));
239    
240     if ((magic1 != 0xF0A5) || (magic2 != 0xABCD)) {     if ((magic1 != 0xF0A5) || (magic2 != 0xABCD)) {
241        vm_error(vm,"unable to find IOS magic numbers (0x%x,0x%x)!\n",        vm_error(vm,"unable to find IOS magic numbers (0x%x,0x%x)!\n",
# Line 235  ssize_t c7200_nvram_extract_config(vm_in Line 243  ssize_t c7200_nvram_extract_config(vm_in
243        return(-1);        return(-1);
244     }     }
245    
246     start = physmem_copy_u32_from_vm(vm,addr+0x10) + 1;     start = ntohl(*PTR_ADJUST(m_uint32_t *,ios_ptr,0x10)) + 1;
247     end   = physmem_copy_u32_from_vm(vm,addr+0x14);     end   = ntohl(*PTR_ADJUST(m_uint32_t *,ios_ptr,0x14));
248     nvlen = physmem_copy_u32_from_vm(vm,addr+0x18);     nvlen = ntohl(*PTR_ADJUST(m_uint32_t *,ios_ptr,0x18));
249     clen  = end - start;     clen  = end - start;
250    
251     if ((clen + 1) != nvlen) {     if ((clen + 1) != nvlen) {
# Line 245  ssize_t c7200_nvram_extract_config(vm_in Line 253  ssize_t c7200_nvram_extract_config(vm_in
253        return(-1);        return(-1);
254     }     }
255    
256     if ((start <= nvram_dev->phys_addr) || (end <= nvram_dev->phys_addr) ||     if (!(*buffer = malloc(clen+1))) {
257         (end <= start))        vm_error(vm,"unable to allocate config buffer (%u bytes)\n",clen);
    {  
       vm_error(vm,"invalid configuration markers (start=0x%x,end=0x%x)\n",  
                start,end);  
258        return(-1);        return(-1);
259     }     }
260    
261     if (!(*buffer = malloc(clen+1))) {     cfg_ptr = base_ptr + (start - nvram_addr);
262        vm_error(vm,"unable to allocate config buffer (%u bytes)\n",clen);  
263       if ((start < nvram_addr) || ((cfg_ptr + clen) > end_ptr)) {
264          vm_error(vm,"NVRAM file too small\n");
265        return(-1);        return(-1);
266     }     }
267    
268     physmem_copy_from_vm(vm,*buffer,start,clen);     memcpy(*buffer,cfg_ptr,clen);
269     (*buffer)[clen] = 0;     (*buffer)[clen] = 0;
270     return(clen);     return(clen);
271  }  }
272    
273  /* Directly push the IOS configuration to the NVRAM device */  /* Directly push the IOS configuration to the NVRAM device */
274  int c7200_nvram_push_config(vm_instance_t *vm,char *buffer,size_t len)  int c7200_nvram_push_config(vm_instance_t *vm,char *buffer,size_t len)
275  {  {  
276     struct vdevice *nvram_dev;     u_char *base_ptr,*ios_ptr,*cfg_ptr;
277     m_uint64_t addr,cfg_addr,cfg_start_addr;     m_uint32_t cfg_addr,cfg_offset;
278       m_uint32_t nvram_addr,cklen;
279       m_uint16_t cksum;
280       int fd;
281    
282       fd = vm_mmap_create_file(vm,"nvram",vm->nvram_size*1024,&base_ptr);
283    
284     if (!(nvram_dev = dev_get_by_name(vm,"nvram")))     if (fd == -1)
285        return(-1);        return(-1);
286    
287     addr = nvram_dev->phys_addr + vm->nvram_rom_space;     cfg_offset = 0x2c;
288     cfg_start_addr = cfg_addr = addr + 0x40;     ios_ptr = base_ptr + vm->nvram_rom_space;
289       cfg_ptr = ios_ptr  + cfg_offset;
290    
291       nvram_addr = VM_C7200(vm)->npe_driver->nvram_addr;
292       cfg_addr = nvram_addr + vm->nvram_rom_space + cfg_offset;
293    
294     /* Write IOS tag, uncompressed config... */     /* Write IOS tag, uncompressed config... */
295     physmem_copy_u16_to_vm(vm,addr+0x06,0xF0A5);     *PTR_ADJUST(m_uint16_t *,ios_ptr,0x06) = htons(0xF0A5);
296     physmem_copy_u16_to_vm(vm,addr+0x08,0xABCD);      /* Magic number */     *PTR_ADJUST(m_uint16_t *,ios_ptr,0x08) = htons(0xABCD);
297     physmem_copy_u16_to_vm(vm,addr+0x0a,0x0001);      /* ??? */     *PTR_ADJUST(m_uint16_t *,ios_ptr,0x0a) = htons(0x0001);
298     physmem_copy_u16_to_vm(vm,addr+0x0c,0x0000);      /* zero */     *PTR_ADJUST(m_uint16_t *,ios_ptr,0x0c) = htons(0x0000);
299     physmem_copy_u16_to_vm(vm,addr+0x0e,0x0c04);      /* IOS version */     *PTR_ADJUST(m_uint16_t *,ios_ptr,0x0e) = htons(0x0000);
300    
301     /* Store file contents to NVRAM */     /* Store file contents to NVRAM */
302     physmem_copy_to_vm(vm,buffer,cfg_addr,len);     memcpy(cfg_ptr,buffer,len);
303    
304     /* Write config addresses + size */     /* Write config addresses + size */
305     physmem_copy_u32_to_vm(vm,addr+0x10,cfg_start_addr);     *PTR_ADJUST(m_uint32_t *,ios_ptr,0x10) = htonl(cfg_addr);
306     physmem_copy_u32_to_vm(vm,addr+0x14,cfg_addr);     *PTR_ADJUST(m_uint32_t *,ios_ptr,0x14) = htonl(cfg_addr + len);
307     physmem_copy_u32_to_vm(vm,addr+0x18,cfg_addr - cfg_start_addr);     *PTR_ADJUST(m_uint32_t *,ios_ptr,0x18) = htonl(len);
308     return(0);  
309  }     /* Compute the checksum */
310       cklen = (vm->nvram_size*1024) - (vm->nvram_rom_space + 0x08);
311       cksum = nvram_cksum((m_uint16_t *)(ios_ptr+0x08),cklen);
312       *PTR_ADJUST(m_uint16_t *,ios_ptr,0x0c) = htons(cksum);
313    
314  /* Find an EEPROM in the specified array */     vm_mmap_close_file(fd,base_ptr,vm->nvram_size*1024);
315  struct c7200_eeprom *c7200_get_eeprom(struct c7200_eeprom *eeproms,char *name)     return(0);
 {  
    int i;  
   
    for(i=0;eeproms[i].name;i++)  
       if (!strcmp(eeproms[i].name,name))  
          return(&eeproms[i]);  
   
    return NULL;  
316  }  }
317    
318  /* Get an EEPROM for a given NPE model */  /* Get an EEPROM for a given NPE model */
319  struct c7200_eeprom *c7200_get_cpu_eeprom(char *npe_name)  static const struct cisco_eeprom *c7200_get_cpu_eeprom(char *npe_name)
320  {  {
321     return(c7200_get_eeprom(c7200_cpu_eeprom,npe_name));     return(cisco_eeprom_find(c7200_cpu_eeprom,npe_name));
322  }  }
323    
324  /* Get an EEPROM for a given midplane model */  /* Get an EEPROM for a given midplane model */
325  struct c7200_eeprom *c7200_get_midplane_eeprom(char *midplane_name)  static const struct cisco_eeprom *
326    c7200_get_midplane_eeprom(char *midplane_name)
327  {  {
328     return(c7200_get_eeprom(c7200_midplane_eeprom,midplane_name));     return(cisco_eeprom_find(c7200_midplane_eeprom,midplane_name));
329  }  }
330    
331  /* Get a PEM EEPROM for a given NPE model */  /* Get a PEM EEPROM for a given NPE model */
332  struct c7200_eeprom *c7200_get_pem_eeprom(char *npe_name)  static const struct cisco_eeprom *c7200_get_pem_eeprom(char *npe_name)
333  {  {
334     return(c7200_get_eeprom(c7200_pem_eeprom,npe_name));     return(cisco_eeprom_find(c7200_pem_eeprom,npe_name));
335  }  }
336    
337  /* Set the base MAC address of the chassis */  /* Set the base MAC address of the chassis */
338  static int c7200_burn_mac_addr(m_uint16_t *data,size_t data_len,  static int c7200_burn_mac_addr(c7200_t *router,n_eth_addr_t *addr)
                                n_eth_addr_t *addr)  
339  {  {
340     m_uint8_t eeprom_ver;     m_uint8_t eeprom_ver;
341    
342     /* Read EEPROM format version */     /* Read EEPROM format version */
343     cisco_eeprom_get_byte(data,data_len,0,&eeprom_ver);     cisco_eeprom_get_byte(&router->mp_eeprom,0,&eeprom_ver);
344    
345     if (eeprom_ver != 1) {     if (eeprom_ver != 1) {
346        fprintf(stderr,"c7200_burn_mac_addr: unable to handle "        vm_error(router->vm,"c7200_burn_mac_addr: unable to handle "
347                "EEPROM version %u\n",eeprom_ver);                "EEPROM version %u\n",eeprom_ver);
348        return(-1);        return(-1);
349     }     }
350    
351     cisco_eeprom_set_region(data,data_len,12,addr->eth_addr_byte,6);     cisco_eeprom_set_region(&router->mp_eeprom,12,addr->eth_addr_byte,6);
352     return(0);     return(0);
353  }  }
354    
# Line 411  static int c7200_free_instance(void *dat Line 422  static int c7200_free_instance(void *dat
422        /* Free specific HW resources */        /* Free specific HW resources */
423        c7200_free_hw_ressources(router);        c7200_free_hw_ressources(router);
424    
425          /* Free EEPROMs */
426          cisco_eeprom_free(&router->cpu_eeprom);
427          cisco_eeprom_free(&router->mp_eeprom);
428          cisco_eeprom_free(&router->pem_eeprom);
429    
430        /* Free all resources used by VM */        /* Free all resources used by VM */
431        vm_free(vm);        vm_free(vm);
432    
# Line 489  void c7200_save_config_all(FILE *fd) Line 505  void c7200_save_config_all(FILE *fd)
505  /* Set NPE eeprom definition */  /* Set NPE eeprom definition */
506  static int c7200_npe_set_eeprom(c7200_t *router)  static int c7200_npe_set_eeprom(c7200_t *router)
507  {  {
508     struct c7200_eeprom *eeprom;     const struct cisco_eeprom *eeprom;
509    
510     if (!(eeprom = c7200_get_cpu_eeprom(router->npe_driver->npe_type))) {     if (!(eeprom = c7200_get_cpu_eeprom(router->npe_driver->npe_type))) {
511        vm_error(router->vm,"unknown NPE \"%s\" (internal error)!\n",        vm_error(router->vm,"unknown NPE \"%s\" (internal error)!\n",
# Line 497  static int c7200_npe_set_eeprom(c7200_t Line 513  static int c7200_npe_set_eeprom(c7200_t
513        return(-1);        return(-1);
514     }     }
515    
516     router->cpu_eeprom.data = eeprom->data;     if (cisco_eeprom_copy(&router->cpu_eeprom,eeprom) == -1) {
517     router->cpu_eeprom.data_len = eeprom->len;        vm_error(router->vm,"unable to set NPE EEPROM.\n");
518          return(-1);
519       }
520    
521     return(0);     return(0);
522  }  }
523    
524  /* Set PEM eeprom definition */  /* Set PEM eeprom definition */
525  static int c7200_pem_set_eeprom(c7200_t *router)  static int c7200_pem_set_eeprom(c7200_t *router)
526  {  {
527     struct c7200_eeprom *eeprom;     const struct cisco_eeprom *eeprom;
528    
529     if (!(eeprom = c7200_get_pem_eeprom(router->npe_driver->npe_type))) {     if (!(eeprom = c7200_get_pem_eeprom(router->npe_driver->npe_type))) {
530        vm_error(router->vm,"no PEM EEPROM found for NPE type \"%s\"!\n",        vm_error(router->vm,"no PEM EEPROM found for NPE type \"%s\"!\n",
# Line 513  static int c7200_pem_set_eeprom(c7200_t Line 532  static int c7200_pem_set_eeprom(c7200_t
532        return(-1);        return(-1);
533     }     }
534    
535     router->pem_eeprom.data = eeprom->data;     if (cisco_eeprom_copy(&router->pem_eeprom,eeprom) == -1) {
536     router->pem_eeprom.data_len = eeprom->len;        vm_error(router->vm,"unable to set PEM EEPROM.\n");
537          return(-1);
538       }
539    
540     return(0);     return(0);
541  }  }
542    
543  /* Set PA EEPROM definition */  /* Set PA EEPROM definition */
544  int c7200_pa_set_eeprom(c7200_t *router,u_int pa_bay,  int c7200_pa_set_eeprom(c7200_t *router,u_int pa_bay,
545                          const struct c7200_eeprom *eeprom)                          const struct cisco_eeprom *eeprom)
546  {  {
547     if (pa_bay >= C7200_MAX_PA_BAYS) {     if (pa_bay >= C7200_MAX_PA_BAYS) {
548        vm_error(router->vm,"c7200_pa_set_eeprom: invalid PA Bay %u.\n",pa_bay);        vm_error(router->vm,"c7200_pa_set_eeprom: invalid PA Bay %u.\n",pa_bay);
549        return(-1);        return(-1);
550     }     }
551      
552     router->pa_bay[pa_bay].eeprom.data = eeprom->data;     if (cisco_eeprom_copy(&router->pa_bay[pa_bay].eeprom,eeprom) == -1) {
553     router->pa_bay[pa_bay].eeprom.data_len = eeprom->len;        vm_error(router->vm,"c7200_pa_set_eeprom: no memory.\n");
554          return(-1);
555       }
556    
557     return(0);     return(0);
558  }  }
559    
# Line 540  int c7200_pa_unset_eeprom(c7200_t *route Line 565  int c7200_pa_unset_eeprom(c7200_t *route
565        return(-1);        return(-1);
566     }     }
567        
568     router->pa_bay[pa_bay].eeprom.data = (m_uint16_t *)eeprom_pa_empty;     cisco_eeprom_free(&router->pa_bay[pa_bay].eeprom);
    router->pa_bay[pa_bay].eeprom.data_len = sizeof(eeprom_pa_empty)/2;  
569     return(0);     return(0);
570  }  }
571    
572  /* Check if a bay has a port adapter */  /* Check if a bay has a port adapter */
573  int c7200_pa_check_eeprom(c7200_t *router,u_int pa_bay)  int c7200_pa_check_eeprom(c7200_t *router,u_int pa_bay)
574  {  {
    struct nmc93c46_eeprom_def *def;  
   
575     if (!pa_bay || (pa_bay >= C7200_MAX_PA_BAYS))     if (!pa_bay || (pa_bay >= C7200_MAX_PA_BAYS))
576        return(0);        return(FALSE);
   
    def = &router->pa_bay[pa_bay].eeprom;  
     
    if (def->data == eeprom_pa_empty)  
       return(0);  
577    
578     return(1);     return(cisco_eeprom_valid(&router->pa_bay[pa_bay].eeprom));
579  }  }
580    
581  /* Get bay info */  /* Get bay info */
# Line 933  int c7200_pa_shutdown_all(c7200_t *route Line 950  int c7200_pa_shutdown_all(c7200_t *route
950     return(0);     return(0);
951  }  }
952    
953    /* Show info about all NMs */
954    int c7200_pa_show_all_info(c7200_t *router)
955    {
956       struct c7200_pa_bay *bay;
957       int i;
958    
959       for(i=0;i<C7200_MAX_PA_BAYS;i++) {
960          if (!(bay = c7200_pa_get_info(router,i)) || !bay->pa_driver)
961             continue;
962    
963          if (bay->pa_driver->pa_show_info != NULL)
964             bay->pa_driver->pa_show_info(router,i);
965       }
966    
967       return(0);
968    }
969    
970  /* Maximum number of tokens in a PA description */  /* Maximum number of tokens in a PA description */
971  #define PA_DESC_MAX_TOKENS  8  #define PA_DESC_MAX_TOKENS  8
972    
# Line 1184  void c7200_npe_show_drivers(void) Line 1218  void c7200_npe_show_drivers(void)
1218  /* Set Midplane type */  /* Set Midplane type */
1219  int c7200_midplane_set_type(c7200_t *router,char *midplane_type)  int c7200_midplane_set_type(c7200_t *router,char *midplane_type)
1220  {  {
1221     struct c7200_eeprom *eeprom;     const struct cisco_eeprom *eeprom;
1222     m_uint8_t version;     m_uint8_t version;
1223    
1224     if (router->vm->status == VM_STATUS_RUNNING) {     if (router->vm->status == VM_STATUS_RUNNING) {
# Line 1198  int c7200_midplane_set_type(c7200_t *rou Line 1232  int c7200_midplane_set_type(c7200_t *rou
1232        return(-1);        return(-1);
1233     }     }
1234    
1235     memcpy(router->mp_eeprom_data,eeprom->data,eeprom->len << 1);     /* Copy the midplane EEPROM */
1236       if (cisco_eeprom_copy(&router->mp_eeprom,eeprom) == -1) {
1237          vm_error(router->vm,"unable to set midplane EEPROM.\n");
1238          return(-1);
1239       }
1240    
1241     /* Set the chassis base MAC address */     /* Set the chassis base MAC address */
1242     c7200_burn_mac_addr(router->mp_eeprom_data,sizeof(router->mp_eeprom_data),     c7200_burn_mac_addr(router,&router->mac_addr);
                        &router->mac_addr);  
   
    router->mp_eeprom.data = router->mp_eeprom_data;  
    router->mp_eeprom.data_len = eeprom->len;  
    router->midplane_type = eeprom->name;  
1243    
1244     /* Get the midplane version */     /* Get the midplane version */
1245     cisco_eeprom_get_byte(router->mp_eeprom.data,router->mp_eeprom.data_len*2,     cisco_eeprom_get_byte(&router->mp_eeprom,2,&version);
1246                           2,&version);     router->midplane_version = version;  
1247     router->midplane_version = version;     router->midplane_type = eeprom->name;
1248     return(0);     return(0);
1249  }  }
1250    
# Line 1224  int c7200_midplane_set_mac_addr(c7200_t Line 1257  int c7200_midplane_set_mac_addr(c7200_t
1257     }     }
1258    
1259     /* Set the chassis base MAC address */     /* Set the chassis base MAC address */
1260     c7200_burn_mac_addr(router->mp_eeprom_data,sizeof(router->mp_eeprom_data),     c7200_burn_mac_addr(router,&router->mac_addr);
                        &router->mac_addr);  
1261     return(0);     return(0);
1262  }  }
1263    
# Line 1614  int c7200_init_npe300(c7200_t *router) Line 1646  int c7200_init_npe300(c7200_t *router)
1646    
1647     /* 32 Mb of I/O memory */     /* 32 Mb of I/O memory */
1648     vm->iomem_size = 32;     vm->iomem_size = 32;
1649     dev_ram_init(vm,"iomem",vm->ram_mmap,C7200_IOMEM_ADDR,32*1048576);     dev_ram_init(vm,"iomem",vm->ram_mmap,TRUE,NULL,C7200_IOMEM_ADDR,32*1048576);
1650    
1651     /* Initialize the two Galileo GT-64120 system controllers */     /* Initialize the two Galileo GT-64120 system controllers */
1652     if (c7200_init_dual_gt64120(router) == -1)     if (c7200_init_dual_gt64120(router) == -1)
# Line 1671  int c7200_init_npe400(c7200_t *router) Line 1703  int c7200_init_npe400(c7200_t *router)
1703     if (vm->ram_size > C7200_BASE_RAM_LIMIT) {     if (vm->ram_size > C7200_BASE_RAM_LIMIT) {
1704        vm->iomem_size = vm->ram_size - C7200_BASE_RAM_LIMIT;        vm->iomem_size = vm->ram_size - C7200_BASE_RAM_LIMIT;
1705        vm->ram_size = C7200_BASE_RAM_LIMIT;        vm->ram_size = C7200_BASE_RAM_LIMIT;
1706        dev_ram_init(vm,"ram1",vm->ram_mmap,        dev_ram_init(vm,"ram1",vm->ram_mmap,TRUE,NULL,
1707                     C7200_IOMEM_ADDR,vm->iomem_size*1048576);                     C7200_IOMEM_ADDR,vm->iomem_size*1048576);
1708     }     }
1709    
# Line 1799  void c7200_init_defaults(c7200_t *router Line 1831  void c7200_init_defaults(c7200_t *router
1831    
1832     /* Generate a chassis MAC address based on the instance ID */     /* Generate a chassis MAC address based on the instance ID */
1833     m = &router->mac_addr;     m = &router->mac_addr;
1834     m->eth_addr_byte[0] = 0xCA;     m->eth_addr_byte[0] = vm_get_mac_addr_msb(vm);
1835     m->eth_addr_byte[1] = vm->instance_id & 0xFF;     m->eth_addr_byte[1] = vm->instance_id & 0xFF;
1836     m->eth_addr_byte[2] = pid >> 8;     m->eth_addr_byte[2] = pid >> 8;
1837     m->eth_addr_byte[3] = pid & 0xFF;     m->eth_addr_byte[3] = pid & 0xFF;
# Line 1821  void c7200_init_defaults(c7200_t *router Line 1853  void c7200_init_defaults(c7200_t *router
1853    
1854     vm->pcmcia_disk_size[0] = C7200_DEFAULT_DISK0_SIZE;     vm->pcmcia_disk_size[0] = C7200_DEFAULT_DISK0_SIZE;
1855     vm->pcmcia_disk_size[1] = C7200_DEFAULT_DISK1_SIZE;     vm->pcmcia_disk_size[1] = C7200_DEFAULT_DISK1_SIZE;
1856    
1857       /* Enable NVRAM operations to load/store configs */
1858       vm->nvram_extract_config = c7200_nvram_extract_config;
1859       vm->nvram_push_config = c7200_nvram_push_config;
1860  }  }
1861    
1862  /* Run the checklist */  /* Run the checklist */
# Line 1878  int c7200_init_platform(c7200_t *router) Line 1914  int c7200_init_platform(c7200_t *router)
1914    
1915     /* Mark the Network IO interrupt as high priority */     /* Mark the Network IO interrupt as high priority */
1916     cpu0->irq_idle_preempt[C7200_NETIO_IRQ] = TRUE;     cpu0->irq_idle_preempt[C7200_NETIO_IRQ] = TRUE;
1917       cpu0->irq_idle_preempt[C7200_GT64K_IRQ] = TRUE;
1918    
1919     /* Copy some parameters from VM to CPU0 (idle PC, ...) */     /* Copy some parameters from VM to CPU0 (idle PC, ...) */
1920     cpu0->idle_pc = vm->idle_pc;     cpu0->idle_pc = vm->idle_pc;
# Line 1916  int c7200_init_platform(c7200_t *router) Line 1953  int c7200_init_platform(c7200_t *router)
1953        return(-1);        return(-1);
1954    
1955     /* Initialize RAM */     /* Initialize RAM */
1956     dev_ram_init(vm,"ram",vm->ram_mmap,0x00000000ULL,vm->ram_size*1048576);     vm_ram_init(vm,0x00000000ULL);
1957    
1958     /* Initialize ROM */     /* Initialize ROM */
1959     if (!vm->rom_filename) {     if (!vm->rom_filename) {
# Line 1924  int c7200_init_platform(c7200_t *router) Line 1961  int c7200_init_platform(c7200_t *router)
1961        dev_rom_init(vm,"rom",C7200_ROM_ADDR,vm->rom_size*1048576);        dev_rom_init(vm,"rom",C7200_ROM_ADDR,vm->rom_size*1048576);
1962     } else {     } else {
1963        /* use alternate ROM */        /* use alternate ROM */
1964        dev_ram_init(vm,"rom",TRUE,C7200_ROM_ADDR,vm->rom_size*1048576);        dev_ram_init(vm,"rom",TRUE,TRUE,NULL,
1965                       C7200_ROM_ADDR,vm->rom_size*1048576);
1966     }     }
1967    
1968     /* PCI IO space */     /* PCI IO space */
# Line 1956  int c7200_init_platform(c7200_t *router) Line 1994  int c7200_init_platform(c7200_t *router)
1994        c7200_pa_init(router,0);        c7200_pa_init(router,0);
1995     }     }
1996    
    /* Enable NVRAM operations to load/store configs */  
    vm->nvram_extract_config = c7200_nvram_extract_config;  
    vm->nvram_push_config = c7200_nvram_push_config;  
   
1997     /* Verify the check list */     /* Verify the check list */
1998     if (c7200_checklist(router) == -1)     if (c7200_checklist(router) == -1)
1999        return(-1);        return(-1);
# Line 1991  int c7200_boot_ios(c7200_t *router) Line 2025  int c7200_boot_ios(c7200_t *router)
2025    
2026     /* Load IOS image */     /* Load IOS image */
2027     if (mips64_load_elf_image(vm->boot_cpu,vm->ios_image,     if (mips64_load_elf_image(vm->boot_cpu,vm->ios_image,
2028                               &vm->ios_entry_point) < 0)                               (vm->ghost_status == VM_GHOST_RAM_USE),
2029                                 &vm->ios_entry_point) < 0)
2030     {     {
2031        vm_error(vm,"failed to load Cisco IOS image '%s'.\n",vm->ios_image);        vm_error(vm,"failed to load Cisco IOS image '%s'.\n",vm->ios_image);
2032        return(-1);        return(-1);
# Line 2007  int c7200_boot_ios(c7200_t *router) Line 2042  int c7200_boot_ios(c7200_t *router)
2042            vm->boot_cpu->pc,vm->boot_cpu->idle_pc,vm->jit_use ? "on":"off");            vm->boot_cpu->pc,vm->boot_cpu->idle_pc,vm->jit_use ? "on":"off");
2043        
2044     /* Start main CPU */     /* Start main CPU */
2045     vm->status = VM_STATUS_RUNNING;     if (vm->ghost_status != VM_GHOST_RAM_GENERATE) {
2046     cpu_start(vm->boot_cpu);        vm->status = VM_STATUS_RUNNING;
2047          cpu_start(vm->boot_cpu);
2048       } else {
2049          vm->status = VM_STATUS_SHUTDOWN;
2050       }
2051     return(0);     return(0);
2052  }  }
2053    
# Line 2036  int c7200_init_instance(c7200_t *router) Line 2075  int c7200_init_instance(c7200_t *router)
2075     rom_entry_point = (m_uint32_t)MIPS_ROM_PC;     rom_entry_point = (m_uint32_t)MIPS_ROM_PC;
2076        
2077     if ((vm->rom_filename != NULL) &&     if ((vm->rom_filename != NULL) &&
2078         (mips64_load_elf_image(cpu0,vm->rom_filename,&rom_entry_point) < 0))         (mips64_load_elf_image(cpu0,vm->rom_filename,0,&rom_entry_point) < 0))
2079     {     {
2080        vm_error(vm,"unable to load alternate ROM '%s', "        vm_error(vm,"unable to load alternate ROM '%s', "
2081                 "fallback to embedded ROM.\n\n",vm->rom_filename);                 "fallback to embedded ROM.\n\n",vm->rom_filename);
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