/[dynamips]/upstream/dynamips-0.2.6-RC2/nojit_trans.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Annotation of /upstream/dynamips-0.2.6-RC2/nojit_trans.c

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Revision 2 - (hide annotations)
Sat Oct 6 16:03:58 2007 UTC (16 years, 5 months ago) by dpavlin
Original Path: upstream/dynamips-0.2.6-RC1/nojit_trans.c
File MIME type: text/plain
File size: 1659 byte(s)
import dynamips-0.2.6-RC1

1 dpavlin 1 /*
2     * Cisco 7200 (Predator) simulation platform.
3     * Copyright (c) 2006 Christophe Fillot (cf@utc.fr)
4     *
5     * Just an empty JIT template file for architectures not supported by the JIT
6     * code.
7     */
8    
9     #include <stdio.h>
10     #include <stdlib.h>
11     #include <unistd.h>
12     #include <string.h>
13     #include <sys/types.h>
14     #include <sys/stat.h>
15     #include <sys/mman.h>
16     #include <fcntl.h>
17    
18     #include "nojit_trans.h"
19    
20     /* Set an IRQ */
21     void mips64_set_irq(cpu_mips_t *cpu,m_uint8_t irq)
22     {
23     m_uint32_t m;
24     m = (1 << (irq + MIPS_CP0_CAUSE_ISHIFT)) & MIPS_CP0_CAUSE_IMASK;
25     MIPS64_IRQ_LOCK(cpu);
26     cpu->irq_cause |= m;
27     MIPS64_IRQ_UNLOCK(cpu);
28     }
29    
30     /* Clear an IRQ */
31     void mips64_clear_irq(cpu_mips_t *cpu,m_uint8_t irq)
32     {
33     m_uint32_t m;
34    
35     m = (1 << (irq + MIPS_CP0_CAUSE_ISHIFT)) & MIPS_CP0_CAUSE_IMASK;
36     MIPS64_IRQ_LOCK(cpu);
37     cpu->irq_cause &= ~m;
38     MIPS64_IRQ_UNLOCK(cpu);
39    
40     if (!cpu->irq_cause)
41     cpu->irq_pending = 0;
42     }
43    
44     #define EMPTY(func) func { \
45     fprintf(stderr,"This function should not be called: "#func"\n"); \
46     abort(); \
47     }
48    
49     EMPTY(void insn_block_push_epilog(insn_block_t *block));
50     EMPTY(void insn_block_exec_jit_code(cpu_mips_t *cpu,insn_block_t *block));
51     EMPTY(void mips64_set_pc(insn_block_t *b,m_uint64_t new_pc));
52     EMPTY(void mips64_set_ra(insn_block_t *b,m_uint64_t ret_pc));
53     EMPTY(void mips64_emit_breakpoint(insn_block_t *b));
54     EMPTY(void mips64_emit_invalid_delay_slot(insn_block_t *b));
55     EMPTY(void mips64_inc_cp0_count_reg(insn_block_t *b));
56     EMPTY(void mips64_check_pending_irq(insn_block_t *b));
57     EMPTY(void mips64_inc_perf_counter(insn_block_t *b));
58    
59     /* MIPS instruction array */
60     struct insn_tag mips64_insn_tags[] = {
61     { NULL, 0, 0, 0 },
62     };

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