/[dynamips]/upstream/dynamips-0.2.6-RC2/memory.h
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Annotation of /upstream/dynamips-0.2.6-RC2/memory.h

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Revision 1 - (hide annotations)
Sat Oct 6 16:01:44 2007 UTC (16 years, 5 months ago) by dpavlin
Original Path: upstream/dynamips-0.2.5/memory.h
File MIME type: text/plain
File size: 4878 byte(s)
import 0.2.5 from upstream

1 dpavlin 1 /*
2     * Cisco 7200 (Predator) simulation platform.
3     * Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr)
4     */
5    
6     #ifndef __MEMORY_H__
7     #define __MEMORY_H__
8    
9     #ifndef DYNAMIPS_ASM
10     #include <sys/types.h>
11     #include "utils.h"
12     #endif
13    
14     /* MTS operation */
15     #define MTS_READ 0
16     #define MTS_WRITE 1
17    
18     /* 0.5GB value */
19     #define MTS_SIZE_512M 0x20000000
20    
21     /* MTS flag bits: D (device), ACC (memory access), C (chain) */
22     #define MTS_FLAG_BITS 4
23     #define MTS_FLAG_MASK 0x0000000fUL
24    
25     /* Masks for MTS entries */
26     #define MTS_CHAIN_MASK 0x00000001
27     #define MTS_ACC_MASK 0x00000006
28     #define MTS_DEV_MASK 0x00000008
29     #define MTS_ADDR_MASK (~MTS_FLAG_MASK)
30    
31     /* Device ID mask and shift, device offset mask */
32     #define MTS_DEVID_MASK 0xfc000000
33     #define MTS_DEVID_SHIFT 26
34     #define MTS_DEVOFF_MASK 0x03fffff0
35    
36     /* Memory access flags */
37     #define MTS_ACC_OK 0x00000000 /* Access OK */
38     #define MTS_ACC_AE 0x00000002 /* Address Error */
39     #define MTS_ACC_T 0x00000004 /* TLB Exception */
40     #define MTS_ACC_U 0x00000006 /* Unexistent */
41    
42     /* 32-bit Virtual Address seen by MTS */
43     #define MTS32_LEVEL1_BITS 10
44     #define MTS32_LEVEL2_BITS 10
45     #define MTS32_OFFSET_BITS 12
46    
47     /* Each level-1 entry covers 4 Mb */
48     #define MTS32_LEVEL1_SIZE (1 << (MTS32_LEVEL2_BITS + MTS32_OFFSET_BITS))
49     #define MTS32_LEVEL1_MASK (MTS32_LEVEL1_SIZE - 1)
50    
51     /* Each level-2 entry covers 4 Kb */
52     #define MTS32_LEVEL2_SIZE (1 << MTS32_OFFSET_BITS)
53     #define MTS32_LEVEL2_MASK (MTS32_LEVEL2_SIZE - 1)
54    
55     /* Hash table size for MTS64 (default: [shift:16,bits:12]) */
56     #define MTS64_HASH_SHIFT 15
57     #define MTS64_HASH_BITS 15
58     #define MTS64_HASH_SIZE (1 << MTS64_HASH_BITS)
59     #define MTS64_HASH_MASK (MTS64_HASH_SIZE - 1)
60    
61     /* MTS64 hash on virtual addresses */
62     #define MTS64_HASH(vaddr) (((vaddr) >> MTS64_HASH_SHIFT) & MTS64_HASH_MASK)
63    
64     /* Number of entries per chunk */
65     #define MTS64_CHUNK_SIZE 256
66    
67     #ifndef DYNAMIPS_ASM
68     /* MTS32: Level 1 & 2 arrays */
69     typedef struct mts32_l1_array mts32_l1_array_t;
70     struct mts32_l1_array {
71     m_iptr_t entry[1 << MTS32_LEVEL1_BITS];
72     };
73    
74     typedef struct mts32_l2_array mts32_l2_array_t;
75     struct mts32_l2_array {
76     m_iptr_t entry[1 << MTS32_LEVEL2_BITS];
77     mts32_l2_array_t *next;
78     };
79    
80     /* MTS64: chunk definition */
81     struct mts64_chunk {
82     mts64_entry_t entry[MTS64_CHUNK_SIZE];
83     struct mts64_chunk *next;
84     u_int count;
85     };
86    
87     /* Show the last memory accesses */
88     void memlog_dump(cpu_mips_t *cpu);
89    
90     /* Allocate an L1 array */
91     mts32_l1_array_t *mts32_alloc_l1_array(m_iptr_t val);
92    
93     /* Allocate an L2 array */
94     mts32_l2_array_t *mts32_alloc_l2_array(cpu_mips_t *cpu,m_iptr_t val);
95    
96     /* Initialize an empty MTS32 subsystem */
97     int mts32_init_empty(cpu_mips_t *cpu);
98    
99     /* Free memory used by MTS32 */
100     void mts32_shutdown(cpu_mips_t *cpu);
101    
102     /* Map a physical address to the specified virtual address */
103     void mts32_map(cpu_mips_t *cpu,m_uint64_t vaddr,
104     m_uint64_t paddr,m_uint32_t len,
105     int cache_access);
106    
107     /* Unmap a memory zone */
108     void mts32_unmap(cpu_mips_t *cpu,m_uint64_t vaddr,m_uint32_t len,
109     m_uint32_t val);
110    
111     /* Map all devices for kernel mode */
112     void mts32_km_map_all_dev(cpu_mips_t *cpu);
113    
114     /* Initialize the MTS64 subsystem for the specified CPU */
115     int mts64_init(cpu_mips_t *cpu);
116    
117     /* Free memory used by MTS64 */
118     void mts64_shutdown(cpu_mips_t *cpu);
119    
120     /* Show MTS64 detailed information (debugging only!) */
121     void mts64_show_stats(cpu_mips_t *cpu);
122    
123     /* Initialize memory access vectors */
124     void mts_init_memop_vectors(cpu_mips_t *cpu);
125    
126     /* Shutdown MTS subsystem */
127     void mts_shutdown(cpu_mips_t *cpu);
128    
129     /* Copy a memory block from VM physical RAM to real host */
130     void physmem_copy_from_vm(vm_instance_t *vm,void *real_buffer,
131     m_uint64_t paddr,size_t len);
132    
133     /* Copy a memory block to VM physical RAM from real host */
134     void physmem_copy_to_vm(vm_instance_t *vm,void *real_buffer,
135     m_uint64_t paddr,size_t len);
136    
137     /* Copy a 32-bit word from the VM physical RAM to real host */
138     m_uint32_t physmem_copy_u32_from_vm(vm_instance_t *vm,m_uint64_t paddr);
139    
140     /* Copy a 32-bit word to the VM physical RAM from real host */
141     void physmem_copy_u32_to_vm(vm_instance_t *vm,m_uint64_t paddr,m_uint32_t val);
142    
143     /* Copy a 16-bit word from the VM physical RAM to real host */
144     m_uint16_t physmem_copy_u16_from_vm(vm_instance_t *vm,m_uint64_t paddr);
145    
146     /* Copy a 16-bit word to the VM physical RAM from real host */
147     void physmem_copy_u16_to_vm(vm_instance_t *vm,m_uint64_t paddr,m_uint16_t val);
148    
149     /* DMA transfer operation */
150     void physmem_dma_transfer(vm_instance_t *vm,m_uint64_t src,m_uint64_t dst,
151     size_t len);
152    
153     /* strlen in VM physical memory */
154     size_t physmem_strlen(vm_instance_t *vm,m_uint64_t paddr);
155    
156     /* Physical memory dump (32-bit words) */
157     void physmem_dump_vm(vm_instance_t *vm,m_uint64_t paddr,m_uint32_t u32_count);
158    
159     #endif /* DYNAMIPS_ASM */
160    
161     #endif

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