/[dynamips]/trunk/dev_c6msfc1.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Contents of /trunk/dev_c6msfc1.h

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Revision 12 - (show annotations)
Sat Oct 6 16:45:40 2007 UTC (16 years, 5 months ago) by dpavlin
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1 /*
2 * Cisco router simulation platform.
3 * Copyright (c) 2005,2006 Christophe Fillot (cf@utc.fr)
4 *
5 * Generic Cisco MSFC1 routines and definitions (EEPROM,...).
6 */
7
8 #ifndef __DEV_C6MSFC1_H__
9 #define __DEV_C6MSFC1_H__
10
11 #include <pthread.h>
12
13 #include "utils.h"
14 #include "net.h"
15 #include "device.h"
16 #include "pci_dev.h"
17 #include "nmc93cX6.h"
18 #include "net_io.h"
19 #include "vm.h"
20
21 /* Default MSFC1 parameters */
22 #define C6MSFC1_DEFAULT_RAM_SIZE 256
23 #define C6MSFC1_DEFAULT_ROM_SIZE 4
24 #define C6MSFC1_DEFAULT_NVRAM_SIZE 128
25 #define C6MSFC1_DEFAULT_CONF_REG 0x2102
26 #define C6MSFC1_DEFAULT_CLOCK_DIV 4
27 #define C6MSFC1_DEFAULT_RAM_MMAP 1
28
29 /* EOBC + IBC */
30 #define C6MSFC1_MAX_PA_BAYS 2
31
32 /* MSFC1 Timer IRQ (virtual) */
33 #define C6MSFC1_VTIMER_IRQ 0
34
35 /* MSFC1 DUART Interrupt */
36 #define C6MSFC1_DUART_IRQ 5
37
38 /* MSFC1 Network I/O Interrupt */
39 #define C6MSFC1_NETIO_IRQ 2
40
41 /* MSFC1 PA Management Interrupt handler */
42 #define C6MSFC1_PA_MGMT_IRQ 3
43
44 /* MSFC1 GT64k DMA/Timer Interrupt */
45 #define C6MSFC1_GT64K_IRQ 4
46
47 /* MSFC1 Error/OIR Interrupt */
48 #define C6MSFC1_OIR_IRQ 6
49
50 /* Network IRQ */
51 #define C6MSFC1_NETIO_IRQ_BASE 32
52 #define C6MSFC1_NETIO_IRQ_END \
53 (C6MSFC1_NETIO_IRQ_BASE + C6MSFC1_MAX_PA_BAYS - 1)
54
55 /* MSFC1 base ram limit (256 Mb) */
56 #define C6MSFC1_BASE_RAM_LIMIT 256
57
58 /* MSFC1 common device addresses */
59 #define C6MSFC1_GT64K_ADDR 0x14000000ULL
60 #define C6MSFC1_GT64K_SEC_ADDR 0x15000000ULL
61 #define C6MSFC1_BOOTFLASH_ADDR 0x1a000000ULL
62 #define C6MSFC1_NVRAM_ADDR 0x1e000000ULL
63 #define C6MSFC1_MPFPGA_ADDR 0x1e800000ULL
64 #define C6MSFC1_IOFPGA_ADDR 0x1e840000ULL
65 #define C6MSFC1_BITBUCKET_ADDR 0x1f000000ULL
66 #define C6MSFC1_ROM_ADDR 0x1fc00000ULL
67 #define C6MSFC1_IOMEM_ADDR 0x20000000ULL
68 #define C6MSFC1_SRAM_ADDR 0x4b000000ULL
69 #define C6MSFC1_BSWAP_ADDR 0xc0000000ULL
70 #define C6MSFC1_PCI_IO_ADDR 0x100000000ULL
71
72 /* SRAM size */
73 #define C6MSFC1_SRAM_SIZE (4096*1024)
74
75 /* Reserved space for ROM in NVRAM */
76 #define C6MSFC1_NVRAM_ROM_RES_SIZE 2048
77
78 /* MSFC1 physical address bus mask: keep only the lower 33 bits */
79 #define C6MSFC1_ADDR_BUS_MASK 0x1ffffffffULL
80
81 /* MSFC1 ELF Platform ID */
82 #define C6MSFC1_ELF_MACHINE_ID 0x19
83
84 #define VM_C6MSFC1(vm) ((c6msfc1_t *)vm->hw_data)
85
86 /* MSFC1 router */
87 typedef struct c6msfc1_router c6msfc1_t;
88
89 /* MSFC1 router */
90 struct c6msfc1_router {
91 /* Chassis MAC address */
92 n_eth_addr_t mac_addr;
93
94 /* Associated VM instance */
95 vm_instance_t *vm;
96
97 /* Midplane FPGA */
98 struct c6msfc1_mpfpga_data *mpfpga_data;
99
100 /* Midplane EEPROM can be modified to change the chassis MAC address... */
101 struct cisco_eeprom cpu_eeprom,mp_eeprom,pem_eeprom;
102
103 /* EEPROMs for CPU and Midplane */
104 struct nmc93cX6_group sys_eeprom_g1;
105
106 /* Slot of this MSFC */
107 u_int msfc_slot;
108 };
109
110 /* Initialize EEPROM groups */
111 void c6msfc1_init_eeprom_groups(c6msfc1_t *router);
112
113 /* Get network IRQ for specified slot/port */
114 u_int c6msfc1_net_irq_for_slot_port(u_int slot,u_int port);
115
116 /* Show the list of available PA drivers */
117 void c6msfc1_pa_show_drivers(void);
118
119 /* Set chassis MAC address */
120 int c6msfc1_midplane_set_mac_addr(c6msfc1_t *router,char *mac_addr);
121
122 /* Show MSFC1 hardware info */
123 void c6msfc1_show_hardware(c6msfc1_t *router);
124
125 /* dev_c6msfc1_iofpga_init() */
126 int dev_c6msfc1_iofpga_init(c6msfc1_t *router,m_uint64_t paddr,m_uint32_t len);
127
128 /* dev_mpfpga_init() */
129 int dev_c6msfc1_mpfpga_init(c6msfc1_t *router,m_uint64_t paddr,m_uint32_t len);
130
131 /* Register the c6msfc1 platform */
132 int c6msfc1_platform_register(void);
133
134 #endif

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