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/* |
/* |
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* Cisco 3725 simulation platform. |
* Cisco router simulation platform. |
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* Copyright (c) 2006 Christophe Fillot (cf@utc.fr) |
* Copyright (c) 2006 Christophe Fillot (cf@utc.fr) |
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* |
* |
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* Generic Cisco 3725 routines and definitions (EEPROM,...). |
* Generic Cisco 3725 routines and definitions (EEPROM,...). |
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#include "net.h" |
#include "net.h" |
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#include "device.h" |
#include "device.h" |
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#include "pci_dev.h" |
#include "pci_dev.h" |
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#include "nmc93c46.h" |
#include "nmc93cX6.h" |
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#include "net_io.h" |
#include "net_io.h" |
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#include "vm.h" |
#include "vm.h" |
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/* C3725 External Interrupt */ |
/* C3725 External Interrupt */ |
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#define C3725_EXT_IRQ 6 |
#define C3725_EXT_IRQ 6 |
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/* Network IRQ */ |
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#define C3725_NETIO_IRQ_BASE 32 |
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#define C3725_NETIO_IRQ_PORT_BITS 2 |
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#define C3725_NETIO_IRQ_PORT_MASK ((1 << C3725_NETIO_IRQ_PORT_BITS) - 1) |
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#define C3725_NETIO_IRQ_PER_SLOT (1 << C3725_NETIO_IRQ_PORT_BITS) |
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#define C3725_NETIO_IRQ_END \ |
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(C3725_NETIO_IRQ_BASE + (C3725_MAX_NM_BAYS * C3725_NETIO_IRQ_PER_SLOT) - 1) |
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/* C3725 common device addresses */ |
/* C3725 common device addresses */ |
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#define C3725_GT96K_ADDR 0x14000000ULL |
#define C3725_GT96K_ADDR 0x14000000ULL |
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#define C3725_IOFPGA_ADDR 0x1e800000ULL |
#define C3725_IOFPGA_ADDR 0x1e800000ULL |
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/* IO memory size to be passed to Smart Init */ |
/* IO memory size to be passed to Smart Init */ |
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u_int nm_iomem_size; |
u_int nm_iomem_size; |
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/* I/O FPGA */ |
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struct c3725_iofpga_data *iofpga_data; |
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/* Chassis information */ |
/* Chassis information */ |
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struct c3725_nm_bay nm_bay[C3725_MAX_NM_BAYS]; |
struct c3725_nm_bay nm_bay[C3725_MAX_NM_BAYS]; |
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m_uint8_t oir_status; |
m_uint8_t oir_status; |
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* It can be modified to change the chassis MAC address. |
* It can be modified to change the chassis MAC address. |
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*/ |
*/ |
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struct cisco_eeprom mb_eeprom; |
struct cisco_eeprom mb_eeprom; |
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struct nmc93c46_group mb_eeprom_group; |
struct nmc93cX6_group mb_eeprom_group; |
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/* Network Module EEPROMs */ |
/* Network Module EEPROMs */ |
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struct nmc93c46_group nm_eeprom_group[2]; |
struct nmc93cX6_group nm_eeprom_group[2]; |
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}; |
}; |
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/* Create a new router instance */ |
/* Create a new router instance */ |
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/* Save configurations of all C3725 instances */ |
/* Save configurations of all C3725 instances */ |
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void c3725_save_config_all(FILE *fd); |
void c3725_save_config_all(FILE *fd); |
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/* Get network IRQ for specified slot/port */ |
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u_int c3725_net_irq_for_slot_port(u_int slot,u_int port); |
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/* Get PCI device for the specified NM bay */ |
/* Get PCI device for the specified NM bay */ |
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int c3725_nm_get_pci_device(u_int nm_bay); |
int c3725_nm_get_pci_device(u_int nm_bay); |
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/* Initialize EEPROM groups */ |
/* Initialize EEPROM groups */ |
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void c3725_init_eeprom_groups(c3725_t *router); |
void c3725_init_eeprom_groups(c3725_t *router); |
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/* dev_c3725_iofpga_init() */ |
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int dev_c3725_iofpga_init(c3725_t *router,m_uint64_t paddr,m_uint32_t len); |
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/* NM drivers */ |
/* NM drivers */ |
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extern struct c3725_nm_driver dev_c3725_nm_1fe_tx_driver; |
extern struct c3725_nm_driver dev_c3725_nm_1fe_tx_driver; |
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extern struct c3725_nm_driver dev_c3725_gt96100_fe_driver; |
extern struct c3725_nm_driver dev_c3725_gt96100_fe_driver; |