/[pearpc]/src/debug/x86opc.cc
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Contents of /src/debug/x86opc.cc

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Revision 1 - (show annotations)
Wed Sep 5 17:11:21 2007 UTC (16 years, 6 months ago) by dpavlin
File size: 24588 byte(s)
import upstream CVS
1 /*
2 * HT Editor
3 * x86opc.cc
4 *
5 * Copyright (C) 1999-2002 Stefan Weyergraf
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21 #include "x86opc.h"
22
23 /* Percent tokens in strings:
24 First char after '%':
25 A - direct address
26 C - reg of r/m picks control register
27 D - reg of r/m picks debug register
28 E - r/m picks operand
29 F - flags register
30 G - reg of r/m picks general register
31 I - immediate data (takes extended size, data size)
32 J - relative IP offset
33 M - r/m picks memory
34 O - no r/m, offset only
35 P - reg of r/m picks mm register (mm0-mm7)
36 Q - r/m picks mm operand (mm0-mm7/mem64)
37 R - mod of r/m picks register only
38 S - reg of r/m picks segment register
39 T - reg of r/m picks test register
40 X - DS:ESI
41 Y - ES:EDI
42 2 - prefix of two-unsigned char opcode
43 3 - prefix of 3DNow! opcode
44 e - put in 'e' if use32 (second char is part of reg name)
45 put in 'w' for use16 or 'd' for use32 (second char is 'w')
46 f - floating point (second char is esc value)
47 g - do r/m group n (where n may be one of 0-9,A-Z)
48 p - prefix
49 s - size override (second char is a,o)
50 + - make default signed
51 Second char after '%':
52 a - two words in memory (BOUND)
53 b - byte
54 c - byte or word
55 d - dword
56 p - 32 or 48 bit pointer
57 q - quadword
58 s - six unsigned char pseudo-descriptor
59 v - word or dword
60 w - word
61 F - use floating regs in mod/rm
62 + - always sign
63 - - sign if negative
64 1-8 - group number, esc value, etc
65 */
66
67 #define Ap TYPE_A, 0, SIZE_P, SIZE_P
68 #define Cd TYPE_C, 0, SIZE_D, SIZE_D
69 #define Dd TYPE_D, 0, SIZE_D, SIZE_D
70 #define E TYPE_E, 0, SIZE_0, SIZE_0
71 #define Eb TYPE_E, 0, SIZE_B, SIZE_B
72 #define Ew TYPE_E, 0, SIZE_W, SIZE_W
73 #define Ed TYPE_E, 0, SIZE_D, SIZE_D
74 #define Eq TYPE_E, 0, SIZE_Q, SIZE_Q
75 #define Ev TYPE_E, 0, SIZE_V, SIZE_V
76 #define Es TYPE_E, 0, SIZE_S, SIZE_S
77 #define El TYPE_E, 0, SIZE_L, SIZE_L
78 #define Et TYPE_E, 0, SIZE_T, SIZE_T
79 #define Ea TYPE_E, 0, SIZE_A, SIZE_A
80 #define Gb TYPE_G, 0, SIZE_B, SIZE_B
81 #define Gw TYPE_G, 0, SIZE_W, SIZE_W
82 #define Gv TYPE_G, 0, SIZE_V, SIZE_V
83 #define Ib TYPE_I, 0, SIZE_B, SIZE_B
84 #define Iw TYPE_I, 0, SIZE_W, SIZE_W
85 #define Iv TYPE_I, 0, SIZE_V, SIZE_V
86 #define Ibv TYPE_I, 0, SIZE_B, SIZE_V
87 #define sIbv TYPE_Is,0, SIZE_B, SIZE_V
88 #define Jb TYPE_J, 0, SIZE_B, SIZE_B
89 #define Jv TYPE_J, 0, SIZE_V, SIZE_V
90 #define M TYPE_M, 0, 0, 0
91 #define Mw TYPE_M, 0, SIZE_W, SIZE_W
92 #define Md TYPE_M, 0, SIZE_D, SIZE_D
93 #define Mp TYPE_M, 0, SIZE_P, SIZE_P
94 #define Mq TYPE_M, 0, SIZE_Q, SIZE_Q
95 #define Ms TYPE_M, 0, SIZE_S, SIZE_S
96 #define Ml TYPE_M, 0, SIZE_L, SIZE_L
97 #define Mt TYPE_M, 0, SIZE_T, SIZE_T
98 #define Ma TYPE_M, 0, SIZE_A, SIZE_A
99 #define Ob TYPE_O, 0, SIZE_B, SIZE_B
100 #define Ov TYPE_O, 0, SIZE_V, SIZE_V
101 #define Pd TYPE_P, 0, SIZE_D, SIZE_D
102 #define Pq TYPE_P, 0, SIZE_Q, SIZE_Q
103 #define Qd TYPE_Q, 0, SIZE_D, SIZE_D
104 #define Qq TYPE_Q, 0, SIZE_Q, SIZE_Q
105 #define Rb TYPE_R, 0, SIZE_B, SIZE_B
106 #define Rw TYPE_R, 0, SIZE_W, SIZE_W
107 #define Rd TYPE_R, 0, SIZE_D, SIZE_D
108 #define Rv TYPE_R, 0, SIZE_V, SIZE_V
109 #define Sw TYPE_S, 0, SIZE_W, SIZE_W
110 #define Td TYPE_T, 0, SIZE_D, SIZE_D
111
112 #define Ft TYPE_F, 0, SIZE_T, SIZE_T
113
114 #define __st TYPE_Fx, 0, SIZE_T, SIZE_T
115
116 #define __1 TYPE_Ix, 1, SIZE_B, SIZE_B
117 #define __3 TYPE_Ix, 3, SIZE_B, SIZE_B /* for int 3 */
118
119 #define __al TYPE_Rx, 0, SIZE_B, SIZE_B
120 #define __cl TYPE_Rx, 1, SIZE_B, SIZE_B
121 #define __dl TYPE_Rx, 2, SIZE_B, SIZE_B
122 #define __bl TYPE_Rx, 3, SIZE_B, SIZE_B
123 #define __ah TYPE_Rx, 4, SIZE_B, SIZE_B
124 #define __ch TYPE_Rx, 5, SIZE_B, SIZE_B
125 #define __dh TYPE_Rx, 6, SIZE_B, SIZE_B
126 #define __bh TYPE_Rx, 7, SIZE_B, SIZE_B
127
128 #define __ax TYPE_Rx, 0, SIZE_V, SIZE_V
129 #define __cx TYPE_Rx, 1, SIZE_V, SIZE_V
130 #define __dx TYPE_Rx, 2, SIZE_V, SIZE_V
131 #define __bx TYPE_Rx, 3, SIZE_V, SIZE_V
132 #define __sp TYPE_Rx, 4, SIZE_V, SIZE_V
133 #define __bp TYPE_Rx, 5, SIZE_V, SIZE_V
134 #define __si TYPE_Rx, 6, SIZE_V, SIZE_V
135 #define __di TYPE_Rx, 7, SIZE_V, SIZE_V
136
137 #define __axw TYPE_Rx, 0, SIZE_W, SIZE_W
138 #define __dxw TYPE_Rx, 2, SIZE_W, SIZE_W
139
140 #define __axd TYPE_Rx, 0, SIZE_D, SIZE_D
141 #define __cxd TYPE_Rx, 1, SIZE_D, SIZE_D
142 #define __dxd TYPE_Rx, 2, SIZE_D, SIZE_D
143 #define __bxd TYPE_Rx, 3, SIZE_D, SIZE_D
144 #define __spd TYPE_Rx, 4, SIZE_D, SIZE_D
145 #define __bpd TYPE_Rx, 5, SIZE_D, SIZE_D
146 #define __sid TYPE_Rx, 6, SIZE_D, SIZE_D
147 #define __did TYPE_Rx, 7, SIZE_D, SIZE_D
148
149 #define __es TYPE_Sx, 0, SIZE_W, SIZE_W
150 #define __cs TYPE_Sx, 1, SIZE_W, SIZE_W
151 #define __ss TYPE_Sx, 2, SIZE_W, SIZE_W
152 #define __ds TYPE_Sx, 3, SIZE_W, SIZE_W
153 #define __fs TYPE_Sx, 4, SIZE_W, SIZE_W
154 #define __gs TYPE_Sx, 5, SIZE_W, SIZE_W
155
156 #define __st0 TYPE_F, 0, SIZE_T, SIZE_T
157 #define __st1 TYPE_F, 1, SIZE_T, SIZE_T
158 #define __st2 TYPE_F, 2, SIZE_T, SIZE_T
159 #define __st3 TYPE_F, 3, SIZE_T, SIZE_T
160 #define __st4 TYPE_F, 4, SIZE_T, SIZE_T
161 #define __st5 TYPE_F, 5, SIZE_T, SIZE_T
162 #define __st6 TYPE_F, 6, SIZE_T, SIZE_T
163 #define __st7 TYPE_F, 7, SIZE_T, SIZE_T
164
165 char *x86_regs[3][8] = {
166 {"al", "cl", "dl", "bl", "ah", "ch", "dh", "bh"},
167 {"ax", "cx", "dx", "bx", "sp", "bp", "si", "di"},
168 {"eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi"}
169 };
170
171 char *x86_segs[8] = {
172 "es", "cs", "ss", "ds", "fs", "gs", 0, 0
173 };
174
175 #define GROUP_80 0
176 #define GROUP_81 1
177 #define GROUP_83 2
178 #define GROUP_C0 3
179 #define GROUP_C1 4
180 #define GROUP_D0 5
181 #define GROUP_D1 6
182 #define GROUP_D2 7
183 #define GROUP_D3 8
184 #define GROUP_F6 9
185 #define GROUP_F7 10
186 #define GROUP_FE 11
187 #define GROUP_FF 12
188 #define GROUP_EXT_00 13
189 #define GROUP_EXT_01 14
190 #define GROUP_EXT_71 15
191 #define GROUP_EXT_72 16
192 #define GROUP_EXT_73 17
193 #define GROUP_EXT_BA 18
194 #define GROUP_EXT_C7 19
195 //#define GROUP_EXT_AE 20
196
197 x86opc_insn x86_insns[256] = {
198 /* 00 */
199 {"add", {{Eb}, {Gb}}},
200 {"add", {{Ev}, {Gv}}},
201 {"add", {{Gb}, {Eb}}},
202 {"add", {{Gv}, {Ev}}},
203 {"add", {{__al}, {Ib}}},
204 {"add", {{__ax}, {Iv}}},
205 {"push", {{__es}}},
206 {"pop", {{__es}}},
207 /* 08 */
208 {"or", {{Eb}, {Gb}}},
209 {"or", {{Ev}, {Gv}}},
210 {"or", {{Gb}, {Eb}}},
211 {"or", {{Gv}, {Ev}}},
212 {"or", {{__al}, {Ib}}},
213 {"or", {{__ax}, {Iv}}},
214 {"push", {{__cs}}},
215 {0, {{SPECIAL_TYPE_PREFIX}}}, /* prefix */
216 /* 10 */
217 {"adc", {{Eb}, {Gb}}},
218 {"adc", {{Ev}, {Gv}}},
219 {"adc", {{Gb}, {Eb}}},
220 {"adc", {{Gv}, {Ev}}},
221 {"adc", {{__al}, {Ib}}},
222 {"adc", {{__ax}, {Iv}}},
223 {"push", {{__ss}}},
224 {"pop", {{__ss}}},
225 /* 18 */
226 {"sbb", {{Eb}, {Gb}}},
227 {"sbb", {{Ev}, {Gv}}},
228 {"sbb", {{Gb}, {Eb}}},
229 {"sbb", {{Gv}, {Ev}}},
230 {"sbb", {{__al}, {Ib}}},
231 {"sbb", {{__ax}, {Iv}}},
232 {"push", {{__ds}}},
233 {"pop", {{__ds}}},
234 /* 20 */
235 {"and", {{Eb}, {Gb}}},
236 {"and", {{Ev}, {Gv}}},
237 {"and", {{Gb}, {Eb}}},
238 {"and", {{Gv}, {Ev}}},
239 {"and", {{__al}, {Ib}}},
240 {"and", {{__ax}, {Iv}}},
241 {0, {{SPECIAL_TYPE_PREFIX}}}, /* es-prefix */
242 {"daa"},
243 /* 28 */
244 {"sub", {{Eb}, {Gb}}},
245 {"sub", {{Ev}, {Gv}}},
246 {"sub", {{Gb}, {Eb}}},
247 {"sub", {{Gv}, {Ev}}},
248 {"sub", {{__al}, {Ib}}},
249 {"sub", {{__ax}, {Iv}}},
250 {0, {{SPECIAL_TYPE_PREFIX}}}, /* cs-prefix */
251 {"das"},
252 /* 30 */
253 {"xor", {{Eb}, {Gb}}},
254 {"xor", {{Ev}, {Gv}}},
255 {"xor", {{Gb}, {Eb}}},
256 {"xor", {{Gv}, {Ev}}},
257 {"xor", {{__al}, {Ib}}},
258 {"xor", {{__ax}, {Iv}}},
259 {0, {{SPECIAL_TYPE_PREFIX}}}, /* ss-prefix */
260 {"aaa"},
261 /* 38 */
262 {"cmp", {{Eb}, {Gb}}},
263 {"cmp", {{Ev}, {Gv}}},
264 {"cmp", {{Gb}, {Eb}}},
265 {"cmp", {{Gv}, {Ev}}},
266 {"cmp", {{__al}, {Ib}}},
267 {"cmp", {{__ax}, {Iv}}},
268 {0, {{SPECIAL_TYPE_PREFIX}}}, /* ds-prefix */
269 {"aas"},
270 /* 40 */
271 {"inc", {{__ax}}},
272 {"inc", {{__cx}}},
273 {"inc", {{__dx}}},
274 {"inc", {{__bx}}},
275 {"inc", {{__sp}}},
276 {"inc", {{__bp}}},
277 {"inc", {{__si}}},
278 {"inc", {{__di}}},
279 /* 48 */
280 {"dec", {{__ax}}},
281 {"dec", {{__cx}}},
282 {"dec", {{__dx}}},
283 {"dec", {{__bx}}},
284 {"dec", {{__sp}}},
285 {"dec", {{__bp}}},
286 {"dec", {{__si}}},
287 {"dec", {{__di}}},
288 /* 50 */
289 {"push", {{__ax}}},
290 {"push", {{__cx}}},
291 {"push", {{__dx}}},
292 {"push", {{__bx}}},
293 {"push", {{__sp}}},
294 {"push", {{__bp}}},
295 {"push", {{__si}}},
296 {"push", {{__di}}},
297 /* 58 */
298 {"pop", {{__ax}}},
299 {"pop", {{__cx}}},
300 {"pop", {{__dx}}},
301 {"pop", {{__bx}}},
302 {"pop", {{__sp}}},
303 {"pop", {{__bp}}},
304 {"pop", {{__si}}},
305 {"pop", {{__di}}},
306 /* 60 */
307 {"pusha"},
308 {"popa"},
309 {"bound", {{Gv}, {Mq}}},
310 {"arpl", {{Ew}, {Rw}}},
311 {0, {{SPECIAL_TYPE_PREFIX}}}, /* fs-prefix */
312 {0, {{SPECIAL_TYPE_PREFIX}}}, /* gs-prefix */
313 {0, {{SPECIAL_TYPE_PREFIX}}}, /* op-size prefix */
314 {0, {{SPECIAL_TYPE_PREFIX}}}, /* addr-size prefix */
315 /* 68 */
316 {"push", {{Iv}}},
317 {"imul", {{Gv}, {Ev}, {Iv}}},
318 {"push", {{sIbv}}},
319 {"imul", {{Gv}, {Ev}, {sIbv}}},
320 {"insb"},
321 {"ins%c"},
322 {"outsb"},
323 {"outs%c"},
324 /* 70 */
325 {"jo", {{Jb}}},
326 {"jno", {{Jb}}},
327 {"jc", {{Jb}}},
328 {"jnc", {{Jb}}},
329 {"jz", {{Jb}}},
330 {"jnz", {{Jb}}},
331 {"jna", {{Jb}}},
332 {"ja", {{Jb}}},
333 /* 78 */
334 {"js", {{Jb}}},
335 {"jns", {{Jb}}},
336 {"jp", {{Jb}}},
337 {"jnp", {{Jb}}},
338 {"jl", {{Jb}}}, /* aka jnge */
339 {"jnl", {{Jb}}}, /* aka jge */
340 {"jng", {{Jb}}}, /* aka jle */
341 {"jg", {{Jb}}}, /* aka jnle */
342 /* 80 */
343 {0, {{SPECIAL_TYPE_GROUP, GROUP_80}}},
344 {0, {{SPECIAL_TYPE_GROUP, GROUP_81}}},
345 {0},
346 {0, {{SPECIAL_TYPE_GROUP, GROUP_83}}},
347 {"test", {{Eb}, {Gb}}},
348 {"test", {{Ev}, {Gv}}},
349 {"xchg", {{Eb}, {Gb}}},
350 {"xchg", {{Ev}, {Gv}}},
351 /* 88 */
352 {"mov", {{Eb}, {Gb}}},
353 {"mov", {{Ev}, {Gv}}},
354 {"mov", {{Gb}, {Eb}}},
355 {"mov", {{Gv}, {Ev}}},
356 {"mov", {{Ev}, {Sw}}},
357 {"lea", {{Gv}, {M}}},
358 {"mov", {{Sw}, {Ev}}},
359 {"pop", {{Ev}}},
360 /* 90 */
361 {"nop"}, /* same as xchg (e)ax, (e)ax */
362 {"xchg", {{__ax}, {__cx}}},
363 {"xchg", {{__ax}, {__dx}}},
364 {"xchg", {{__ax}, {__bx}}},
365 {"xchg", {{__ax}, {__sp}}},
366 {"xchg", {{__ax}, {__bp}}},
367 {"xchg", {{__ax}, {__si}}},
368 {"xchg", {{__ax}, {__di}}},
369 /* 98 */
370 {"cbw"},
371 {"cwd"},
372 {"call", {{Ap}}},
373 {"fwait"},
374 {"pushf%c"},
375 {"popf%c"},
376 {"sahf"},
377 {"lahf"},
378 /* A0 */
379 {"mov", {{__al}, {Ob}}},
380 {"mov", {{__ax}, {Ov}}},
381 {"mov", {{Ob}, {__al}}},
382 {"mov", {{Ov}, {__ax}}},
383 {"movsb"},
384 {"movs%c"},
385 {"cmpsb"},
386 {"cmps%c"},
387 /* A8 */
388 {"test", {{__al}, {Ib}}},
389 {"test", {{__ax}, {Iv}}},
390 {"stosb"},
391 {"stos%c"},
392 {"lodsb"},
393 {"lods%c"},
394 {"scasb"},
395 {"scas%c"},
396 /* B0 */
397 {"mov", {{__al}, {Ib}}},
398 {"mov", {{__cl}, {Ib}}},
399 {"mov", {{__dl}, {Ib}}},
400 {"mov", {{__bl}, {Ib}}},
401 {"mov", {{__ah}, {Ib}}},
402 {"mov", {{__ch}, {Ib}}},
403 {"mov", {{__dh}, {Ib}}},
404 {"mov", {{__bh}, {Ib}}},
405 /* B8 */
406 {"mov", {{__ax}, {Iv}}},
407 {"mov", {{__cx}, {Iv}}},
408 {"mov", {{__dx}, {Iv}}},
409 {"mov", {{__bx}, {Iv}}},
410 {"mov", {{__sp}, {Iv}}},
411 {"mov", {{__bp}, {Iv}}},
412 {"mov", {{__si}, {Iv}}},
413 {"mov", {{__di}, {Iv}}},
414 /* C0 */
415 {0, {{SPECIAL_TYPE_GROUP, GROUP_C0}}},
416 {0, {{SPECIAL_TYPE_GROUP, GROUP_C1}}},
417 {"ret", {{Iw}}},
418 {"ret"},
419 {"les", {{Gv}, {Mp}}},
420 {"lds", {{Gv}, {Mp}}},
421 {"mov", {{Eb}, {Ib}}},
422 {"mov", {{Ev}, {Iv}}},
423 /* C8 */
424 {"enter", {{Iw}, {Ib}}},
425 {"leave"},
426 {"retf", {{Iw}}},
427 {"retf"},
428 {"int", {{__3}}},
429 {"int", {{Ib}}},
430 {"into"},
431 {"iret%c"},
432 /* D0 */
433 {0, {{SPECIAL_TYPE_GROUP, GROUP_D0}}},
434 {0, {{SPECIAL_TYPE_GROUP, GROUP_D1}}},
435 {0, {{SPECIAL_TYPE_GROUP, GROUP_D2}}},
436 {0, {{SPECIAL_TYPE_GROUP, GROUP_D3}}},
437 {"aam", {{Ib}}},
438 {"aad", {{Ib}}},
439 {"setalc"},
440 {"xlat"},
441 /* D8 */
442 {0, {{SPECIAL_TYPE_FGROUP, 0}}},
443 {0, {{SPECIAL_TYPE_FGROUP, 1}}},
444 {0, {{SPECIAL_TYPE_FGROUP, 2}}},
445 {0, {{SPECIAL_TYPE_FGROUP, 3}}},
446 {0, {{SPECIAL_TYPE_FGROUP, 4}}},
447 {0, {{SPECIAL_TYPE_FGROUP, 5}}},
448 {0, {{SPECIAL_TYPE_FGROUP, 6}}},
449 {0, {{SPECIAL_TYPE_FGROUP, 7}}},
450 /* E0 */
451 {"loopnz", {{Jb}}},
452 {"loopz", {{Jb}}},
453 {"loop", {{Jb}}},
454 {"jcxz", {{Jb}}},
455 {"in", {{__al}, {Ib}}},
456 {"in", {{__ax}, {Ib}}},
457 {"out", {{Ib}, {__al}}},
458 {"out", {{Ib}, {__ax}}},
459 /* E8 */
460 {"call", {{Jv}}},
461 {"jmp", {{Jv}}},
462 {"jmp", {{Ap}}},
463 {"jmp", {{Jb}}},
464 {"in", {{__al}, {__dxw}}},
465 {"in", {{__ax}, {__dxw}}},
466 {"out", {{__dxw}, {__al}}},
467 {"out", {{__dxw}, {__ax}}},
468 /* F0 */
469 {0, {{SPECIAL_TYPE_PREFIX}}}, /* lock-prefix */
470 {"smi"},
471 {0, {{SPECIAL_TYPE_PREFIX}}}, /* repnz-prefix */
472 {0, {{SPECIAL_TYPE_PREFIX}}}, /* rep-prefix */
473 {"hlt"},
474 {"cmc"},
475 {0, {{SPECIAL_TYPE_GROUP, GROUP_F6}}},
476 {0, {{SPECIAL_TYPE_GROUP, GROUP_F7}}},
477 /* F8 */
478 {"clc"},
479 {"stc"},
480 {"cli"},
481 {"sti"},
482 {"cld"},
483 {"std"},
484 {0, {{SPECIAL_TYPE_GROUP, GROUP_FE}}},
485 {0, {{SPECIAL_TYPE_GROUP, GROUP_FF}}},
486 };
487
488 x86opc_insn x86_insns_ext[256] = {
489 /* 00 */
490 {0, {{SPECIAL_TYPE_GROUP, GROUP_EXT_00}}},
491 {0, {{SPECIAL_TYPE_GROUP, GROUP_EXT_01}}},
492 {"lar", {{Gv}, {Ew}}},
493 {"lsl", {{Gv}, {Ew}}},
494 {0},
495 {0},
496 {"clts"},
497 {0},
498 /* 08 */
499 {"invd"},
500 {"wbinvd"},
501 {0},
502 {"ud2"},
503 {0},
504 {"prefetch", {{Eb}}},
505 {"femms"},
506 {0, {{SPECIAL_TYPE_PREFIX}}},
507 /* 10 */
508 {0},
509 {0},
510 {0},
511 {0},
512 {0},
513 {0},
514 {0},
515 {0},
516 /* 18 */
517 {0},
518 {0},
519 {0},
520 {0},
521 {0},
522 {0},
523 {0},
524 {0},
525 /* 20 */
526 {"mov", {{Rd}, {Cd}}},
527 {"mov", {{Rd}, {Dd}}},
528 {"mov", {{Cd}, {Rd}}},
529 {"mov", {{Dd}, {Rd}}},
530 {"mov", {{Rd}, {Td}}},
531 {0},
532 {"mov", {{Td}, {Rd}}},
533 {0},
534 /* 28 */
535 {0},
536 {0},
537 {0},
538 {0},
539 {0},
540 {0},
541 {0},
542 {0},
543 /* 30 */
544 {"wrmsr"},
545 {"rdtsc"},
546 {"rdmsr"},
547 {"rdpmc"},
548 {"sysenter"},
549 {"sysexit"},
550 {0},
551 {0},
552 /* 38 */
553 {0},
554 {0},
555 {0},
556 {0},
557 {0},
558 {0},
559 {0},
560 {0},
561 /* 40 */
562 {"cmovo", {{Gv}, {Ev}}},
563 {"cmovno", {{Gv}, {Ev}}},
564 {"cmovc", {{Gv}, {Ev}}},
565 {"cmovnc", {{Gv}, {Ev}}},
566 {"cmovz", {{Gv}, {Ev}}},
567 {"cmovnz", {{Gv}, {Ev}}},
568 {"cmova", {{Gv}, {Ev}}},
569 {"cmovna", {{Gv}, {Ev}}},
570 /* 48 */
571 {"cmovs", {{Gv}, {Ev}}},
572 {"cmovns", {{Gv}, {Ev}}},
573 {"cmovp", {{Gv}, {Ev}}},
574 {"cmovnp", {{Gv}, {Ev}}},
575 {"cmovl", {{Gv}, {Ev}}},
576 {"cmovnl", {{Gv}, {Ev}}},
577 {"cmovng", {{Gv}, {Ev}}},
578 {"cmovg", {{Gv}, {Ev}}},
579 /* 50 */
580 {0},
581 {0},
582 {0},
583 {0},
584 {0},
585 {0},
586 {0},
587 {0},
588 /* 58 */
589 {0},
590 {0},
591 {0},
592 {0},
593 {0},
594 {0},
595 {0},
596 {0},
597 /* 60 */
598 {"punpcklbw", {{Pq}, {Qd}}},
599 {"punpcklwd", {{Pq}, {Qd}}},
600 {"punpckldq", {{Pq}, {Qd}}},
601 {"packsswb", {{Pq}, {Qd}}},
602 {"pcmpgtb", {{Pq}, {Qd}}},
603 {"pcmpgtw", {{Pq}, {Qd}}},
604 {"pcmpgtd", {{Pq}, {Qd}}},
605 {"packuswb", {{Pq}, {Qd}}},
606 /* 68 */
607 {"punpckhbw", {{Pq}, {Qd}}},
608 {"punpckhwd", {{Pq}, {Qd}}},
609 {"punpckhdq", {{Pq}, {Qd}}},
610 {"packssdw", {{Pq}, {Qd}}},
611 {0},
612 {0},
613 {"movd", {{Pd}, {Ed}}},
614 {"movq", {{Pq}, {Qq}}},
615 /* 70 */
616 {0},
617 {0, {{SPECIAL_TYPE_GROUP, GROUP_EXT_71}}},
618 {0, {{SPECIAL_TYPE_GROUP, GROUP_EXT_72}}},
619 {0, {{SPECIAL_TYPE_GROUP, GROUP_EXT_73}}},
620 {"pcmpeqb", {{Pq}, {Qq}}},
621 {"pcmpeqw", {{Pq}, {Qq}}},
622 {"pcmpewd", {{Pq}, {Qq}}},
623 {"emms"},
624 /* 78 */
625 {0},
626 {0},
627 {0},
628 {0},
629 {0},
630 {0},
631 {"movd", {{Ed}, {Pd}}},
632 {"movq", {{Qq}, {Pq}}},
633 /* 80 */
634 {"jo", {{Jv}}},
635 {"jno", {{Jv}}},
636 {"jc", {{Jv}}},
637 {"jnc", {{Jv}}},
638 {"jz", {{Jv}}},
639 {"jnz", {{Jv}}},
640 {"jna", {{Jv}}},
641 {"ja", {{Jv}}},
642 /* 88 */
643 {"js", {{Jv}}},
644 {"jns", {{Jv}}},
645 {"jpe", {{Jv}}},
646 {"jpo", {{Jv}}},
647 {"jl", {{Jv}}},
648 {"jnl", {{Jv}}},
649 {"jng", {{Jv}}},
650 {"jg", {{Jv}}},
651 /* 90 */
652 {"seto", {{Eb}}},
653 {"setno", {{Eb}}},
654 {"setc", {{Eb}}},
655 {"setnc", {{Eb}}},
656 {"setz", {{Eb}}},
657 {"setnz", {{Eb}}},
658 {"setna", {{Eb}}},
659 {"seta", {{Eb}}},
660 /* 98 */
661 {"sets", {{Eb}}},
662 {"setns", {{Eb}}},
663 {"setpe", {{Eb}}},
664 {"setpo", {{Eb}}},
665 {"setl", {{Eb}}},
666 {"setnl", {{Eb}}},
667 {"setng", {{Eb}}},
668 {"setg", {{Eb}}},
669 /* A0 */
670 {"push", {{__fs}}},
671 {"pop", {{__fs}}},
672 {"cpuid"},
673 {"bt", {{Ev}, {Gv}}},
674 {"shld", {{Ev}, {Gv}, {Ib}}},
675 {"shld", {{Ev}, {Gv}, {__cl}}},
676 {0},
677 {0},
678 /* A8 */
679 {"push", {{__gs}}},
680 {"pop", {{__gs}}},
681 {"rsm"},
682 {"bts", {{Ev}, {Gv}}},
683 {"shrd", {{Ev}, {Gv}, {Ib}}},
684 {"shrd", {{Ev}, {Gv}, {__cl}}},
685 {0},
686 {"imul", {{Gv}, {Ev}}},
687 /* B0 */
688 {"cmpxchg", {{Eb}, {Gb}}},
689 {"cmpxchg", {{Ev}, {Gv}}},
690 {"lss", {{Gv}, {Mp}}},
691 {"btr", {{Ev}, {Gv}}},
692 {"lfs", {{Gv}, {Mp}}},
693 {"lgs", {{Gv}, {Mp}}},
694 {"movzx", {{Gv}, {Eb}}},
695 {"movzx", {{Gv}, {Ew}}},
696 /* B8 */
697 {0},
698 {"ud2"},
699 {0, {{SPECIAL_TYPE_GROUP, GROUP_EXT_BA}}},
700 {"btc", {{Ev}, {Gv}}},
701 {"bsf", {{Gv}, {Ev}}},
702 {"bsr", {{Gv}, {Ev}}},
703 {"movsx", {{Gv}, {Eb}}},
704 {"movsx", {{Gv}, {Ew}}},
705 /* C0 */
706 {"xadd", {{Eb}, {Gb}}},
707 {"xadd", {{Ev}, {Gv}}},
708 {0},
709 {0},
710 {0},
711 {0},
712 {0},
713 {0, {{SPECIAL_TYPE_GROUP, GROUP_EXT_C7}}},
714 /* C8 */
715 {"bswap", {{__axd}}},
716 {"bswap", {{__cxd}}},
717 {"bswap", {{__dxd}}},
718 {"bswap", {{__bxd}}},
719 {"bswap", {{__spd}}},
720 {"bswap", {{__bpd}}},
721 {"bswap", {{__sid}}},
722 {"bswap", {{__did}}},
723 /* D0 */
724 {0},
725 {"psrlw", {{Pq}, {Qq}}},
726 {"psrld", {{Pq}, {Qq}}},
727 {"psrlq", {{Pq}, {Qq}}},
728 {0},
729 {"pmullw", {{Pq}, {Qq}}},
730 {0},
731 {0},
732 /* D8 */
733 {"psubusb", {{Pq}, {Qq}}},
734 {"psubusw", {{Pq}, {Qq}}},
735 {0},
736 {"pand", {{Pq}, {Qq}}},
737 {"paddusb", {{Pq}, {Qq}}},
738 {"paddusw", {{Pq}, {Qq}}},
739 {0},
740 {"pandn", {{Pq}, {Qq}}},
741 /* E0 */
742 {0},
743 {"psraw", {{Pq}, {Qq}}},
744 {"psrad", {{Pq}, {Qq}}},
745 {0},
746 {0},
747 {"pmulhw", {{Pq}, {Qq}}},
748 {0},
749 {0},
750 /* E8 */
751 {"psubsb", {{Pq}, {Qq}}},
752 {"psubsw", {{Pq}, {Qq}}},
753 {0},
754 {"por", {{Pq}, {Qq}}},
755 {"paddsb", {{Pq}, {Qq}}},
756 {"paddsw", {{Pq}, {Qq}}},
757 {0},
758 {"pxor", {{Pq}, {Qq}}},
759 /* F0 */
760 {0},
761 {"psllw", {{Pq}, {Qq}}},
762 {"pslld", {{Pq}, {Qq}}},
763 {"psllq", {{Pq}, {Qq}}},
764 {0},
765 {"pmuladdwd", {{Pq}, {Qq}}},
766 {0},
767 {0},
768 /* F8 */
769 {"psubb", {{Pq}, {Qq}}},
770 {"psubw", {{Pq}, {Qq}}},
771 {"psubq", {{Pq}, {Qq}}},
772 {0},
773 {"paddb", {{Pq}, {Qq}}},
774 {"paddw", {{Pq}, {Qq}}},
775 {"paddq", {{Pq}, {Qq}}},
776 {0}
777 };
778
779 x86opc_insn x86_group_insns[X86_GROUPS][8] = {
780 /* 0 - GROUP_80 */
781 {
782 {"add", {{Eb}, {Ib}}},
783 {"or", {{Eb}, {Ib}}},
784 {"adc", {{Eb}, {Ib}}},
785 {"sbb", {{Eb}, {Ib}}},
786 {"and", {{Eb}, {Ib}}},
787 {"sub", {{Eb}, {Ib}}},
788 {"xor", {{Eb}, {Ib}}},
789 {"cmp", {{Eb}, {Ib}}}
790 },
791 /* 1 - GROUP_81 */
792 {
793 {"add", {{Ev}, {Iv}}},
794 {"or", {{Ev}, {Iv}}},
795 {"adc", {{Ev}, {Iv}}},
796 {"sbb", {{Ev}, {Iv}}},
797 {"and", {{Ev}, {Iv}}},
798 {"sub", {{Ev}, {Iv}}},
799 {"xor", {{Ev}, {Iv}}},
800 {"cmp", {{Ev}, {Iv}}}
801 },
802 /* 2 - GROUP_83 */
803 {
804 {"add", {{Ev}, {sIbv}}},
805 {"or", {{Ev}, {sIbv}}},
806 {"adc", {{Ev}, {sIbv}}},
807 {"sbb", {{Ev}, {sIbv}}},
808 {"and", {{Ev}, {sIbv}}},
809 {"sub", {{Ev}, {sIbv}}},
810 {"xor", {{Ev}, {sIbv}}},
811 {"cmp", {{Ev}, {sIbv}}}
812 },
813 /* 3 - GROUP_C0 */
814 {
815 {"rol", {{Eb}, {Ib}}},
816 {"ror", {{Eb}, {Ib}}},
817 {"rcl", {{Eb}, {Ib}}},
818 {"rcr", {{Eb}, {Ib}}},
819 {"shl", {{Eb}, {Ib}}},
820 {"shr", {{Eb}, {Ib}}},
821 {"sal", {{Eb}, {Ib}}},
822 {"sar", {{Eb}, {Ib}}}
823 },
824 /* 4 - GROUP_C1 */
825 {
826 {"rol", {{Ev}, {Ib}}},
827 {"ror", {{Ev}, {Ib}}},
828 {"rcl", {{Ev}, {Ib}}},
829 {"rcr", {{Ev}, {Ib}}},
830 {"shl", {{Ev}, {Ib}}},
831 {"shr", {{Ev}, {Ib}}},
832 {"sal", {{Ev}, {Ib}}},
833 {"sar", {{Ev}, {Ib}}}
834 },
835 /* 5 - GROUP_D0 */
836 {
837 {"rol", {{Eb}, {__1}}},
838 {"ror", {{Eb}, {__1}}},
839 {"rcl", {{Eb}, {__1}}},
840 {"rcr", {{Eb}, {__1}}},
841 {"shl", {{Eb}, {__1}}},
842 {"shr", {{Eb}, {__1}}},
843 {"sal", {{Eb}, {__1}}},
844 {"sar", {{Eb}, {__1}}}
845 },
846 /* 6 - GROUP_D1 */
847 {
848 {"rol", {{Ev}, {__1}}},
849 {"ror", {{Ev}, {__1}}},
850 {"rcl", {{Ev}, {__1}}},
851 {"rcr", {{Ev}, {__1}}},
852 {"shl", {{Ev}, {__1}}},
853 {"shr", {{Ev}, {__1}}},
854 {"sal", {{Ev}, {__1}}},
855 {"sar", {{Ev}, {__1}}}
856 },
857 /* 7 - GROUP_D2 */
858 {
859 {"rol", {{Eb}, {__cl}}},
860 {"ror", {{Eb}, {__cl}}},
861 {"rcl", {{Eb}, {__cl}}},
862 {"rcr", {{Eb}, {__cl}}},
863 {"shl", {{Eb}, {__cl}}},
864 {"shr", {{Eb}, {__cl}}},
865 {"sal", {{Eb}, {__cl}}},
866 {"sar", {{Eb}, {__cl}}}
867 },
868 /* 8 - GROUP_D3 */
869 {
870 {"rol", {{Ev}, {__cl}}},
871 {"ror", {{Ev}, {__cl}}},
872 {"rcl", {{Ev}, {__cl}}},
873 {"rcr", {{Ev}, {__cl}}},
874 {"shl", {{Ev}, {__cl}}},
875 {"shr", {{Ev}, {__cl}}},
876 {"sal", {{Ev}, {__cl}}},
877 {"sar", {{Ev}, {__cl}}}
878 },
879 /* 9 - GROUP_F6 */
880 {
881 {"test", {{Eb}, {Ib}}},
882 //{"test", {{Eb}, {Ib}}}, unsure...
883 {0},
884 {"not", {{Eb}}},
885 {"neg", {{Eb}}},
886 {"mul", {{__al}, {Eb}}},
887 {"imul", {{__al}, {Eb}}},
888 {"div", {{__al}, {Eb}}},
889 {"idiv", {{__al}, {Eb}}}
890 },
891 /* 10 - GROUP_F7 */
892 {
893 {"test", {{Ev}, {Iv}}},
894 {"test", {{Ev}, {Iv}}},
895 {"not", {{Ev}}},
896 {"neg", {{Ev}}},
897 {"mul", {{__ax}, {Ev}}},
898 {"imul", {{__ax}, {Ev}}},
899 {"div", {{__ax}, {Ev}}},
900 {"idiv", {{__ax}, {Ev}}}
901 },
902 /* 11 - GROUP_FE */
903 {
904 {"inc", {{Eb}}},
905 {"dec", {{Eb}}},
906 {0},
907 {0},
908 {0},
909 {0},
910 {0},
911 {0}
912 },
913 /* 12 - GROUP_FF */
914 {
915 {"inc", {{Ev}}},
916 {"dec", {{Ev}}},
917 {"call", {{Ev}}},
918 {"call", {{Mp}}},
919 {"jmp", {{Ev}}},
920 {"jmp", {{Mp}}},
921 {"push", {{Ev}}},
922 {0}
923 },
924 /* 13 - GROUP_EXT_00 */
925 {
926 {"sldt", {{Ew}}},
927 {"str", {{Ew}}},
928 {"lldt", {{Ew}}},
929 {"ltr", {{Ew}}},
930 {"verr", {{Ew}}},
931 {"verw", {{Ew}}},
932 {0},
933 {0}
934 },
935 /* 14 - GROUP_EXT_01 */
936 {
937 {"sgdt", {{M}}},
938 {"sidt", {{M}}},
939 {"lgdt", {{M}}},
940 {"lidt", {{M}}},
941 {"smsw", {{Ew}}},
942 {0},
943 {"lmsw", {{Ew}}},
944 {0}
945 },
946 /* 15 - GROUP_EXT_71 */
947 {
948 {0},
949 {0},
950 {"psrlw", {{Pq}, {Ib}}},
951 {0},
952 {"psraw", {{Pq}, {Ib}}},
953 {0},
954 {"psslw", {{Pq}, {Ib}}},
955 {0}
956 },
957 /* 16 - GROUP_EXT_72 */
958 {
959 {0},
960 {0},
961 {"psrld", {{Pq}, {Ib}}},
962 {0},
963 {"psrad", {{Pq}, {Ib}}},
964 {0},
965 {"pssld", {{Pq}, {Ib}}},
966 {0}
967 },
968 /* 17 - GROUP_EXT_73 */
969 {
970 {0},
971 {0},
972 {"psrlq", {{Pq}, {Ib}}},
973 {0},
974 {"psraq", {{Pq}, {Ib}}},
975 {0},
976 {"psslq", {{Pq}, {Ib}}},
977 {0}
978 },
979 /* 18 - GROUP_EXT_BA */
980 {
981 {0},
982 {0},
983 {0},
984 {0},
985 {"bt", {{Ev}, {Ib}}},
986 {"bts", {{Ev}, {Ib}}},
987 {"btr", {{Ev}, {Ib}}},
988 {"btc", {{Ev}, {Ib}}}
989 },
990 /* 19 - GROUP_EXT_C7 */
991 {
992 {0},
993 {"cmpxchg8b", {{Eq}}},
994 {0},
995 {0},
996 {0},
997 {0},
998 {0},
999 {0}
1000 }
1001 /*
1002 ,
1003 / * 20 - GROUP_EXT_AE * /
1004 {
1005 {"fxsave", {{Eb}}},
1006 {"fxrstor", {{Eb}}},
1007 {"ldmxcsr", {{Md}}},
1008 {"stmxcsr", {{Md}}},
1009 {0},
1010 {0},
1011 {0},
1012 {"sfence"}
1013 }*/
1014
1015 };
1016
1017 /*
1018 * The ModR/M byte is < 0xC0
1019 */
1020
1021 x86opc_insn x86_modfloat_group_insns[8][8] = {
1022 /* prefix D8 */
1023 {
1024 {"fadd", {{Ms}}},
1025 {"fmul", {{Ms}}},
1026 {"fcom", {{Ms}}},
1027 {"fcomp", {{Ms}}},
1028 {"fsub", {{Ms}}},
1029 {"fsubr", {{Ms}}},
1030 {"fdiv", {{Ms}}},
1031 {"fdivr", {{Ms}}}
1032 },
1033 /* prefix D9 */
1034 {
1035 {"fld", {{Ms}}},
1036 {0},
1037 {"fst", {{Ms}}},
1038 {"fstp", {{Ms}}},
1039 {"fldenv", {{M}}},
1040 {"fldcw", {{Mw}}},
1041 {"fstenv", {{M}}},
1042 {"fstcw", {{Mw}}}
1043 },
1044 /* prefix DA */
1045 {
1046 {"fiadd", {{Md}}},
1047 {"fimul", {{Md}}},
1048 {"ficom", {{Md}}},
1049 {"ficomp", {{Md}}},
1050 {"fisub", {{Md}}},
1051 {"fisubr", {{Md}}},
1052 {"fidiv", {{Md}}},
1053 {"fidivr", {{Md}}}
1054 },
1055 /* prefix DB */
1056 {
1057 {"fild", {{Md}}},
1058 {"fisttp", {{Md}}},
1059 {"fist", {{Md}}},
1060 {"fistp", {{Md}}},
1061 {0},
1062 {"fld", {{Mt}}},
1063 {0},
1064 {"fstp", {{Mt}}}
1065 },
1066 /* prefix DC */
1067 {
1068 {"fadd", {{Ml}}},
1069 {"fmul", {{Ml}}},
1070 {"fcom", {{Ml}}},
1071 {"fcomp", {{Ml}}},
1072 {"fsub", {{Ml}}},
1073 {"fsubr", {{Ml}}},
1074 {"fdiv", {{Ml}}},
1075 {"fdivr", {{Ml}}}
1076 },
1077 /* prefix DD */
1078 {
1079 {"fld", {{Ml}}},
1080 {0},
1081 {"fst", {{Ml}}},
1082 {"fstp", {{Ml}}},
1083 {"frstor", {{M}}},
1084 {0},
1085 {"fsave", {{M}}},
1086 {"fstsw", {{Mw}}}
1087 },
1088 /* prefix DE */
1089 {
1090 {"fiadd", {{Mw}}},
1091 {"fimul", {{Mw}}},
1092 {"ficom", {{Mw}}},
1093 {"ficomp", {{Mw}}},
1094 {"fisub", {{Mw}}},
1095 {"fisubr", {{Mw}}},
1096 {"fidiv", {{Mw}}},
1097 {"fidivr", {{Mw}}}
1098 },
1099 /* prefix DF */
1100 {
1101 {"fild", {{Mw}}},
1102 {0},
1103 {"fist", {{Mw}}},
1104 {"fistp", {{Mw}}},
1105 {"fbld", {{Ma}}},
1106 {"fild", {{Mq}}},
1107 {"fbstp", {{Ma}}},
1108 {"fistp", {{Mq}}}
1109 }
1110
1111 };
1112
1113 x86opc_insn fgroup_12[8] = {
1114 {"fnop"},
1115 {0},
1116 {0},
1117 {0},
1118 {0},
1119 {0},
1120 {0},
1121 {0}
1122 };
1123
1124 x86opc_insn fgroup_14[8] = {
1125 {"fchs"},
1126 {"fabs"},
1127 {0},
1128 {0},
1129 {"ftst"},
1130 {"fxam"},
1131 {0},
1132 {0}
1133 };
1134
1135 x86opc_insn fgroup_15[8] = {
1136 {"fld1"},
1137 {"fldl2t"},
1138 {"fldl2e"},
1139 {"fldpi"},
1140 {"fldlg2"},
1141 {"fldln2"},
1142 {"fldz"},
1143 {0}
1144 };
1145
1146 x86opc_insn fgroup_16[8] = {
1147 {"f2xm1"},
1148 {"fyl2x"},
1149 {"fptan"},
1150 {"fpatan"},
1151 {"fxtract"},
1152 {"fprem1"},
1153 {"fdecstp"},
1154 {"fincstp"}
1155 };
1156
1157 x86opc_insn fgroup_17[8] = {
1158 {"fprem"},
1159 {"fyl2xp1"},
1160 {"fsqrt"},
1161 {"fsincos"},
1162 {"frndint"},
1163 {"fscale"},
1164 {"fsin"},
1165 {"fcos"}
1166 };
1167
1168 x86opc_insn fgroup_25[8] = {
1169 {0},
1170 {"fucompp"},
1171 {0},
1172 {0},
1173 {0},
1174 {0},
1175 {0},
1176 {0}
1177 };
1178
1179 x86opc_insn fgroup_34[8] = {
1180 {0},
1181 {0},
1182 {"fclex"},
1183 {"finit"},
1184 {0},
1185 {0},
1186 {0},
1187 {0}
1188 };
1189
1190 x86opc_insn fgroup_63[8] = {
1191 {0},
1192 {"fcompp"},
1193 {0},
1194 {0},
1195 {0},
1196 {0},
1197 {0},
1198 {0}
1199 };
1200
1201 x86opc_insn fgroup_74[8] = {
1202 {"fstsw", {{__axw}}},
1203 {0},
1204 {0},
1205 {0},
1206 {0},
1207 {0},
1208 {0},
1209 {0}
1210 };
1211
1212 /*
1213 * The ModR/M byte is >= 0xC0
1214 */
1215
1216 x86opc_finsn x86_float_group_insns[8][8] = {
1217 /* prefix D8 */
1218 {
1219 {0, {"fadd", {{__st}, {Ft}}}},
1220 {0, {"fmul", {{__st}, {Ft}}}},
1221 {0, {"fcom", {{__st}, {Ft}}}},
1222 {0, {"fcomp", {{__st}, {Ft}}}},
1223 {0, {"fsub", {{__st}, {Ft}}}},
1224 {0, {"fsubr", {{__st}, {Ft}}}},
1225 {0, {"fdiv", {{__st}, {Ft}}}},
1226 {0, {"fdivr", {{__st}, {Ft}}}}
1227 },
1228 /* prefix D9 */
1229 {
1230 {0, {"fld", {{__st}, {Ft}}}},
1231 {0, {"fxch", {{__st}, {Ft}}}},
1232 {(x86opc_insn *)&fgroup_12},
1233 {0},
1234 {(x86opc_insn *)&fgroup_14},
1235 {(x86opc_insn *)&fgroup_15},
1236 {(x86opc_insn *)&fgroup_16},
1237 {(x86opc_insn *)&fgroup_17}
1238 },
1239 /* prefix DA */
1240 {
1241 {0, {"fcmovb", {{__st}, {Ft}}}},
1242 {0, {"fcmove", {{__st}, {Ft}}}},
1243 {0, {"fcmovbe", {{__st}, {Ft}}}},
1244 {0, {"fcmovu", {{__st}, {Ft}}}},
1245 {0},
1246 {(x86opc_insn *)&fgroup_25},
1247 {0},
1248 {0}
1249 },
1250 /* prefix DB */
1251 {
1252 {0, {"fcmovnb", {{__st}, {Ft}}}},
1253 {0, {"fcmovne", {{__st}, {Ft}}}},
1254 {0, {"fcmovnbe", {{__st}, {Ft}}}},
1255 {0, {"fcmovnu", {{__st}, {Ft}}}},
1256 {(x86opc_insn*)&fgroup_34},
1257 {0, {"fucomi", {{__st}, {Ft}}}},
1258 {0, {"fcomi", {{__st}, {Ft}}}},
1259 {0}
1260 },
1261 /* prefix DC */
1262 {
1263 {0, {"fadd", {{Ft}, {__st}}}},
1264 {0, {"fmul", {{Ft}, {__st}}}},
1265 {0},
1266 {0},
1267 {0, {"fsubr", {{Ft}, {__st}}}},
1268 {0, {"fsub", {{Ft}, {__st}}}},
1269 {0, {"fdivr", {{Ft}, {__st}}}},
1270 {0, {"fdiv", {{Ft}, {__st}}}}
1271 },
1272 /* prefix DD */
1273 {
1274 {0, {"ffree", {{Ft}}}},
1275 {0},
1276 {0, {"fst", {{Ft}}}},
1277 {0, {"fstp", {{Ft}}}},
1278 {0, {"fucom", {{Ft}, {__st}}}},
1279 {0, {"fucomp", {{Ft}}}},
1280 {0},
1281 {0}
1282 },
1283 /* prefix DE */
1284 {
1285 {0, {"faddp", {{Ft}, {__st}}}},
1286 {0, {"fmulp", {{Ft}, {__st}}}},
1287 {0},
1288 {(x86opc_insn*)&fgroup_63},
1289 {0, {"fsubrp", {{Ft}, {__st}}}},
1290 {0, {"fsubp", {{Ft}, {__st}}}},
1291 {0, {"fdivrp", {{Ft}, {__st}}}},
1292 {0, {"fdivp", {{Ft}, {__st}}}}
1293 },
1294 /* prefix DF */
1295 {
1296 {0, {"ffreep", {{Ft}}}},
1297 {0},
1298 {0},
1299 {0},
1300 {(x86opc_insn*)&fgroup_74},
1301 {0, {"fucomip", {{__st}, {Ft}}}},
1302 {0, {"fcomip", {{__st}, {Ft}}}},
1303 {0}
1304 }
1305
1306 };

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