/[pearpc]/src/cpu/cpu_jitc_x86/jitc.h
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Contents of /src/cpu/cpu_jitc_x86/jitc.h

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Wed Sep 5 17:11:21 2007 UTC (12 years, 2 months ago) by dpavlin
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1 /*
2 * PearPC
3 * jitc.h
4 *
5 * Copyright (C) 2004 Sebastian Biallas (sb@biallas.net)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21 #ifndef __JITC_H__
22 #define __JITC_H__
23
24 #include "jitc_types.h"
25 #include "x86asm.h"
26
27 /*
28 * The size of a fragment
29 * This is the size of portion of translated client code
30 */
31 #define FRAGMENT_SIZE 256
32
33 /*
34 * Used to describe a fragment of translated client code
35 * If fragment is empty/invalid it isn't assigned to a
36 * client page but in the freeFragmentsList
37 */
38 struct TranslationCacheFragment {
39 /*
40 * The start address of this fragement in the
41 * translation cache.
42 */
43 NativeAddress base;
44 /*
45 * If fragment is assigned to a client page
46 * this points to the previous used segment of this page.
47 * Used when freeing pages.
48 *
49 * Else this points to the next entry in the list of free fragments.
50 */
51 TranslationCacheFragment *prev;
52 };
53
54 /*
55 * Used to describe a (not neccessarily translated) client page
56 */
57 struct ClientPage {
58 /*
59 * This is used to translate client page addresses
60 * into host addresses. Address isn't (yet) an entrypoint
61 * or not yet translated if entrypoints[page_offset] == 0
62 *
63 * Note that a client page has 4096 bytes, but there are only
64 * 1024 possible entries per page.
65 */
66 NativeAddress entrypoints[1024];
67 uint32 baseaddress;
68
69 /*
70 * The fragment which has space left
71 * == NULL if page isn't translated yet
72 */
73 TranslationCacheFragment *tcf_current;
74
75 int bytesLeft; // Remaining bytes in current fragment
76 NativeAddress tcp; // Translation cache pointer
77
78 ClientPage *moreRU; // points to a page which was used more recently
79 ClientPage *lessRU; // points to a page which was used less recently
80 };
81
82 struct NativeRegType {
83 NativeReg reg;
84 NativeRegType *moreRU; // points to a register which was used more recently
85 NativeRegType *lessRU; // points to a register which was used less recently
86 };
87
88 struct NativeVectorRegType {
89 NativeVectorReg reg;
90 NativeVectorRegType *moreRU; // points to a register which was used more recently
91 NativeVectorRegType *lessRU; // points to a register which was used less recently
92 };
93
94 enum RegisterState {
95 rsUnused = 0,
96 rsMapped = 1,
97 rsDirty = 2,
98 };
99
100 #define TLB_ENTRIES 32
101
102 struct JITC {
103 /*
104 * This is the array of all (physical) pages of the client.
105 * The entries might be NULL indicating the this base address
106 * isn't translated yet.
107 */
108 ClientPage **clientPages;
109
110 /*
111 * These are the TLB-Entries
112 */
113 uint32 tlb_code_eff[TLB_ENTRIES];
114 uint32 tlb_data_read_eff[TLB_ENTRIES];
115 uint32 tlb_data_write_eff[TLB_ENTRIES];
116 uint32 tlb_code_phys[TLB_ENTRIES];
117 uint32 tlb_data_read_phys[TLB_ENTRIES];
118 uint32 tlb_data_write_phys[TLB_ENTRIES];
119 uint64 tlb_code_hits;
120 uint64 tlb_data_read_hits;
121 uint64 tlb_data_write_hits;
122 uint64 tlb_code_misses;
123 uint64 tlb_data_read_misses;
124 uint64 tlb_data_write_misses;
125
126 /*
127 * Capabilities of the host cpu
128 */
129 X86CPUCaps hostCPUCaps;
130
131 /*
132 * If nativeReg[i] is set, it indicates to which client
133 * register this native register corrensponds.
134 */
135 PPC_Register nativeReg[8];
136
137 RegisterState nativeRegState[8];
138
139 /*
140 * number of stack entries (0 <= TOP <= 8)
141 */
142 int nativeFloatTOP;
143 /*
144 * Indexed by type JitcFloatReg
145 */
146 int nativeFloatRegStack[9];
147 RegisterState nativeFloatRegState[9];
148
149 /*
150 *
151 */
152 PPC_CRx nativeFlags;
153 RegisterState nativeFlagsState;
154 RegisterState nativeCarryState;
155
156 /*
157 * If clientRegister is set, in indicates to which native
158 * register this client register corrensponds.
159 * Indexed by type PPC_Register
160 */
161 NativeReg clientReg[sizeof gCPU];
162
163 /*
164 * If clientFloatReg[i] is set fpr[i] is mapped to the native
165 * float register clientFloatReg[i]
166 */
167 JitcFloatReg clientFloatReg[32];
168
169 /*
170 * An element of S_8 and its inverse (indexed by JitcFloatReg)
171 * to keep track of FXCH
172 */
173 JitcFloatReg floatRegPerm[9];
174 JitcFloatReg floatRegPermInverse[9];
175
176 /*
177 * Do this only once per basic block
178 */
179 bool checkedPriviledge;
180 bool checkedFloat;
181 bool checkedVector;
182
183 /*
184 * The FPU can be in 53 bit or in 64 bit mode
185 */
186 int FPUPrecision;
187
188 /*
189 * Only used for the LRU list
190 */
191 NativeRegType *nativeRegsList[8];
192
193 /*
194 * Points to the least/most recently used register
195 */
196 NativeRegType *LRUreg;
197 NativeRegType *MRUreg;
198
199 /*
200 * This is the least recently used page
201 * (ie. the page that is freed if no more pages are available)
202 * Must can be NULL if freeFragmentsList is != NULL
203 */
204 ClientPage *LRUpage;
205 ClientPage *MRUpage;
206
207 /*
208 * These are the unused fragments as a linked list.
209 * Can be NULL.
210 */
211 TranslationCacheFragment *freeFragmentsList;
212
213 /*
214 * These are the unused client pages as a linked list.
215 * Can be NULL.
216 */
217 ClientPage *freeClientPages;
218
219 /*
220 *
221 */
222 byte *translationCache;
223
224 /*
225 * Only valid while compiling
226 */
227 ClientPage *currentPage;
228 uint32 pc;
229 uint32 current_opc;
230
231 /*
232 * Statistics
233 */
234 uint64 destroy_write;
235 uint64 destroy_oopages;
236 uint64 destroy_ootc;
237
238 /*
239 * If nativeVectorReg[i] is set, it indicates to which client
240 * vector register this native vector register corrensponds.
241 */
242 JitcVectorReg n2cVectorReg[9];
243 NativeVectorReg c2nVectorReg[36];
244
245 RegisterState nativeVectorRegState[9];
246
247 /*
248 * Only used for the LRU list.
249 * Subscript 8 is the sentinel.
250 */
251 NativeVectorReg LRUvregs[9];
252 NativeVectorReg MRUvregs[9];
253 int nativeVectorReg;
254 };
255 extern JITC gJITC;
256
257
258 void FASTCALL jitcEmit1(byte b);
259 void FASTCALL jitcEmit(byte *instr, int size);
260 bool FASTCALL jitcEmitAssure(int size);
261
262 extern "C" void FASTCALL jitcDestroyAndFreeClientPage(ClientPage *cp);
263 extern "C" NativeAddress FASTCALL jitcNewPC(uint32 entry);
264
265 bool jitc_init(int maxClientPages, uint32 tcSize);
266 void jitc_done();
267
268 static UNUSED void ppc_opc_gen_interpret(ppc_opc_function func)
269 {
270 modrm_o modrm;
271
272 jitcClobberAll();
273
274 asmALU_D(X86_MOV, x86_mem2(modrm, &gCPU.current_opc), gJITC.current_opc);
275 asmCALL((NativeAddress)func);
276 }
277
278 #endif

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