/[pearpc]/src/cpu/cpu_generic/ppc_cpu.h
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Contents of /src/cpu/cpu_generic/ppc_cpu.h

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Revision 1 - (show annotations)
Wed Sep 5 17:11:21 2007 UTC (12 years ago) by dpavlin
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import upstream CVS
1 /*
2 * PearPC
3 * ppc_cpu.h
4 *
5 * Copyright (C) 2003, 2004 Sebastian Biallas (sb@biallas.net)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21 #ifndef __PPC_CPU_H__
22 #define __PPC_CPU_H__
23
24 #include <stddef.h>
25 #include "system/types.h"
26 #include "cpu/common.h"
27
28 #define PPC_MHz(v) ((v)*1000*1000)
29
30 #define TB_TO_PTB_FACTOR 10
31
32 #define PPC_MODEL "ppc_model"
33 #define PPC_CPU_MODEL "ppc_cpu"
34 #define PPC_CLOCK_FREQUENCY PPC_MHz(10)
35 #define PPC_BUS_FREQUENCY PPC_MHz(10)
36 #define PPC_TIMEBASE_FREQUENCY (PPC_CLOCK_FREQUENCY / TB_TO_PTB_FACTOR)
37
38 struct PPC_CPU_State {
39 // * uisa
40 uint32 gpr[32];
41 uint64 fpr[32];
42 uint32 cr;
43 uint32 fpscr;
44 uint32 xer; // spr 1
45 uint32 xer_ca; // carry from xer
46 uint32 lr; // spr 8
47 uint32 ctr; // spr 9
48 // * oea
49 uint32 msr;
50 uint32 pvr; // spr 287
51
52 // * memory managment
53 uint32 ibatu[4]; // spr 528, 530, 532, 534
54 uint32 ibatl[4]; // spr 529, 531, 533, 535
55 uint32 ibat_bl17[4]; // for internal use
56
57 uint32 dbatu[4]; // spr 536, 538, 540, 542
58 uint32 dbatl[4]; // spr 537, 539, 541, 543
59 uint32 dbat_bl17[4]; // for internal use
60
61 uint32 sdr1; // spr 25 (page table base address)
62
63 uint32 sr[16];
64
65 // * exception handling
66 uint32 dar; // spr 19
67 uint32 dsisr; // spr 18
68 uint32 sprg[4]; // spr 272-275
69 uint32 srr[2]; // spr 26-27
70
71 // * misc
72 uint32 dec; // spr 22
73 uint32 ear; // spr 282 .101
74 uint32 pir; // spr 1032
75 uint64 tb; // .75 spr 284(l)/285(u)
76
77 uint32 hid[16];
78 // * internal
79
80 uint32 pc;
81 uint32 npc;
82 uint32 current_opc;
83 bool exception_pending;
84 bool dec_exception;
85 bool ext_exception;
86 bool stop_exception;
87 bool singlestep_ignore;
88
89 uint32 pagetable_base;
90 int pagetable_hashmask;
91 uint32 reserve;
92 bool have_reservation;
93
94 // for generic cpu core
95 uint32 effective_code_page;
96 byte *physical_code_page;
97 uint64 pdec; // more precise version of dec
98 uint64 ptb; // more precise version of tb
99
100 // for altivec
101 uint32 vscr;
102 uint32 vrsave; // spr 256
103 Vector_t vr[36]; // <--- this MUST be 16-byte alligned
104 uint32 vtemp;
105 };
106
107 extern PPC_CPU_State gCPU;
108
109 void ppc_cpu_atomic_raise_ext_exception();
110 void ppc_cpu_atomic_cancel_ext_exception();
111
112 extern uint32 gBreakpoint;
113 extern uint32 gBreakpoint2;
114
115 void ppc_set_singlestep_v(bool v, const char *file, int line, const char *format, ...);
116 void ppc_set_singlestep_nonverbose(bool v);
117
118 #endif
119

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