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dpavlin |
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/* |
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* PearPC |
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* ppc_cpu.h |
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* |
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* Copyright (C) 2003, 2004 Sebastian Biallas (sb@biallas.net) |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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*/ |
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#ifndef __PPC_CPU_H__ |
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#define __PPC_CPU_H__ |
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#include <stddef.h> |
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#include "system/types.h" |
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#include "cpu/common.h" |
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#define PPC_MHz(v) ((v)*1000*1000) |
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#define TB_TO_PTB_FACTOR 10 |
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#define PPC_MODEL "ppc_model" |
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#define PPC_CPU_MODEL "ppc_cpu" |
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#define PPC_CLOCK_FREQUENCY PPC_MHz(10) |
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#define PPC_BUS_FREQUENCY PPC_MHz(10) |
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#define PPC_TIMEBASE_FREQUENCY (PPC_CLOCK_FREQUENCY / TB_TO_PTB_FACTOR) |
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struct PPC_CPU_State { |
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// * uisa |
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uint32 gpr[32]; |
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uint64 fpr[32]; |
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uint32 cr; |
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uint32 fpscr; |
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uint32 xer; // spr 1 |
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uint32 xer_ca; // carry from xer |
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uint32 lr; // spr 8 |
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uint32 ctr; // spr 9 |
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// * oea |
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uint32 msr; |
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uint32 pvr; // spr 287 |
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// * memory managment |
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uint32 ibatu[4]; // spr 528, 530, 532, 534 |
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uint32 ibatl[4]; // spr 529, 531, 533, 535 |
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uint32 ibat_bl17[4]; // for internal use |
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uint32 dbatu[4]; // spr 536, 538, 540, 542 |
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uint32 dbatl[4]; // spr 537, 539, 541, 543 |
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uint32 dbat_bl17[4]; // for internal use |
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uint32 sdr1; // spr 25 (page table base address) |
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uint32 sr[16]; |
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// * exception handling |
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uint32 dar; // spr 19 |
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uint32 dsisr; // spr 18 |
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uint32 sprg[4]; // spr 272-275 |
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uint32 srr[2]; // spr 26-27 |
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// * misc |
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uint32 dec; // spr 22 |
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uint32 ear; // spr 282 .101 |
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uint32 pir; // spr 1032 |
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uint64 tb; // .75 spr 284(l)/285(u) |
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uint32 hid[16]; |
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// * internal |
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uint32 pc; |
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uint32 npc; |
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uint32 current_opc; |
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bool exception_pending; |
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bool dec_exception; |
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bool ext_exception; |
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bool stop_exception; |
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bool singlestep_ignore; |
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uint32 pagetable_base; |
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int pagetable_hashmask; |
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uint32 reserve; |
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bool have_reservation; |
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// for generic cpu core |
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uint32 effective_code_page; |
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byte *physical_code_page; |
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uint64 pdec; // more precise version of dec |
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uint64 ptb; // more precise version of tb |
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// for altivec |
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uint32 vscr; |
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uint32 vrsave; // spr 256 |
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Vector_t vr[36]; // <--- this MUST be 16-byte alligned |
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uint32 vtemp; |
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}; |
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extern PPC_CPU_State gCPU; |
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void ppc_cpu_atomic_raise_ext_exception(); |
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void ppc_cpu_atomic_cancel_ext_exception(); |
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extern uint32 gBreakpoint; |
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extern uint32 gBreakpoint2; |
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void ppc_set_singlestep_v(bool v, const char *file, int line, const char *format, ...); |
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void ppc_set_singlestep_nonverbose(bool v); |
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#endif |
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