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/* |
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* Copyright (C) 2007 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: dev_mvme187.c,v 1.6 2007/06/15 19:57:33 debug Exp $ |
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* |
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* COMMENT: MVME187-specific devices and control registers |
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*/ |
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|
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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|
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#include "cpu.h" |
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#include "device.h" |
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#include "emul.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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|
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|
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#include "mvme187.h" |
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#include "mvme_memcreg.h" |
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#include "m8820x.h" |
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|
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|
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struct mvme187_data { |
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struct memcreg memcreg; |
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}; |
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|
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|
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DEVICE_ACCESS(mvme187_memc) |
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{ |
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uint64_t idata = 0, odata = 0; |
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struct mvme187_data *d = extra; |
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int controller = 0; |
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|
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if (writeflag == MEM_WRITE) |
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idata = memory_readmax64(cpu, data, len); |
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|
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if (relative_addr & 0x100) { |
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controller = 1; |
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relative_addr &= ~0x100; |
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} |
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|
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switch (relative_addr) { |
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|
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case 0x08: /* memconf */ |
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if (writeflag == MEM_READ) { |
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odata = ((uint8_t*)&d->memcreg)[relative_addr]; |
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} else { |
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fatal("mvme187_memc: Write to relative_addr %i not yet" |
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" implemented!\n"); |
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exit(1); |
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} |
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break; |
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|
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default:fatal("[ mvme187_memc: unimplemented %s offset 0x%x", |
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writeflag == MEM_WRITE? "write to" : "read from", |
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(int) relative_addr); |
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if (writeflag == MEM_WRITE) |
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fatal(": 0x%x", (int)idata); |
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fatal(" ]\n"); |
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exit(1); |
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} |
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|
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if (writeflag == MEM_READ) |
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memory_writemax64(cpu, data, len, odata); |
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|
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return 1; |
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} |
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|
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|
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DEVINIT(mvme187) |
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{ |
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struct mvme187_data *d; |
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char tmpstr[300]; |
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struct m8820x_cmmu *cmmu; |
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int size_per_memc, r; |
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|
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CHECK_ALLOCATION(d = malloc(sizeof(struct mvme187_data))); |
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memset(d, 0, sizeof(struct mvme187_data)); |
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|
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|
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/* |
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* Two memory controllers per MVME187 machine: |
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*/ |
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|
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size_per_memc = devinit->machine->physical_ram_in_mb / 2 * 1048576; |
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for (r=0; ; r++) { |
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if (MEMC_MEMCONF_RTOB(r) > size_per_memc) { |
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r--; |
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break; |
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} |
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} |
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|
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d->memcreg.memc_chipid = MEMC_CHIPID; |
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d->memcreg.memc_chiprev = 1; |
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d->memcreg.memc_memconf = r; |
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|
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memory_device_register(devinit->machine->memory, devinit->name, |
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MVME187_MEM_CTLR, 0x200, dev_mvme187_memc_access, (void *)d, |
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DM_DEFAULT, NULL); |
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|
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|
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/* Instruction CMMU: */ |
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CHECK_ALLOCATION(cmmu = malloc(sizeof(struct m8820x_cmmu))); |
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memset(cmmu, 0, sizeof(struct m8820x_cmmu)); |
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|
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devinit->machine->cpus[devinit->machine->bootstrap_cpu]-> |
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cd.m88k.cmmu[0] = cmmu; |
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/* This is a 88200, revision 9: */ |
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cmmu->reg[CMMU_IDR] = (M88200_ID << 21) | (9 << 16); |
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snprintf(tmpstr, sizeof(tmpstr), |
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"m8820x addr=0x%x addr2=0", MVME187_SBC_CMMU_I); |
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device_add(devinit->machine, tmpstr); |
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|
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/* ... and data CMMU: */ |
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CHECK_ALLOCATION(cmmu = malloc(sizeof(struct m8820x_cmmu))); |
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memset(cmmu, 0, sizeof(struct m8820x_cmmu)); |
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|
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devinit->machine->cpus[devinit->machine->bootstrap_cpu]-> |
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cd.m88k.cmmu[1] = cmmu; |
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/* This is also a 88200, revision 9: */ |
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cmmu->reg[CMMU_IDR] = (M88200_ID << 21) | (9 << 16); |
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cmmu->batc[8] = BATC8; |
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cmmu->batc[9] = BATC9; |
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snprintf(tmpstr, sizeof(tmpstr), |
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"m8820x addr=0x%x addr2=1", MVME187_SBC_CMMU_D); |
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device_add(devinit->machine, tmpstr); |
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|
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|
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return 1; |
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} |
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