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/* GXemul: $Id: sh4_rtcreg.h,v 1.1 2006/11/11 01:02:17 debug Exp $ */ |
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/* $NetBSD: rtcreg.h,v 1.9 2006/03/04 01:55:03 uwe Exp $ */ |
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#ifndef SH4_RTCREG_H |
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#define SH4_RTCREG_H |
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|
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/*- |
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* Copyright (C) 1999 SAITOH Masanobu. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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|
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/* #include <sh3/devreg.h> */ |
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|
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/* |
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* RTC |
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*/ |
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#define SH3_R64CNT 0xfffffec0 |
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#define SH3_RSECCNT 0xfffffec2 |
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#define SH3_RMINCNT 0xfffffec4 |
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#define SH3_RHRCNT 0xfffffec6 |
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#define SH3_RWKCNT 0xfffffec8 |
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#define SH3_RDAYCNT 0xfffffeca |
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#define SH3_RMONCNT 0xfffffecc |
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#define SH3_RYRCNT 0xfffffece |
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#define SH3_RSECAR 0xfffffed0 |
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#define SH3_RMINAR 0xfffffed2 |
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#define SH3_RHRAR 0xfffffed4 |
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#define SH3_RWKAR 0xfffffed6 |
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#define SH3_RDAYAR 0xfffffed8 |
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#define SH3_RMONAR 0xfffffeda |
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#define SH3_RCR1 0xfffffedc |
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#define SH3_RCR2 0xfffffede |
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|
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#define SH4_R64CNT 0xffc80000 |
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#define SH4_RSECCNT 0xffc80004 |
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#define SH4_RMINCNT 0xffc80008 |
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#define SH4_RHRCNT 0xffc8000c |
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#define SH4_RWKCNT 0xffc80010 |
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#define SH4_RDAYCNT 0xffc80014 |
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#define SH4_RMONCNT 0xffc80018 |
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#define SH4_RYRCNT 0xffc8001c /* 16 bit */ |
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#define SH4_RSECAR 0xffc80020 |
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#define SH4_RMINAR 0xffc80024 |
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#define SH4_RHRAR 0xffc80028 |
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#define SH4_RWKAR 0xffc8002c |
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#define SH4_RDAYAR 0xffc80030 |
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#define SH4_RMONAR 0xffc80034 |
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#define SH4_RCR1 0xffc80038 |
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#define SH4_RCR2 0xffc8003c |
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|
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#define SH_RCR1_CF 0x80 |
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#define SH_RCR1_CIE 0x10 |
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#define SH_RCR1_AIE 0x08 |
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#define SH_RCR1_AF 0x01 |
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#define SH_RCR2_PEF 0x80 |
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#define SH_RCR2_PES2 0x40 |
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#define SH_RCR2_PES1 0x20 |
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#define SH_RCR2_PES0 0x10 |
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#define SH_RCR2_ENABLE 0x08 |
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#define SH_RCR2_ADJ 0x04 |
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#define SH_RCR2_RESET 0x02 |
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#define SH_RCR2_START 0x01 |
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|
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#ifndef _LOCORE |
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#if defined(SH3) && defined(SH4) |
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extern uint32_t __sh_R64CNT; |
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extern uint32_t __sh_RSECCNT; |
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extern uint32_t __sh_RMINCNT; |
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extern uint32_t __sh_RHRCNT; |
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extern uint32_t __sh_RWKCNT; |
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extern uint32_t __sh_RDAYCNT; |
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extern uint32_t __sh_RMONCNT; |
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extern uint32_t __sh_RYRCNT; |
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extern uint32_t __sh_RSECAR; |
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extern uint32_t __sh_RMINAR; |
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extern uint32_t __sh_RHRAR; |
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extern uint32_t __sh_RWKAR; |
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extern uint32_t __sh_RDAYAR; |
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extern uint32_t __sh_RMONAR; |
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extern uint32_t __sh_RCR1; |
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extern uint32_t __sh_RCR2; |
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#endif /* SH3 && SH4 */ |
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#endif /* !_LOCORE */ |
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|
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#endif /* SH4_RTCREG_H */ |
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