/[gxemul]/upstream/0.4.4/src/include/ppc_pte.h
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Contents of /upstream/0.4.4/src/include/ppc_pte.h

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Revision 35 - (show annotations)
Mon Oct 8 16:21:26 2007 UTC (16 years, 6 months ago) by dpavlin
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File size: 5172 byte(s)
0.4.4
1 /* GXemul: $Id: ppc_pte.h,v 1.1 2005/11/22 16:26:39 debug Exp $ */
2 /* $NetBSD: pte.h,v 1.5 2003/11/21 22:57:14 matt Exp $ */
3
4 #ifndef _POWERPC_OEA_PTE_H_
5 #define _POWERPC_OEA_PTE_H_
6
7 /*-
8 * Copyright (C) 2003 Matt Thomas
9 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
10 * Copyright (C) 1995, 1996 TooLs GmbH.
11 * All rights reserved.
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 3. All advertising materials mentioning features or use of this software
22 * must display the following acknowledgement:
23 * This product includes software developed by TooLs GmbH.
24 * 4. The name of TooLs GmbH may not be used to endorse or promote products
25 * derived from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
28 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
29 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
32 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
33 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
34 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
35 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
36 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #if 0
40 #include <sys/queue.h>
41
42 /*
43 * Page Table Entries
44 */
45 #ifndef _LOCORE
46 struct pte {
47 register_t pte_hi;
48 register_t pte_lo;
49 };
50
51 struct pteg {
52 struct pte pt[8];
53 };
54 #endif /* _LOCORE */
55 #endif
56
57 /* High word: */
58 #ifdef PPC_OEA64
59 #define PTE_VALID 0x00000001
60 #define PTE_HID 0x00000002
61 #define PTE_API 0x00000f80
62 #define PTE_API_SHFT 7
63 #define PTE_VSID_SHFT 12
64 #define PTE_VSID (~0xfffL)
65 #else
66 #define PTE_VALID 0x80000000
67 #define PTE_VSID 0x7fffff80
68 #define PTE_VSID_SHFT 7
69 #define PTE_VSID_LEN 24
70 #define PTE_HID 0x00000040
71 #define PTE_API 0x0000003f
72 #define PTE_API_SHFT 0
73 #endif /* PPC_OEA64 */
74
75
76 /* Low word: */
77 #define PTE_RPGN (~0xfffL)
78 #define PTE_RPGN_SHFT 12
79 #define PTE_REF 0x00000100
80 #define PTE_CHG 0x00000080
81 #define PTE_W 0x00000040 /* 1 = write-through, 0 = write-back */
82 #define PTE_I 0x00000020 /* cache inhibit */
83 #define PTE_M 0x00000010 /* memory coherency enable */
84 #define PTE_G 0x00000008 /* guarded region (not on 601) */
85 #define PTE_WIMG (PTE_W|PTE_I|PTE_M|PTE_G)
86 #define PTE_IG (PTE_I|PTE_G)
87 #define PTE_PP 0x00000003
88 #define PTE_SO 0x00000000 /* Super. Only (U: XX, S: RW) */
89 #define PTE_SW 0x00000001 /* Super. Write-Only (U: RO, S: RW) */
90 #define PTE_BW 0x00000002 /* Supervisor (U: RW, S: RW) */
91 #define PTE_BR 0x00000003 /* Both Read Only (U: RO, S: RO) */
92 #define PTE_RW PTE_BW
93 #define PTE_RO PTE_BR
94
95 #define PTE_EXEC 0x00000200 /* pseudo bit; page is exec */
96
97 /*
98 * Extract bits from address
99 */
100 #define ADDR_SR (~0x0fffffffL)
101 #define ADDR_SR_SHFT 28
102 #define ADDR_PIDX 0x0ffff000
103 #define ADDR_PIDX_SHFT 12
104 #ifdef PPC_OEA64
105 #define ADDR_API_SHFT 23 /* API is 5 bits */
106 #else
107 #define ADDR_API_SHFT 22 /* API is 6 bits */
108 #endif /* PPC_OEA64 */
109 #define ADDR_POFF 0x00000fff
110
111 #ifdef PPC_OEA64
112 /*
113 * Segment Table Element
114 */
115 #if 0
116 #ifndef _LOCORE
117 struct ste {
118 register_t ste_hi;
119 register_t ste_lo;
120 };
121
122 struct steg {
123 struct ste st[8];
124 };
125 #endif /* _LOCORE */
126 #endif
127
128 /* High Word */
129 #define STE_VALID 0x00000080
130 #define STE_TYPE 0x00000040
131 #define STE_SUKEY 0x00000020 /* Super-state protection */
132 #define STE_PRKEY 0x00000010 /* User-state protection */
133 #define STE_NOEXEC 0x00000008 /* No-execute protection bit */
134 #define STE_ESID (~0x0fffffffL) /* Effective Segment ID */
135 #define STE_ESID_SHFT 28
136 #define STE_ESID_MASK 0x0000001f /* low 5 bits of the ESID */
137
138 /* Low Word */
139 #define STE_VSID (~0xfffL) /* Virtual Segment ID */
140 #define STE_VSID_SHFT 12
141 #defien STE_VSID_WIDTH 52
142
143 #define SR_VSID_SHFT STE_VSID_SHFT /* compatibility with PPC_OEA */
144 #define SR_VSID_WIDTH STE_VSID_WIDTH /* compatibility with PPC_OEA */
145
146 #define SR_KEY_LEN 9 /* 64 groups of 8 segment entries */
147 #else /* !defined(PPC_OEA64) */
148
149 /*
150 * Segment registers
151 */
152 #define SR_KEY_LEN 4 /* 16 segment registers */
153 #define SR_TYPE 0x80000000 /* T=0 selects memory format */
154 #define SR_SUKEY 0x40000000 /* Supervisor protection key */
155 #define SR_PRKEY 0x20000000 /* User protection key */
156 #define SR_NOEXEC 0x10000000 /* No-execute protection bit */
157 #define SR_VSID_SHFT 0 /* Starts at LSB */
158 #define SR_VSID_WIDTH 24 /* Goes for 24 bits */
159
160 #endif /* PPC_OEA64 */
161
162 /* Virtual segment ID */
163 #define SR_VSID (((1L << SR_VSID_WIDTH) - 1) << SR_VSID_SHFT)
164
165 #endif /* _POWERPC_OEA_PTE_H_ */

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