28 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
29 |
* |
* |
30 |
* |
* |
31 |
* $Id: mips_cpu_types.h,v 1.11 2005/11/08 12:03:27 debug Exp $ |
* $Id: mips_cpu_types.h,v 1.13 2006/01/11 19:20:08 debug Exp $ |
32 |
* |
* |
33 |
* MIPS CPU types. |
* MIPS CPU types. |
34 |
*/ |
*/ |
97 |
{ "VR5432", MIPS_R5400, 13, 0, EXC4K, MMU4K, 4, 48, 4,15,0,0,15,0,0, 0, 0, 0 }, /* DCOUNT? instrs/cycle? linesize? etc */ \ |
{ "VR5432", MIPS_R5400, 13, 0, EXC4K, MMU4K, 4, 48, 4,15,0,0,15,0,0, 0, 0, 0 }, /* DCOUNT? instrs/cycle? linesize? etc */ \ |
98 |
{ "RM5200", MIPS_RM5200,0xa0, 0, EXC4K, MMU4K, 4, 48, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* DCOUNT? instrs/cycle? */ \ |
{ "RM5200", MIPS_RM5200,0xa0, 0, EXC4K, MMU4K, 4, 48, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* DCOUNT? instrs/cycle? */ \ |
99 |
{ "RM7000", MIPS_RM7000,0x0 /* ? */,DCOUNT, EXC4K, MMU4K, 4, 48, 4,14,5,1,14,5,1,18, 6, 1 }, /* instrs/cycle? cachelinesize & assoc.? RM7000A? */ \ |
{ "RM7000", MIPS_RM7000,0x0 /* ? */,DCOUNT, EXC4K, MMU4K, 4, 48, 4,14,5,1,14,5,1,18, 6, 1 }, /* instrs/cycle? cachelinesize & assoc.? RM7000A? */ \ |
100 |
{ "RM7900", 0 /*TODO*/, 0x0 /* ? */,DCOUNT, EXC4K, MMU4K, 4, 64, 4,14,5,1,14,5,1,18, 6, 1 }, /* instrs/cycle? cachelinesize? assoc = 4ways for all */ \ |
{ "RM7900", 0x34 /*?*/, 0x0 /* ? */,DCOUNT,EXC4K, MMU4K, 4, 64, 4,14,5,1,14,5,1,18, 6, 1 }, /* instrs/cycle? cachelinesize? assoc = 4ways for all */ \ |
101 |
{ "RM9000", 0x34, 0x0 /* ? */,DCOUNT, EXC4K, MMU4K, 4, 48, 4,14,5,1,14,5,1,18, 6, 1 }, /* This is totally bogus */ \ |
{ "RM9000", 0x34 /*?*/, 0x0 /* ? */,DCOUNT,EXC4K, MMU4K, 4, 48, 4,14,5,1,14,5,1,18, 6, 1 }, /* This is totally bogus */ \ |
102 |
{ "RC32334", MIPS_RC32300,0x00, 0, EXC32, MMU4K, 32, 16, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, \ |
{ "RC32334", MIPS_RC32300,0x00, 0, EXC32, MMU4K, 32, 16, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, \ |
103 |
{ "4Kc", 0x100+MIPS_4Kc, 1, 0, EXC32, MMU32, 32, 16, 4,14,4,2,14,4,2, 0, 0, 0 }, /* DCOUNT? instrs/cycle? BOGUS, TODO */ \ |
{ "4Kc", 0x100+MIPS_4Kc, 1, 0, EXC32, MMU32, 32, 16, 4,14,4,2,14,4,2, 0, 0, 0 }, /* DCOUNT? instrs/cycle? BOGUS, TODO */ \ |
104 |
{ "5Kc", 0x100+MIPS_5Kc, 1, 0, EXC64, MMU64, 64, 48, 4,15,5,2,15,5,2, 0, 0, 0 }, /* DCOUNT? instrs/cycle? BOGUS, TODO */ \ |
{ "5Kc", 0x100+MIPS_5Kc, 1, 0, EXC64, MMU64, 64, 48, 4,15,5,2,15,5,2, 0, 0, 0 }, /* DCOUNT? instrs/cycle? BOGUS, TODO */ \ |