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/* gxemul: $Id: dec_kn02.h,v 1.3 2005/03/05 12:34:02 debug Exp $ */ |
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/* $NetBSD: kn02.h,v 1.8 2000/02/29 04:41:56 nisimura Exp $ */ |
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|
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/*- |
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* Copyright (c) 1992, 1993 |
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* The Regents of the University of California. All rights reserved. |
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* |
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* This code is derived from software contributed to Berkeley by |
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* The Mach Operating System project at Carnegie-Mellon University, |
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* Ralph Campbell and Rick Macklem. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. All advertising materials mentioning features or use of this software |
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* must display the following acknowledgement: |
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* This product includes software developed by the University of |
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* California, Berkeley and its contributors. |
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* 4. Neither the name of the University nor the names of its contributors |
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* may be used to endorse or promote products derived from this software |
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* without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* @(#)kn02.h 8.1 (Berkeley) 6/10/93 |
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*/ |
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|
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/* |
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* Mach Operating System |
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* Copyright (c) 1991,1990,1989 Carnegie Mellon University |
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* All Rights Reserved. |
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* |
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* Permission to use, copy, modify and distribute this software and |
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* its documentation is hereby granted, provided that both the copyright |
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* notice and this permission notice appear in all copies of the |
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* software, derivative works or modified versions, and any portions |
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* thereof, and that both notices appear in supporting documentation. |
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* |
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" |
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND |
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. |
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* |
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* Carnegie Mellon requests users of this software to return to |
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* |
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU |
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* School of Computer Science |
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* Carnegie Mellon University |
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* Pittsburgh PA 15213-3890 |
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* |
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* any improvements or extensions that they make and grant Carnegie the |
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* rights to redistribute these changes. |
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*/ |
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/* |
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* HISTORY |
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* Log: kn02.h,v |
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* Revision 2.5 91/05/14 17:23:30 mrt |
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* Correcting copyright |
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* |
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* Revision 2.4 91/02/05 17:42:03 mrt |
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* Added author notices |
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* [91/02/04 11:14:23 mrt] |
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* |
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* Changed to use new Mach copyright |
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* [91/02/02 12:12:58 mrt] |
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* |
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* Revision 2.3 90/12/05 23:32:04 af |
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* |
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* |
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* Revision 2.1.1.2 90/11/01 02:48:10 af |
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* Reworked a bit, made reentrant. |
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* |
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* Revision 2.1.1.1 90/10/03 11:48:22 af |
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* Created, from the DEC specs: |
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* "DECstation 5000/200 KN02 System Module Functional Specification" |
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* Workstation Systems Engineering, Palo Alto, CA. Aug 27, 1990. |
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* [90/09/03 af] |
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*/ |
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/* |
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* File: kn02.h |
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* Author: Alessandro Forin, Carnegie Mellon University |
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* Date: 9/90 |
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* |
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* Definitions specific to the KN02 processor (3max) |
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*/ |
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|
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#ifndef MIPS_KN02_H |
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#define MIPS_KN02_H 1 |
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|
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/* |
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* KN02's Physical address space |
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*/ |
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#define KN02_PHYS_MIN 0x00000000 /* 512 Meg */ |
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#define KN02_PHYS_MAX 0x1fffffff |
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|
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/* |
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* Memory map |
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*/ |
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#define KN02_PHYS_MEMORY_START 0x00000000 |
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#define KN02_PHYS_MEMORY_END 0x1dffffff /* 480 Meg in 15 slots */ |
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|
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/* |
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* I/O map |
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*/ |
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#define KN02_PHYS_TC_0_START 0x1e000000 /* TURBOchannel, slot 0 */ |
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#define KN02_PHYS_TC_0_END 0x1e3fffff /* 4 Meg, option0 */ |
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|
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#define KN02_PHYS_TC_1_START 0x1e400000 /* TURBOchannel, slot 1 */ |
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#define KN02_PHYS_TC_1_END 0x1e7fffff /* 4 Meg, option1 */ |
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|
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#define KN02_PHYS_TC_2_START 0x1e800000 /* TURBOchannel, slot 2 */ |
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#define KN02_PHYS_TC_2_END 0x1ebfffff /* 4 Meg, option2 */ |
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|
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#define KN02_PHYS_TC_3_START 0x1ec00000 /* TURBOchannel, slot 3 */ |
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#define KN02_PHYS_TC_3_END 0x1effffff /* 4 Meg, reserved*/ |
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|
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#define KN02_PHYS_TC_4_START 0x1f000000 /* TURBOchannel, slot 4 */ |
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#define KN02_PHYS_TC_4_END 0x1f3fffff /* 4 Meg, reserved*/ |
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|
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#define KN02_PHYS_TC_5_START 0x1f400000 /* TURBOchannel, slot 5 */ |
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#define KN02_PHYS_TC_5_END 0x1f7fffff /* 4 Meg, SCSI */ |
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|
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#define KN02_PHYS_TC_6_START 0x1f800000 /* TURBOchannel, slot 6 */ |
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#define KN02_PHYS_TC_6_END 0x1fbfffff /* 4 Meg, ether */ |
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|
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#define KN02_PHYS_TC_7_START 0x1fc00000 /* TURBOchannel, slot 7 */ |
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#define KN02_PHYS_TC_7_END 0x1fffffff /* 4 Meg, system devices */ |
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|
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#define KN02_PHYS_TC_START KN02_PHYS_TC_0_START |
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#define KN02_PHYS_TC_END KN02_PHYS_TC_7_END /* 32 Meg */ |
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|
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#define KN02_TC_NSLOTS 8 |
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#define KN02_TC_MIN 0 |
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#define KN02_TC_MAX 6 /* don't look at system slot */ |
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|
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/* |
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* System devices |
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*/ |
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#define KN02_SYS_ROM_START KN02_PHYS_TC_7_START+0x000000 |
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#define KN02_SYS_ROM_END KN02_PHYS_TC_7_START+0x07ffff |
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#define KN02_SYS_RESERVED KN02_PHYS_TC_7_START+0x080000 |
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#define KN02_SYS_CHKSYN KN02_PHYS_TC_7_START+0x100000 |
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#define KN02_SYS_ERRADR KN02_PHYS_TC_7_START+0x180000 |
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#define KN02_SYS_DZ KN02_PHYS_TC_7_START+0x200000 |
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#define KN02_SYS_CLOCK KN02_PHYS_TC_7_START+0x280000 |
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#define KN02_SYS_CSR KN02_PHYS_TC_7_START+0x300000 |
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#define KN02_SYS_ROM1_START KN02_PHYS_TC_7_START+0x380000 |
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#define KN02_SYS_ROM1_END KN02_PHYS_TC_7_START+0x3fffff |
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|
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/* |
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* Interrupts |
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*/ |
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#define KN02_INT_FPA IP_LEV7 /* Floating Point coproc */ |
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#define KN02_INT_RES1 IP_LEV6 /* reserved, unused */ |
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#define KN02_INT_MEM IP_LEV5 /* memory controller */ |
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#define KN02_INT_RES2 IP_LEV4 /* reserved, unused */ |
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#define KN02_INT_CLOCK IP_LEV3 /* RTC chip */ |
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#define KN02_INT_IO IP_LEV2 /* I/O slots */ |
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|
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/* |
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* System board registers |
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*/ |
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/* system Status and Control register */ |
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#define KN02_CSR_IOINT 0x000000ff /* ro Interrupt pending */ |
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# define KN02_IP_DZ 0x00000080 /* serial lines */ |
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# define KN02_IP_LANCE 0x00000040 /* thin ethernet */ |
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# define KN02_IP_SCSI 0x00000020 /* ASC scsi controller */ |
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# define KN02_IP_XXXX 0x00000018 /* unused */ |
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# define KN02_IP_SLOT2 0x00000004 /* option slot 2 */ |
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# define KN02_IP_SLOT1 0x00000002 /* option slot 1 */ |
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# define KN02_IP_SLOT0 0x00000001 /* option slot 0 */ |
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|
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#define KN02_CSR_BAUD38 0x00000100 /* rw Max DZ baud rate */ |
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#define KN02_CSR_DIAGDN 0x00000200 /* rw Diag jumper */ |
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#define KN02_CSR_BNK32M 0x00000400 /* rw Memory bank stride */ |
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#define KN02_CSR_TXDIS 0x00000800 /* rw Disable DZ xmit */ |
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#define KN02_CSR_LEDIAG 0x00001000 /* rw Latch ECC */ |
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#define KN02_CSR_CORRECT 0x00002000 /* rw ECC corrects single bit */ |
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#define KN02_CSR_ECCMD 0x0000c000 /* rw ECC logic mode */ |
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#define KN02_CSR_IOINTEN 0x00ff0000 /* rw Interrupt enable */ |
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#define KN02_CSR_IOINTEN_SHIFT 16 |
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#define KN02_CSR_NRMMOD 0x01000000 /* ro Diag jumper state */ |
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#define KN02_CSR_REFEVEN 0x02000000 /* ro Refreshing even mem bank */ |
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#define KN02_CSR_PRSVNVR 0x04000000 /* ro Preserve NVR jumper */ |
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#define KN02_CSR_PSWARN 0x08000000 /* ro PS overheating */ |
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#define KN02_CSR_RRESERVED 0xf0000000 /* rz */ |
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|
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#define KN02_CSR_LEDS 0x000000ff /* wo Diag LEDs */ |
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#define KN02_CSR_WRESERVED 0xff000000 /* wz */ |
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|
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/* Error address status register */ |
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#define KN02_ERR_ADDRESS 0x07ffffff /* phys address */ |
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#define KN02_ERR_RESERVED 0x08000000 /* unused */ |
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#define KN02_ERR_ECCERR 0x10000000 /* ECC error */ |
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#define KN02_ERR_WRITE 0x20000000 /* read/write transaction */ |
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#define KN02_ERR_CPU 0x40000000 /* CPU or device initiator */ |
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#define KN02_ERR_VALID 0x80000000 /* Info is valid */ |
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|
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/* ECC check/syndrome status register */ |
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#define KN02_ECC_SYNLO 0x0000007f /* syndrome, even bank */ |
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#define KN02_ECC_SNGLO 0x00000080 /* single bit err, " */ |
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#define KN02_ECC_CHKLO 0x00007f00 /* check bits, " " */ |
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#define KN02_ECC_VLDLO 0x00008000 /* info valid for " */ |
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#define KN02_ECC_SYNHI 0x007f0000 /* syndrome, odd bank */ |
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#define KN02_ECC_SNGHI 0x00800000 /* single bit err, " */ |
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#define KN02_ECC_CHKHI 0x7f000000 /* check bits, " " */ |
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#define KN02_ECC_VLDHI 0x80000000 /* info valid for " */ |
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|
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#endif /* MIPS_KN02_H */ |
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