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#define CPU_ARM_H |
#define CPU_ARM_H |
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/* |
/* |
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* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
* Copyright (C) 2005-2007 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: cpu_arm.h,v 1.65 2006/02/17 18:38:30 debug Exp $ |
* $Id: cpu_arm.h,v 1.70 2007/02/05 16:49:21 debug Exp $ |
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*/ |
*/ |
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#include "misc.h" |
#include "misc.h" |
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#include "interrupt.h" |
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struct cpu_family; |
struct cpu_family; |
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#define ARM_ADDR_TO_PAGENR(a) ((a) >> (ARM_IC_ENTRIES_SHIFT \ |
#define ARM_ADDR_TO_PAGENR(a) ((a) >> (ARM_IC_ENTRIES_SHIFT \ |
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+ ARM_INSTR_ALIGNMENT_SHIFT)) |
+ ARM_INSTR_ALIGNMENT_SHIFT)) |
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struct arm_instr_call { |
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void (*f)(struct cpu *, struct arm_instr_call *); |
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size_t arg[ARM_N_IC_ARGS]; |
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}; |
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/* Translation cache struct for each physical page: */ |
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struct arm_tc_physpage { |
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struct arm_instr_call ics[ARM_IC_ENTRIES_PER_PAGE + 1]; |
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uint32_t next_ofs; /* or 0 for end of chain */ |
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uint32_t physaddr; |
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int flags; |
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}; |
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#define ARM_F_N 8 /* Same as ARM_FLAG_*, but */ |
#define ARM_F_N 8 /* Same as ARM_FLAG_*, but */ |
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#define ARM_F_Z 4 /* for the 'flags' field instead */ |
#define ARM_F_Z 4 /* for the 'flags' field instead */ |
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#define ARM_F_C 2 /* of cpsr. */ |
#define ARM_F_C 2 /* of cpsr. */ |
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#define ARM_EXCEPTION_IRQ 6 |
#define ARM_EXCEPTION_IRQ 6 |
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#define ARM_EXCEPTION_FIQ 7 |
#define ARM_EXCEPTION_FIQ 7 |
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DYNTRANS_MISC_DECLARATIONS(arm,ARM,uint32_t) |
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#define ARM_MAX_VPH_TLB_ENTRIES 128 |
#define ARM_MAX_VPH_TLB_ENTRIES 128 |
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struct arm_vpg_tlb_entry { |
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unsigned char valid; |
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unsigned char writeflag; |
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uint32_t vaddr_page; |
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uint32_t paddr_page; |
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unsigned char *host_page; |
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}; |
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struct arm_cpu { |
struct arm_cpu { |
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uint32_t i80321_isrc; /* current assertions */ |
uint32_t i80321_isrc; /* current assertions */ |
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uint32_t tmr0; |
uint32_t tmr0; |
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uint32_t tmr1; |
uint32_t tmr1; |
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struct interrupt tmr0_irq; |
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struct interrupt tmr1_irq; |
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uint32_t tcr0; |
uint32_t tcr0; |
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uint32_t tcr1; |
uint32_t tcr1; |
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uint32_t trr0; |
uint32_t trr0; |
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void arm_translation_table_set_l1_b(struct cpu *cpu, uint32_t vaddr, |
void arm_translation_table_set_l1_b(struct cpu *cpu, uint32_t vaddr, |
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uint32_t paddr); |
uint32_t paddr); |
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void arm_exception(struct cpu *, int); |
void arm_exception(struct cpu *, int); |
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int arm_run_instr(struct cpu *cpu); |
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void arm_update_translation_table(struct cpu *cpu, uint64_t vaddr_page, |
void arm_update_translation_table(struct cpu *cpu, uint64_t vaddr_page, |
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unsigned char *host_page, int writeflag, uint64_t paddr_page); |
unsigned char *host_page, int writeflag, uint64_t paddr_page); |
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void arm_invalidate_translation_caches(struct cpu *cpu, uint64_t, int); |
void arm_invalidate_translation_caches(struct cpu *cpu, uint64_t, int); |
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int crn, int crm, int rd); |
int crn, int crm, int rd); |
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/* memory_arm.c: */ |
/* memory_arm.c: */ |
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int arm_translate_address(struct cpu *cpu, uint64_t vaddr, |
int arm_translate_v2p(struct cpu *cpu, uint64_t vaddr, |
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uint64_t *return_addr, int flags); |
uint64_t *return_addr, int flags); |
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int arm_translate_address_mmu(struct cpu *cpu, uint64_t vaddr, |
int arm_translate_v2p_mmu(struct cpu *cpu, uint64_t vaddr, |
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uint64_t *return_addr, int flags); |
uint64_t *return_addr, int flags); |
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#endif /* CPU_ARM_H */ |
#endif /* CPU_ARM_H */ |