/[gxemul]/upstream/0.4.4/src/include/cpu_alpha.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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revision 20 by dpavlin, Mon Oct 8 16:19:23 2007 UTC revision 32 by dpavlin, Mon Oct 8 16:20:58 2007 UTC
# Line 2  Line 2 
2  #define CPU_ALPHA_H  #define CPU_ALPHA_H
3    
4  /*  /*
5   *  Copyright (C) 2005  Anders Gavare.  All rights reserved.   *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.
6   *   *
7   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
8   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 28  Line 28 
28   *  SUCH DAMAGE.   *  SUCH DAMAGE.
29   *   *
30   *   *
31   *  $Id: cpu_alpha.h,v 1.27 2005/11/16 21:15:19 debug Exp $   *  $Id: cpu_alpha.h,v 1.44 2006/09/01 11:39:50 debug Exp $
32   */   */
33    
34  #include "misc.h"  #include "misc.h"
35    
36    #include "alpha_cpu.h"
37    
38    
39    /*  ALPHA CPU types:  */
40    struct alpha_cpu_type_def {
41            char            *name;
42            uint64_t        pcs_type;       /*  See alpha_rpb.h  */
43            int             features;
44            int             implver;
45            int             icache_shift;
46            int             ilinesize;
47            int             iway;
48            int             dcache_shift;
49            int             dlinesize;
50            int             dway;
51            int             l2cache_shift;
52            int             l2linesize;
53            int             l2way;
54    };
55    
56    /*  TODO: More features  */
57    #define ALPHA_FEATURE_BWX               1
58    
59    #define ALPHA_CPU_TYPE_DEFS     {                                       \
60            { "21064",      0x000000002ULL, 0, 0, 16,5,2, 16,5,2,  0,0,0 }, \
61            { "21066",      0x200000004ULL, 0, 0, 16,5,2, 16,5,2,  0,0,0 }, \
62            { "21164",      0x000000005ULL, 0, 1, 16,5,2, 16,5,2,  0,0,0 }, \
63            { "21164A-2",   0x000000007ULL, 0, 1, 16,5,2, 16,5,2,  0,0,0 }, \
64            { "21164PC",    0x000000009ULL, 0, 1, 16,5,2, 16,5,2,  0,0,0 }, \
65            { "21264",      0x00000000dULL, 0, 2, 16,5,2, 16,5,2,  0,0,0 }, \
66            { "21364",      0x000000000ULL, 0, 3, 16,5,2, 16,5,2,  0,0,0 }, \
67            { NULL,         0x000000000ULL, 0, 0,  0,0,0,  0,0,0,  0,0,0 }  }
68    
69    
70  struct cpu_family;  struct cpu_family;
71    
72    /*  ALPHA_KENTRY_INT .. ALPHA_KENTRY_SYS  */
73    #define N_ALPHA_KENTRY          6
74    
75  #define ALPHA_V0                0  #define ALPHA_V0                0
76  #define ALPHA_A0                16  #define ALPHA_A0                16
77  #define ALPHA_A1                17  #define ALPHA_A1                17
# Line 56  struct cpu_family; Line 92  struct cpu_family;
92          "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero"     }          "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero"     }
93    
94    
95    /*  Dyntrans definitions:  */
96    
97  #define ALPHA_N_IC_ARGS                 3  #define ALPHA_N_IC_ARGS                 3
98  #define ALPHA_INSTR_ALIGNMENT_SHIFT     2  #define ALPHA_INSTR_ALIGNMENT_SHIFT     2
99  #define ALPHA_IC_ENTRIES_SHIFT          11  #define ALPHA_IC_ENTRIES_SHIFT          11
# Line 65  struct cpu_family; Line 103  struct cpu_family;
103  #define ALPHA_ADDR_TO_PAGENR(a)         ((a) >> (ALPHA_IC_ENTRIES_SHIFT \  #define ALPHA_ADDR_TO_PAGENR(a)         ((a) >> (ALPHA_IC_ENTRIES_SHIFT \
104                                          + ALPHA_INSTR_ALIGNMENT_SHIFT))                                          + ALPHA_INSTR_ALIGNMENT_SHIFT))
105    
106  struct alpha_instr_call {  #define ALPHA_MAX_VPH_TLB_ENTRIES       128
         void    (*f)(struct cpu *, struct alpha_instr_call *);  
         size_t  arg[ALPHA_N_IC_ARGS];  
 };  
107    
108  /*  Translation cache struct for each physical page:  */  #define ALPHA_L2N               17
109  struct alpha_tc_physpage {  #define ALPHA_L3N               17
         struct alpha_instr_call ics[ALPHA_IC_ENTRIES_PER_PAGE + 1];  
         uint32_t        next_ofs;       /*  or 0 for end of chain  */  
         uint32_t        physaddr;  
         int             flags;  
 };  
110    
111    DYNTRANS_MISC_DECLARATIONS(alpha,ALPHA,uint64_t)
112    DYNTRANS_MISC64_DECLARATIONS(alpha,ALPHA,uint8_t)
113    
 /*  
  *  Virtual->physical->host page entry:  
  *  
  *      13 + 13 + 13 bits = 39 bits (should be enough for most userspace  
  *      applications)  
  *  
  *  There is also an additional check for kernel space addresses.  
  */  
 #define ALPHA_TOPSHIFT                  39  
 #define ALPHA_TOP_KERNEL                0x1fffff8  
 #define ALPHA_LEVEL0_SHIFT              26  
 #define ALPHA_LEVEL0                    8192  
 #define ALPHA_LEVEL1_SHIFT              13  
 #define ALPHA_LEVEL1                    8192  
 struct alpha_vph_page {  
         void            *host_load[ALPHA_LEVEL1];  
         void            *host_store[ALPHA_LEVEL1];  
         uint64_t        phys_addr[ALPHA_LEVEL1];  
         struct alpha_tc_physpage *phys_page[ALPHA_LEVEL1];  
         int             refcount;  
         struct alpha_vph_page   *next;  /*  Freelist, used if refcount = 0.  */  
 };  
114    
115  #define ALPHA_MAX_VPH_TLB_ENTRIES       128  #define ALPHA_PAGESHIFT         13
116  struct alpha_vpg_tlb_entry {  
         unsigned char   valid;  
         unsigned char   writeflag;  
         int64_t         timestamp;  
         uint64_t        vaddr_page;  
         uint64_t        paddr_page;  
         unsigned char   *host_page;  
 };  
117    
118  struct alpha_cpu {  struct alpha_cpu {
119            struct alpha_cpu_type_def       cpu_type;
120    
121    
122          /*          /*
123           *  General Purpose Registers:           *  General Purpose Registers:
124           */           */
# Line 120  struct alpha_cpu { Line 126  struct alpha_cpu {
126          uint64_t                r[N_ALPHA_REGS];        /*  Integer  */          uint64_t                r[N_ALPHA_REGS];        /*  Integer  */
127          uint64_t                f[N_ALPHA_REGS];        /*  Floating Point  */          uint64_t                f[N_ALPHA_REGS];        /*  Floating Point  */
128    
129            uint64_t                fpcr;                   /*  FP Control Reg.  */
130    
131          /*  Misc.:  */          /*  Misc.:  */
132          uint64_t                pcc;                    /*  Cycle Counter  */          uint64_t                pcc;                    /*  Cycle Counter  */
# Line 127  struct alpha_cpu { Line 134  struct alpha_cpu {
134          uint64_t                load_linked_addr;          uint64_t                load_linked_addr;
135          int                     ll_flag;          int                     ll_flag;
136    
137            /*  OSF1 PALcode specific:  */
138            uint64_t                vptptr;         /*  Virtual Page Table Ptr  */
139            uint64_t                sysvalue;
140            uint64_t                kgp;            /*  Kernel GP  */
141            uint64_t                kentry[N_ALPHA_KENTRY];
142            uint64_t                ctx;            /*  Ptr to current PCB (?)  */
143            struct alpha_pcb        pcb;            /*  Process Control Block  */
144    
         /*  
          *  Instruction translation cache:  
          */  
   
         /*  cur_ic_page is a pointer to an array of ALPHA_IC_ENTRIES_PER_PAGE  
             instruction call entries. next_ic points to the next such  
             call to be executed.  */  
         struct alpha_tc_physpage *cur_physpage;  
         struct alpha_instr_call *cur_ic_page;  
         struct alpha_instr_call *next_ic;  
   
         void                    (*combination_check)(struct cpu *,  
                                     struct alpha_instr_call *, int low_addr);  
145    
146          /*          /*
147           *  Virtual -> physical -> host address translation:           *  Instruction translation cache and Virtual->Physical->Host
148             *  address translation:
149           */           */
150            DYNTRANS_ITC(alpha)
151          struct alpha_vpg_tlb_entry vph_tlb_entry[ALPHA_MAX_VPH_TLB_ENTRIES];          VPH_TLBS(alpha,ALPHA)
152          struct alpha_vph_page   *vph_default_page;          VPH64(alpha,ALPHA,uint8_t)
         struct alpha_vph_page   *vph_next_free_page;  
         struct alpha_vph_table  *vph_next_free_table;  
         struct alpha_vph_page   *vph_table0[ALPHA_LEVEL0];  
         struct alpha_vph_page   *vph_table0_kernel[ALPHA_LEVEL0];  
153  };  };
154    
155    
# Line 160  void alpha_update_translation_table(stru Line 158  void alpha_update_translation_table(stru
158          unsigned char *host_page, int writeflag, uint64_t paddr_page);          unsigned char *host_page, int writeflag, uint64_t paddr_page);
159  void alpha_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);  void alpha_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);
160  void alpha_invalidate_code_translation(struct cpu *cpu, uint64_t, int);  void alpha_invalidate_code_translation(struct cpu *cpu, uint64_t, int);
161    void alpha_init_64bit_dummy_tables(struct cpu *cpu);
162    int alpha_run_instr(struct cpu *cpu);
163  int alpha_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,  int alpha_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,
164          unsigned char *data, size_t len, int writeflag, int cache_flags);          unsigned char *data, size_t len, int writeflag, int cache_flags);
165  int alpha_userland_memory_rw(struct cpu *cpu, struct memory *mem,  int alpha_userland_memory_rw(struct cpu *cpu, struct memory *mem,
# Line 171  int alpha_cpu_family_init(struct cpu_fam Line 171  int alpha_cpu_family_init(struct cpu_fam
171  void alpha_palcode_name(uint32_t palcode, char *buf, size_t buflen);  void alpha_palcode_name(uint32_t palcode, char *buf, size_t buflen);
172  void alpha_palcode(struct cpu *cpu, uint32_t palcode);  void alpha_palcode(struct cpu *cpu, uint32_t palcode);
173    
174    /*  memory_alpha.c:  */
175    int alpha_translate_v2p(struct cpu *cpu, uint64_t vaddr,
176            uint64_t *return_addr, int flags);
177    
178    
179  #endif  /*  CPU_ALPHA_H  */  #endif  /*  CPU_ALPHA_H  */
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