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#define BUS_PCI_H |
#define BUS_PCI_H |
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/* |
/* |
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* Copyright (C) 2004-2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2004-2006 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: bus_pci.h,v 1.23 2005/11/23 23:31:37 debug Exp $ |
* $Id: bus_pci.h,v 1.29 2006/02/18 13:15:21 debug Exp $ |
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*/ |
*/ |
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#include "misc.h" |
#include "misc.h" |
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uint64_t cur_pci_portbase; |
uint64_t cur_pci_portbase; |
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uint64_t cur_pci_membase; |
uint64_t cur_pci_membase; |
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/* Current (indirect) addr/data access: */ |
/* Current register access: */ |
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uint32_t pci_addr; |
int cur_bus, cur_device, cur_func, cur_reg; |
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int last_was_write_ffffffff; |
int last_was_write_ffffffff; |
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struct pci_device *first_device; |
struct pci_device *first_device; |
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int bus, device, function; |
int bus, device, function; |
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unsigned char cfg_mem[PCI_CFG_MEM_SIZE]; |
unsigned char cfg_mem[PCI_CFG_MEM_SIZE]; |
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unsigned char cfg_mem_size[PCI_CFG_MEM_SIZE]; |
unsigned char cfg_mem_size[PCI_CFG_MEM_SIZE]; |
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int cur_mapreg_offset; |
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}; |
}; |
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#define PCIINIT(name) void pciinit_ ## name(struct machine *machine, \ |
#define PCIINIT(name) void pciinit_ ## name(struct machine *machine, \ |
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#define BUS_PCI_DATA 0xcfc |
#define BUS_PCI_DATA 0xcfc |
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/* bus_pci.c: */ |
/* |
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int bus_pci_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
* bus_pci.c: |
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uint64_t *data, int len, int writeflag, struct pci_data *pci_data); |
*/ |
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void bus_pci_add(struct machine *machine, struct pci_data *pci_data, |
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struct memory *mem, int bus, int device, int function, char *name); |
/* Run-time access: */ |
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struct pci_data *bus_pci_init(int irq_nr, |
void bus_pci_decompose_1(uint32_t t, int *bus, int *dev, int *func, int *reg); |
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void bus_pci_setaddr(struct cpu *cpu, struct pci_data *pci_data, |
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int bus, int device, int function, int reg); |
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void bus_pci_data_access(struct cpu *cpu, struct pci_data *pci_data, |
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uint64_t *data, int len, int writeflag); |
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/* Initialization: */ |
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struct pci_data *bus_pci_init(struct machine *machine, int irq_nr, |
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uint64_t pci_actual_io_offset, uint64_t pci_actual_mem_offset, |
uint64_t pci_actual_io_offset, uint64_t pci_actual_mem_offset, |
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uint64_t pci_portbase, uint64_t pci_membase, int pci_irqbase, |
uint64_t pci_portbase, uint64_t pci_membase, int pci_irqbase, |
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uint64_t isa_portbase, uint64_t isa_membase, int isa_irqbase); |
uint64_t isa_portbase, uint64_t isa_membase, int isa_irqbase); |
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void bus_pci_add(struct machine *machine, struct pci_data *pci_data, |
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struct memory *mem, int bus, int device, int function, |
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const char *name); |
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#endif /* BUS_PCI_H */ |
#endif /* BUS_PCI_H */ |