/[gxemul]/upstream/0.4.4/src/include/algor_p5064reg.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Annotation of /upstream/0.4.4/src/include/algor_p5064reg.h

Parent Directory Parent Directory | Revision Log Revision Log


Revision 35 - (hide annotations)
Mon Oct 8 16:21:26 2007 UTC (16 years, 7 months ago) by dpavlin
File MIME type: text/plain
File size: 5720 byte(s)
0.4.4
1 dpavlin 22 /* GXemul: $Id: algor_p5064reg.h,v 1.1 2006/02/18 17:55:25 debug Exp $ */
2     /* $NetBSD: algor_p5064reg.h,v 1.2 2002/02/20 01:34:19 simonb Exp $ */
3    
4     #ifndef P5064_H
5     #define P5064_H
6    
7     /*-
8     * Copyright (c) 2001 The NetBSD Foundation, Inc.
9     * All rights reserved.
10     *
11     * This code is derived from software contributed to The NetBSD Foundation
12     * by Jason R. Thorpe.
13     *
14     * Redistribution and use in source and binary forms, with or without
15     * modification, are permitted provided that the following conditions
16     * are met:
17     * 1. Redistributions of source code must retain the above copyright
18     * notice, this list of conditions and the following disclaimer.
19     * 2. Redistributions in binary form must reproduce the above copyright
20     * notice, this list of conditions and the following disclaimer in the
21     * documentation and/or other materials provided with the distribution.
22     * 3. All advertising materials mentioning features or use of this software
23     * must display the following acknowledgement:
24     * This product includes software developed by the NetBSD
25     * Foundation, Inc. and its contributors.
26     * 4. Neither the name of The NetBSD Foundation nor the names of its
27     * contributors may be used to endorse or promote products derived
28     * from this software without specific prior written permission.
29     *
30     * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
31     * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
32     * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
33     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
34     * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
35     * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
36     * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
37     * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
38     * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
39     * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40     * POSSIBILITY OF SUCH DAMAGE.
41     */
42    
43     /*
44     * Memory map and register definitions for the Algorithmics P-5064.
45     */
46    
47     #define P5064_MEMORY 0x00000000UL /* onboard DRAM memory */
48     /* 256 MB */
49     #define P5064_ISAMEM 0x10000000UL /* ISA window of PCI memory */
50     /* 8MB */
51     #define P5064_PCIMEM 0x11000000UL /* PCI memory window */
52     /* 112MB */
53     #define P5064_PCIIO 0x1d000000UL /* PCI I/O window */
54     /* 16MB */
55     #define P5064_PCICFG 0x1ee00000UL /* PCI config space */
56     /* 1MB */
57     #define P5064_V360EPC 0x1ef00000UL /* V360EPC PCI controller */
58     /* 64KB */
59     #define P5064_CFGBOOT_W 0x1f800000UL /* configured bootstrap (W) */
60     /* 512KB */
61     #define P5064_SOCKET_W 0x1f900000UL /* socket EPROM (W) */
62     /* 512KB */
63     #define P5064_FLASH_W 0x1fa00000UL /* flash (W) */
64     /* 1MB */
65     #define P5064_CFBOOT 0x1fc00000UL /* configured bootstrap */
66     /* 512KB */
67     #define P5064_SOCKET 0x1fd00000UL /* socket EPROM */
68     /* 512KB */
69     #define P5064_FLASH 0x1fe00000UL /* flash */
70     /* 1MB */
71     #define P5064_LED0 0x1ff00000UL /* LED (1reg) */
72     #define P5064_LED1 0x1ff20010UL /* LED (4reg) */
73     #define P5064_LCD 0x1ff30000UL /* LCD display */
74     #define P5064_Z80GPIO 0x1ff40000UL /* Z80 GPIO (rev B only) */
75     #define P5064_Z80GPIO_IACK 0x1ff50000UL /* intr. ack. for Z80 */
76     #define P5064_DBG_UART 0x1ff60000UL /* UART on debug board */
77     #define P5064_LOCINT 0x1ff90000UL /* local interrupts */
78     #define P5064_PANIC 0x1ff90004UL /* panic interrupts */
79     #define P5064_PCIINT 0x1ff90008UL /* PCI interrupts */
80     #define P5064_ISAINT 0x1ff9000cUL /* ISA interrupts */
81     #define P5064_XBAR0 0x1ff90010UL /* Int. xbar 0 */
82     #define P5064_XBAR1 0x1ff90014UL /* Int. xbar 1 */
83     #define P5064_XBAR2 0x1ff90018UL /* Int. xbar 2 */
84     #define P5064_XBAR3 0x1ff9001cUL /* Int. xbar 3 */
85     #define P5064_XBAR4 0x1ff90020UL /* Int. xbar 4 */
86     #define P5064_KBDINT 0x1ff90024UL /* keyboard interrupts */
87     #define P5064_LOGICREV 0x1ff9003cUL /* logic revision */
88     #define P5064_CFG0 0x1ffa0000UL /* board configuration 0 */
89     #define P5064_CFG1 0x1ffb0000UL /* board configuration 1 */
90     #define P5064_DRAMCFG 0x1ffc0000UL /* DRAM configuration */
91     #define P5064_BOARDREV 0x1ffd0000UL /* board revision */
92     #define P5064_PCIMEM_HI 0x20000000UL /* PCI memory high window */
93     /* 3.5GB */
94    
95     /* P5064_LOCINT */
96     #define LOCINT_PCIBR 0x01
97     #define LOCINT_FLP 0x02
98     #define LOCINT_MKBD 0x04
99     #define LOCINT_COM1 0x08
100     #define LOCINT_COM2 0x10
101     #define LOCINT_CENT 0x20
102     #define LOCINT_RTC 0x80
103    
104     /* P5064_PANIC */
105     #define PANIC_DEBUG 0x01
106     #define PANIC_PFAIL 0x02
107     #define PANIC_BERR 0x04
108     #define PANIC_ISANMI 0x08
109     #define PANIC_IOPERR 0x10
110     #define PANIC_CENT 0x20
111     #define PANIC_EWAKE 0x40
112     #define PANIC_ECODERR 0x80
113    
114     /* P5064_PCIINT */
115     #define PCIINT_EMDINT 0x01
116     #define PCIINT_ETH 0x02
117     #define PCIINT_SCSI 0x04
118     #define PCIINT_USB 0x08
119     #define PCIINT_PCI0 0x10
120     #define PCIINT_PCI1 0x20
121     #define PCIINT_PCI2 0x40
122     #define PCIINT_PCI3 0x80
123    
124     /* P5064_ISAINT */
125     #define ISAINT_ISABR 0x01
126     #define ISAINT_IDE0 0x02
127     #define ISAINT_IDE1 0x04
128    
129     /* P5064_KBDINT */
130     #define KBDINT_KBD 0x01
131     #define KBDINT_MOUSE 0x02
132    
133     /*
134     * The Algorithmics PMON initializes two DMA windows:
135     *
136     * THE MANUAL CLAIMS THIS:
137     * PCI 0080.0000 -> Phys 0080.0000 (8MB)
138     *
139     * THE PMON FIRMWARE DOES THIS:
140     * PCI 0080.0000 -> Phys 0000.0000 (8MB)
141     *
142     * PCI 8000.0000 -> Phys 0000.0000 (256MB)
143     */
144     #define P5064_DMA_ISA_PCIBASE 0x00800000UL
145     #define P5064_DMA_ISA_PHYSBASE 0x00000000UL
146     #define P5064_DMA_ISA_SIZE (8 * 1024 * 1024)
147    
148     #define P5064_DMA_PCI_PCIBASE 0x80000000UL
149     #define P5064_DMA_PCI_PHYSBASE 0x00000000UL
150     #define P5064_DMA_PCI_SIZE (256 * 1024 * 1024)
151    
152     #endif /* P5064 */

  ViewVC Help
Powered by ViewVC 1.1.26