--- trunk/src/devices/dev_rd94.c	2007/10/08 16:19:28	21
+++ trunk/src/devices/dev_rd94.c	2007/10/08 16:19:37	22
@@ -1,5 +1,5 @@
 /*
- *  Copyright (C) 2003-2005  Anders Gavare.  All rights reserved.
+ *  Copyright (C) 2003-2006  Anders Gavare.  All rights reserved.
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions are met:
@@ -25,7 +25,7 @@
  *  SUCH DAMAGE.
  *   
  *
- *  $Id: dev_rd94.c,v 1.29 2005/11/21 09:17:27 debug Exp $
+ *  $Id: dev_rd94.c,v 1.34 2006/02/09 20:02:59 debug Exp $
  *  
  *  Used by NEC-RD94, -R94, and -R96.
  */
@@ -82,13 +82,11 @@
 /*
  *  dev_rd94_access():
  */
-int dev_rd94_access(struct cpu *cpu, struct memory *mem,
-	uint64_t relative_addr, unsigned char *data, size_t len,
-	int writeflag, void *extra)
+DEVICE_ACCESS(rd94)
 {
 	struct rd94_data *d = (struct rd94_data *) extra;
 	uint64_t idata = 0, odata = 0;
-	int regnr;
+	int regnr, bus, dev, func, pcireg;
 
 	if (writeflag == MEM_WRITE)
 		idata = memory_readmax64(cpu, data, len);
@@ -96,6 +94,7 @@
 	regnr = relative_addr / sizeof(uint32_t);
 
 	switch (relative_addr) {
+
 	case RD94_SYS_CONFIG:
 		if (writeflag == MEM_WRITE) {
 			fatal("[ rd94: write to CONFIG: 0x%llx ]\n",
@@ -106,6 +105,7 @@
 			    (long long)odata);
 		}
 		break;
+
 	case RD94_SYS_INTSTAT1:		/*  LB (Local Bus ???)  */
 		if (writeflag == MEM_WRITE) {
 		} else {
@@ -120,6 +120,7 @@
 		debug("[ rd94: intstat1 ]\n");
 /*		cpu_interrupt_ack(cpu, 3); */
 		break;
+
 	case RD94_SYS_INTSTAT2:		/*  PCI/EISA  */
 		if (writeflag == MEM_WRITE) {
 		} else {
@@ -128,6 +129,7 @@
 		debug("[ rd94: intstat2 ]\n");
 /*		cpu_interrupt_ack(cpu, 4); */
 		break;
+
 	case RD94_SYS_INTSTAT3:		/*  IT (Interval Timer)  */
 		if (writeflag == MEM_WRITE) {
 		} else {
@@ -137,6 +139,7 @@
 		cpu_interrupt_ack(cpu, 5);
 		d->interval = d->interval_start;
 		break;
+
 	case RD94_SYS_INTSTAT4:		/*  IPI  */
 		if (writeflag == MEM_WRITE) {
 		} else {
@@ -145,6 +148,7 @@
 		fatal("[ rd94: intstat4 ]\n");
 		cpu_interrupt_ack(cpu, 6);
 		break;
+
 	case RD94_SYS_CPUID:
 		if (writeflag == MEM_WRITE) {
 			fatal("[ rd94: write to CPUID: 0x%llx ]\n",
@@ -155,6 +159,7 @@
 			    (long long)odata);
 		}
 		break;
+
 	case RD94_SYS_EXT_IMASK:
 		if (writeflag == MEM_WRITE) {
 			d->intmask = idata;
@@ -162,6 +167,7 @@
 			odata = d->intmask;
 		}
 		break;
+
 	case RD94_SYS_IT_VALUE:
 		if (writeflag == MEM_WRITE) {
 			d->interval = d->interval_start = idata;
@@ -172,20 +178,18 @@
 			/*  TODO: or d->interval ?  */;
 		}
 		break;
+
 	case RD94_SYS_PCI_CONFADDR:
+		bus_pci_decompose_1(idata, &bus, &dev, &func, &pcireg);
+		bus_pci_setaddr(cpu, d->pci_data, bus, dev, func, pcireg);
+		break;
+
 	case RD94_SYS_PCI_CONFDATA:
-		if (writeflag == MEM_WRITE) {
-			bus_pci_access(cpu, mem, relative_addr ==
-			    RD94_SYS_PCI_CONFADDR? BUS_PCI_ADDR : BUS_PCI_DATA,
-			    &idata, len, writeflag, d->pci_data);
-		} else {
-			bus_pci_access(cpu, mem, relative_addr ==
-			    RD94_SYS_PCI_CONFADDR? BUS_PCI_ADDR : BUS_PCI_DATA,
-			    &odata, len, writeflag, d->pci_data);
-		}
+		bus_pci_data_access(cpu, d->pci_data, writeflag == MEM_READ?
+		    &odata : &idata, len, writeflag);
 		break;
-	default:
-		if (writeflag == MEM_WRITE) {
+
+	default:if (writeflag == MEM_WRITE) {
 			fatal("[ rd94: unimplemented write to address 0x%x, "
 			    "data=0x%02x ]\n", (int)relative_addr, (int)idata);
 		} else {
@@ -201,10 +205,7 @@
 }
 
 
-/*
- *  devinit_rd94():
- */
-int devinit_rd94(struct devinit *devinit)
+DEVINIT(rd94)
 {
 	struct rd94_data *d = malloc(sizeof(struct rd94_data));
 	if (d == NULL) {
@@ -213,7 +214,8 @@
 	}
 	memset(d, 0, sizeof(struct rd94_data));
 	d->pciirq   = devinit->irq_nr;
-	d->pci_data = bus_pci_init(d->pciirq, 0,0, 0,0,0, 0,0,0);
+	d->pci_data = bus_pci_init(devinit->machine, d->pciirq,
+	    0,0, 0,0,0, 0,0,0);
 
 	memory_device_register(devinit->machine->memory, devinit->name,
 	    devinit->addr, DEV_RD94_LENGTH,