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1 <html><head><title>Gavare's eXperimental Emulator:&nbsp;&nbsp;&nbsp;Experimenting with GXemul</title>
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7 <b>Gavare's eXperimental Emulator:</b></font><br>
8 <font color="#000000" size="6"><b>Experimenting with GXemul</b>
9 </font></td></tr></table></td></tr></table><p>
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41
42 <a href="./">Back to the index</a>
43
44 <p><br>
45 <h2>Experimenting with GXemul</h2>
46
47 <p>
48 <ul>
49 <li><a href="#hello">Hello world</a>
50 <li><a href="#expdevices">Experimental devices</a>
51 </ul>
52
53
54
55
56
57
58 <p><br>
59 <a name="hello"></a>
60 <h3>Hello world:</h3>
61
62 You might want to use the emulator to develop programs on your own,
63 not just run precompiled kernels such as NetBSD. To get started, I recommend
64 that you do two things:
65
66 <p>
67 <ul>
68 <li>Build and install a cross-compiler for your chosen target.
69 GCC is usually a good compiler choice, because it is portable
70 and in wide-spread use. (Other compilers should work too.)
71
72 <p>
73 <li>Compile the Hello World demo program for your chosen target, and run
74 it in the emulator.
75 </ul>
76
77 <p>The Hello World demo program is included in the GXemul source
78 code distribution, in the <a href="../demos/hello/"><tt>demos/hello/</tt></a>
79 subdirectory. The README files in the demo directories have several
80 examples of how the demo programs can be built.
81
82 <p>Hopefully this is enough to get you inspired. :-)
83
84
85
86
87
88
89 <p><br>
90 <a name="expdevices"></a>
91 <h3>Experimental devices:</h3>
92
93 The emulator has several modes where it doesn't emulate any real machine.
94 It can either run in "bare" mode, where no devices are included by default
95 (just the CPU), or in a "test" mode where some simple devices are
96 emulated.
97
98 <p>The test machines (<tt>testmips</tt>, <tt>testppc</tt>, etc) have the
99 following experimental devices:
100
101 <p>
102 <center><table border="0" width="80%">
103
104 <tr>
105 <td align="left" valign="top" width="200">
106 <a name="expdevices_cons"><b><tt>cons</tt>:</b></a>
107 <p>A simple console device, for writing
108 characters to the controlling terminal
109 and receiving keypresses.
110 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_cons.c</tt></font>
111 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_cons.h</tt></font>
112 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x10000000</font>
113 </td>
114 <td align="left" valign="top" width="25">&nbsp;</td>
115 <td align="left" valign="top">
116 <table border="0">
117 <tr>
118 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
119 <td align="left" valign="top"><i><u>Effect:</u></i></td>
120 </tr>
121 <tr>
122 <td align="left" valign="top"><tt>0x00</tt></td>
123 <td align="left" valign="top">
124 Read: <b><tt>getchar()</tt></b> (non-blocking; returns
125 <tt>0</tt> if no char was available)<br>
126 Write: <b><tt>putchar(ch)</tt></b></td>
127 </tr>
128 <tr>
129 <td align="left" valign="top"><tt>0x10</tt></td>
130 <td align="left" valign="top">Read or write: <b><tt>halt()</tt></b><br>
131 (Useful for exiting the emulator.)</td>
132 </tr>
133 </table>
134 </td>
135 </tr>
136
137 <tr height="15">
138 <td height="15">&nbsp;</td>
139 </tr>
140
141 <tr>
142 <td align="left" valign="top">
143 <a name="expdevices_mp"><b><tt>mp</tt>:</b></a>
144 <p>This device controls the behaviour of CPUs in an emulated
145 multi-processor system.
146 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_mp.c</tt></font>
147 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_mp.h</tt></font>
148 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x11000000</font>
149 </td>
150 <td></td>
151 <td align="left" valign="top">
152 <table border="0">
153 <tr>
154 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
155 <td align="left" valign="top"><i><u>Effect:</u></i></td>
156 </tr>
157 <tr>
158 <td align="left" valign="top"><tt>0x0000</tt></td>
159 <td align="left" valign="top">Read: <b><tt>whoami()</tt></b>.
160 Returns the id of the CPU doing the read.</td>
161 </tr>
162 <tr>
163 <td align="left" valign="top"><tt>0x0010</tt></td>
164 <td align="left" valign="top">Read: <b><tt>ncpus()</tt></b>.
165 Returns the number of CPUs in the system.</td>
166 </tr>
167 <tr>
168 <td align="left" valign="top"><tt>0x0020</tt></td>
169 <td align="left" valign="top">Write: <b><tt>startupcpu(i)</tt></b>.
170 Starts CPU i. It begins execution at the address
171 set by a write to startupaddr (see below).</td>
172 </tr>
173 <tr>
174 <td align="left" valign="top"><tt>0x0030</tt></td>
175 <td align="left" valign="top">Write: <b><tt>startupaddr(addr)</tt></b>.
176 Sets the starting address for CPUs.</td>
177 </tr>
178 <tr>
179 <td align="left" valign="top"><tt>0x0040</tt></td>
180 <td align="left" valign="top">Write: <b><tt>pause_addr(addr)</tt></b>.
181 Sets the pause address. (NOTE: This is not
182 used anymore.)</td>
183 </tr>
184 <tr>
185 <td align="left" valign="top"><tt>0x0050</tt></td>
186 <td align="left" valign="top">Write: <b><tt>pause_cpu(i)</tt></b>.
187 Pauses all CPUs <i>except</i> CPU i.</td>
188 </tr>
189 <tr>
190 <td align="left" valign="top"><tt>0x0060</tt></td>
191 <td align="left" valign="top">Write: <b><tt>unpause_cpu(i)</tt></b>.
192 Unpauses CPU i.</td>
193 </tr>
194 <tr>
195 <td align="left" valign="top"><tt>0x0070</tt></td>
196 <td align="left" valign="top">Write: <b><tt>startupstack(addr)</tt></b>.
197 Sets the startup stack address. (CPUs started with
198 startupcpu() above will have their stack pointer
199 set to this value.)</td>
200 </tr>
201 <tr>
202 <td align="left" valign="top"><tt>0x0080</tt></td>
203 <td align="left" valign="top">Read: <b><tt>hardware_random()</tt></b>.
204 This produces a "random" number.</td>
205 </tr>
206 <tr>
207 <td align="left" valign="top"><tt>0x0090</tt></td>
208 <td align="left" valign="top">Read: <b><tt>memory()</tt></b>.
209 Returns the number of bytes of RAM in the system.</td>
210 </tr>
211 <tr>
212 <td align="left" valign="top"><tt>0x00a0</tt></td>
213 <td align="left" valign="top">Write: <b><tt>ipi_one((nr &lt;&lt; 16) + cpuid)</tt></b>.
214 Sends IPI <tt>nr</tt> to a specific CPU.</td>
215 </tr>
216 <tr>
217 <td align="left" valign="top"><tt>0x00b0</tt></td>
218 <td align="left" valign="top">Write: <b><tt>ipi_many((nr &lt;&lt; 16) + cpuid)</tt></b>.
219 Sends IPI <tt>nr</tt> to all CPUs <i>except</i>
220 the specified one.</td>
221 </tr>
222 <tr>
223 <td align="left" valign="top"><tt>0x00c0</tt></td>
224 <td align="left" valign="top">Read: <b><tt>ipi_read()</tt></b>.
225 Returns the next pending IPI. 0 is returned if there is no
226 pending IPI (so 0 shouldn't be used for valid IPIs).
227 Hardware int 6 is deasserted when the IPI queue is empty.
228 <br>Write: <b><tt>ipi_flush()</tt></b>.
229 Clears the IPI queue, discarding any pending IPIs.</td>
230 </tr>
231 <tr>
232 <td align="left" valign="top"><tt>0x00d0</tt></td>
233 <td align="left" valign="top">Read: <b><tt>ncycles()</tt></b>.
234 Returns approximately the number of cycles executed.
235 Note: this value is not updated for every instruction,
236 so it cannot be used for small measurements.</td>
237 </tr>
238 </table>
239 </td>
240 </tr>
241
242 <tr height="15">
243 <td height="15">&nbsp;</td>
244 </tr>
245
246 <tr>
247 <td align="left" valign="top">
248 <a name="expdevices_fb"><b><tt>fb</tt>:</b></a>
249 <p>A simple linear framebuffer, for graphics output.
250 640 x 480 pixels, 3 bytes per pixel (red, green, blue, 8 bits each).
251 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_fb.c</tt></font>
252 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_fb.h</tt></font>
253 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x12000000</font>
254 </td>
255 <td></td>
256 <td align="left" valign="top">
257 <table border="0">
258 <tr>
259 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
260 <td align="left" valign="top"><i><u>Effect:</u></i></td>
261 </tr>
262 <tr>
263 <td align="left" valign="top"><tt>0x00000-</tt><br><tt>0xe0fff</tt></td>
264 <td align="left" valign="top">Read: read pixel values.
265 <br>Write: write pixel values.</td>
266 </tr>
267 </table>
268 </td>
269 </tr>
270
271 <tr height="15">
272 <td height="15">&nbsp;</td>
273 </tr>
274
275 <tr>
276 <td align="left" valign="top">
277 <a name="expdevices_disk"><b><tt>disk</tt>:</b></a>
278 <p>Disk controller, which can read from and write
279 to emulated IDE disks. It does not use interrupts; read and
280 write operations finish instantaneously.
281 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_disk.c</tt></font>
282 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_disk.h</tt></font>
283 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x13000000</font>
284 </td>
285 <td></td>
286 <td align="left" valign="top">
287 <table border="0">
288 <tr>
289 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
290 <td align="left" valign="top"><i><u>Effect:</u></i></td>
291 </tr>
292 <tr>
293 <td align="left" valign="top"><tt>0x0000</tt></td>
294 <td align="left" valign="top">Write: Set the offset (in bytes) from the beginning
295 of the disk image. This offset will be used for the next read/write operation.</td>
296 </tr>
297 <tr>
298 <td align="left" valign="top"><tt>0x0010</tt></td>
299 <td align="left" valign="top">Write: Select the IDE ID to be used in the next
300 read/write operation.</td>
301 </tr>
302 <tr>
303 <td align="left" valign="top"><tt>0x0020</tt></td>
304 <td align="left" valign="top">Write: Start a read or write operation.
305 (Writing <tt>0</tt> means a Read operation, a <tt>1</tt> means a
306 Write operation.)</td>
307 </tr>
308 <tr>
309 <td align="left" valign="top"><tt>0x0030</tt></td>
310 <td align="left" valign="top">Read: Get status of the last operation.
311 (Status 0 means failure, non-zero means success.)</td>
312 </tr>
313 <tr>
314 <td align="left" valign="top"><tt>0x4000-</tt><br><tt>0x41ff</tt>&nbsp;&nbsp;&nbsp;</td>
315 <td align="left" valign="top">Read/Write: 512 bytes data buffer.</td>
316 </tr>
317 </table>
318 </td>
319 </tr>
320
321 <tr height="15">
322 <td height="15">&nbsp;</td>
323 </tr>
324
325 <tr>
326 <td align="left" valign="top">
327 <a name="expdevices_ether"><b><tt>ether</tt>:</b></a>
328 <p>A simple ethernet controller, enough to send
329 and receive packets on a simulated network.
330 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_ether.c</tt></font>
331 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_ether.h</tt></font>
332 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x14000000</font>
333 </td>
334 <td></td>
335 <td align="left" valign="top">
336 <table border="0">
337 <tr>
338 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
339 <td align="left" valign="top"><i><u>Effect:</u></i></td>
340 </tr>
341 <tr>
342 <td align="left" valign="top"><tt>0x0000-</tt><br><tt>0x3fff</tt></td>
343 <td align="left" valign="top">Read/write buffer for the packet to be sent/received.</td>
344 </tr>
345 <tr>
346 <td align="left" valign="top"><tt>0x4000</tt></td>
347 <td align="left" valign="top">Read: status word, one or more of these:
348 <br><tt>0x01</tt>&nbsp;=&nbsp;something was received (because of
349 the last command)
350 <br><tt>0x02</tt>&nbsp;=&nbsp;more packets are available
351 <br><i>NOTE:</i> Whenever the status word is non-zero,
352 an interrupt is asserted. Reading the status word
353 clears it, and deasserts the interrupt.</td>
354 </tr>
355 <tr>
356 <td align="left" valign="top"><tt>0x4010</tt></td>
357 <td align="left" valign="top">Read: get the Length of the received packet
358 <br>Write: set the Length of the next packet to transmit</td>
359 </tr>
360 <tr>
361 <td align="left" valign="top"><tt>0x4020</tt></td>
362 <td align="left" valign="top">Write: command:
363 <br><tt>0x00:</tt>&nbsp;receive a packet
364 <br><tt>0x01:</tt>&nbsp;send a packet</td>
365 </tr>
366 </table>
367 </td>
368 </tr>
369
370 <tr height="15">
371 <td height="15">&nbsp;</td>
372 </tr>
373
374 <tr>
375 <td align="left" valign="top">
376 <a name="expdevices_rtc"><b><tt>rtc</tt>:</b></a>
377 <p>A Real-Time Clock, used to retrieve the current time
378 and to cause periodic interrupts.
379 <p>Source code:&nbsp;&nbsp;<font color="#0000f0"><tt>src/devices/dev_rtc.c</tt></font>
380 <p>Include file:&nbsp;&nbsp;<font color="#0000f0"><tt>dev_rtc.h</tt></font>
381 <br>Default physical address:&nbsp&nbsp;<font color="#0000f0">0x15000000</font>
382 </td>
383 <td></td>
384 <td align="left" valign="top">
385 <table border="0">
386 <tr>
387 <td align="left" valign="top"><i><u>Offset:</u></i>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;</td>
388 <td align="left" valign="top"><i><u>Effect:</u></i></td>
389 </tr>
390 <tr>
391 <td align="left" valign="top"><tt>0x0000</tt></td>
392 <td align="left" valign="top">Read or Write: Trigger a clock update (a gettimeofday() on the host).</td>
393 </tr>
394 <tr>
395 <td align="left" valign="top"><tt>0x0010</tt></td>
396 <td align="left" valign="top">Read: Seconds since 1st January 1970</td>
397 </tr>
398 <tr>
399 <td align="left" valign="top"><tt>0x0020</tt></td>
400 <td align="left" valign="top">Read: Microseconds</td>
401 </tr>
402 <tr>
403 <td align="left" valign="top"><tt>0x0100</tt></td>
404 <td align="left" valign="top">Read: Get the current
405 timer interrupt frequency.<br>Write: Set the timer
406 interrupt frequency. (Writing 0 disables the timer.)</td>
407 </tr>
408 <tr>
409 <td align="left" valign="top"><tt>0x0110</tt></td>
410 <td align="left" valign="top">Read or Write: Acknowledge
411 one timer interrupt. (Note that if multiple interrupts
412 are pending, only one is acknowledged.)</td>
413 </tr>
414 </table>
415 </td>
416 </tr>
417
418 </table></center>
419
420 <p>
421 While these devices may resemble real-world hardware, they are
422 intentionally made simpler to use. (An exception is the framebuffer;
423 some machines actually have simple linear framebuffers like this.)
424
425 <p>If the physical address is <tt>0x10000000</tt>, then for MIPS that
426 means that it can be accessed at virtual address
427 <tt>0xffffffffb0000000</tt>. (Actually it can be accessed at
428 <tt>0xffffffff90000000</tt> too, but devices should usually be accessed in
429 a non-cached manner.)
430
431 <p>When using the Alpha, ARM, or PPC test machines, the addresses are
432 <tt>0x10000000</tt>, <tt>0x11000000</tt> etc., so no need to add any
433 virtual displacement.
434
435 <p>The <tt>mp</tt>, <tt>disk</tt>, and <tt>ether</tt> devices are agnostic
436 when it comes to word-length. For example, when reading offset
437 <tt>0x0000</tt> of the <tt>mp</tt> device, you may use any kind of read
438 (an 8-bit read will work just as well as a 64-bit read, although the value
439 will be truncated to 8 bits in the first case). You can <i>not</i>,
440 however, read one byte from <tt>0x0000</tt> and one from <tt>0x0001</tt>,
441 and combine the result. The read from <tt>0x0001</tt> will be invalid.
442
443 <p>The <tt>cons</tt> device should be accessed using 8-bit reads
444 and writes. Doing a getchar() (ie reading from offset <tt>0x00</tt>)
445 returns <tt>0</tt> if no character was available. Whenever a character is
446 available, the <tt>cons</tt> device' interrupt is asserted. When there are
447 no more available characters, the interrupt is deasserted. (Remember that
448 the interrupt has to be unmasked to be able to actually cause an
449 interrupt.)
450
451 <p>IPIs (inter-processor interrupts) are controlled by the <tt>mp</tt>
452 device. Whenever an IPI is "sent" from a source to one or more target
453 CPUs, the interrupt is asserted on the target CPUs, and the IPI number is
454 added last in the IPI queue for each of the target CPUs. It is then up to
455 those CPUs to individually read from offset <tt>0x00c0</tt>, to figure out
456 what kind of IPI it was.
457
458
459
460 <p>Interrupt mappings are as follows:
461
462 <p><center>
463 <table border="1">
464 <tr><td align="center">
465 <b><tt>testmips</tt></b>
466 </td></tr>
467 <tr><td>
468 <table border="0">
469 <tr><td align="center">IRQ:</td><td>&nbsp;</td>
470 <td>Used for:</td></tr>
471 <tr><td align="center">7</td><td></td>
472 <td>MIPS count/compare interrupt</td></tr>
473 <tr><td align="center">6</td><td></td>
474 <td><tt>mp</tt> (inter-processor interrupts)</td></tr>
475 <tr><td align="center">4</td><td></td>
476 <td><tt>rtc</tt></td></tr>
477 <tr><td align="center">3</td><td></td>
478 <td><tt>ether</tt></td></tr>
479 <tr><td align="center">2</td><td></td>
480 <td><tt>cons</tt></td></tr>
481 </table>
482 </td></tr>
483 </table>
484 </center>
485
486 <p>Other machines: TODO
487
488
489 <p><br>
490
491
492
493 </p>
494
495 </body>
496 </html>

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