src/include/cpu_transputer.h

#ifndef CPU_TRANSPUTER_H
#define CPU_TRANSPUTER_H

/*
 *  Copyright (C) 2006  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *
 *
 *  $Id: cpu_transputer.h,v 1.1 2006/07/20 21:53:00 debug Exp $
 */

#include "misc.h"


struct cpu_family;


/*  TRANSPUTER CPU types:  */
struct transputer_cpu_type_def { 
        char            *name;
        int             bits;                   /*  16 or 32  */
        int             onchip_ram;             /*  2048 or 4096 bytes  */
        int             features;
};

/*
 *  Features of various transputer processors according to
 *  http://www.enlight.ru/docs/cpu/t-puters/talp/app_g.txt:
 */

#define T_T4_FP         1               /*  T4 floating point  */
#define T_T8_FP         2               /*  T8 floating point  */
#define T_2D_BLOCK      4               /*  2D Block Move instruction  */
#define T_FMUL          8               /*  FMUL instruction  */
#define T_DUP           16              /*  DUP instruction  */
#define T_WSUBDB        32              /*  WSUBDB instruction  */
#define T_CRC           64              /*  CRC instruction  */
#define T_BITCOUNT      128             /*  BITCOUNT instruction  */
#define T_FPTESTERR     256             /*  FPTESTERR instruction  */
#define T_DEBUG         512             /*  Debug capabilities  */

#define TRANSPUTER_CPU_TYPE_DEFS        {                               \
        { "T212", 16, 2048, 0 },                                        \
        { "T222", 16, 4096, 0 },                                        \
        { "T225", 16, 4096, T_DUP | T_WSUBDB | T_CRC | T_BITCOUNT |     \
                            T_DEBUG },                                  \
        { "T414", 32, 2048, T_FMUL | T_T4_FP },                         \
        { "T425", 32, 4096, T_T4_FP | T_2D_BLOCK | T_FMUL | T_WSUBDB |  \
                            T_DUP | T_CRC | T_BITCOUNT | T_FPTESTERR |  \
                            T_DEBUG },                                  \
        { "T800", 32, 4096, T_T8_FP | T_2D_BLOCK | T_FMUL | T_WSUBDB |  \
                            T_DUP | T_CRC | T_BITCOUNT | T_FPTESTERR }, \
        { "T801", 32, 4096, T_T8_FP | T_2D_BLOCK | T_FMUL | T_WSUBDB |  \
                            T_DUP | T_CRC | T_BITCOUNT | T_FPTESTERR }, \
        { "T805", 32, 4096, T_T8_FP | T_2D_BLOCK | T_FMUL | T_WSUBDB |  \
                            T_DUP | T_CRC | T_BITCOUNT | T_FPTESTERR |  \
                            T_DEBUG },                                  \
        { NULL,   0,     0, 0 } }

#define TRANSPUTER_INSTRUCTIONS         {                               \
        /*  0X  */   "j",       /*  jump                        */      \
        /*  1X  */   "ldlp",    /*  load local pointer          */      \
        /*  2X  */   "pfix",    /*  prefix                      */      \
        /*  3X  */   "ldnl",    /*  load non-local              */      \
        /*  4X  */   "ldc",     /*  load constant               */      \
        /*  5X  */   "ldnlp",   /*  load non-local pointer      */      \
        /*  6X  */   "nfix",    /*  negative prefix             */      \
        /*  7X  */   "ldl",     /*  load local                  */      \
        /*  8X  */   "adc",     /*  add constant                */      \
        /*  9X  */   "call",    /*  call subroutine             */      \
        /*  AX  */   "cj",      /*  conditional jump            */      \
        /*  BX  */   "ajw",     /*  adjust workspace            */      \
        /*  CX  */   "eqc",     /*  equals constant             */      \
        /*  DX  */   "stl",     /*  store local                 */      \
        /*  EX  */   "stnl",    /*  store non-local             */      \
        /*  FX  */   "opr"      /*  operate                     */      }


#define TRANSPUTER_N_IC_ARGS                    1
#define TRANSPUTER_INSTR_ALIGNMENT_SHIFT        0
#define TRANSPUTER_IC_ENTRIES_SHIFT             12
#define TRANSPUTER_IC_ENTRIES_PER_PAGE  (1 << TRANSPUTER_IC_ENTRIES_SHIFT)
#define TRANSPUTER_PC_TO_IC_ENTRY(a)            (((a)>>TRANSPUTER_INSTR_ALIGNMENT_SHIFT) \
                                        & (TRANSPUTER_IC_ENTRIES_PER_PAGE-1))
#define TRANSPUTER_ADDR_TO_PAGENR(a)            ((a) >> (TRANSPUTER_IC_ENTRIES_SHIFT \
                                        + TRANSPUTER_INSTR_ALIGNMENT_SHIFT))

DYNTRANS_MISC_DECLARATIONS(transputer,TRANSPUTER,uint32_t)

#define TRANSPUTER_MAX_VPH_TLB_ENTRIES          128


struct transputer_cpu {
        struct transputer_cpu_type_def cpu_type;

        uint32_t        a, b, c;        /*  GPRs  */
        uint32_t        wptr;           /*  Workspace/stack pointer  */
        uint32_t        oreg;           /*  Operand register  */

        uint64_t        fa, fb, fc;     /*  Floating point registers  */

        int             error;
        int             halt_on_error;
        int             fp_error;

        /*
         *  Instruction translation cache and 32-bit virtual -> physical ->
         *  host address translation:
         */
        DYNTRANS_ITC(transputer)
        VPH_TLBS(transputer,TRANSPUTER)
        VPH32(transputer,TRANSPUTER,uint32_t,uint8_t)
};


/*  cpu_transputer.c:  */
int transputer_run_instr(struct cpu *cpu);
void transputer_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,
        unsigned char *host_page, int writeflag, uint64_t paddr_page);
void transputer_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);
void transputer_invalidate_code_translation(struct cpu *cpu, uint64_t, int);
int transputer_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,
        unsigned char *data, size_t len, int writeflag, int cache_flags);
int transputer_cpu_family_init(struct cpu_family *);


#endif  /*  CPU_TRANSPUTER_H  */
1	#ifndef CPU_TRANSPUTER_H
2	#define CPU_TRANSPUTER_H
3
4	/*
5	* Copyright (C) 2006 Anders Gavare. All rights reserved.
6	*
7	* Redistribution and use in source and binary forms, with or without
8	* modification, are permitted provided that the following conditions are met:
9	*
10	* 1. Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.
12	* 2. Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.
15	* 3. The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.
17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28	* SUCH DAMAGE.
29	*
30	*
31	* $Id: cpu_transputer.h,v 1.1 2006/07/20 21:53:00 debug Exp $
32	*/
33
34	#include "misc.h"
35
36
37	struct cpu_family;
38
39
40	/* TRANSPUTER CPU types: */
41	struct transputer_cpu_type_def {
42	char *name;
43	int bits; /* 16 or 32 */
44	int onchip_ram; /* 2048 or 4096 bytes */
45	int features;
46	};
47
48	/*
49	* Features of various transputer processors according to
50	* http://www.enlight.ru/docs/cpu/t-puters/talp/app_g.txt:
51	*/
52
53	#define T_T4_FP 1 /* T4 floating point */
54	#define T_T8_FP 2 /* T8 floating point */
55	#define T_2D_BLOCK 4 /* 2D Block Move instruction */
56	#define T_FMUL 8 /* FMUL instruction */
57	#define T_DUP 16 /* DUP instruction */
58	#define T_WSUBDB 32 /* WSUBDB instruction */
59	#define T_CRC 64 /* CRC instruction */
60	#define T_BITCOUNT 128 /* BITCOUNT instruction */
61	#define T_FPTESTERR 256 /* FPTESTERR instruction */
62	#define T_DEBUG 512 /* Debug capabilities */
63
64	#define TRANSPUTER_CPU_TYPE_DEFS { \
65	{ "T212", 16, 2048, 0 }, \
66	{ "T222", 16, 4096, 0 }, \
67	{ "T225", 16, 4096, T_DUP \| T_WSUBDB \| T_CRC \| T_BITCOUNT \| \
68	T_DEBUG }, \
69	{ "T414", 32, 2048, T_FMUL \| T_T4_FP }, \
70	{ "T425", 32, 4096, T_T4_FP \| T_2D_BLOCK \| T_FMUL \| T_WSUBDB \| \
71	T_DUP \| T_CRC \| T_BITCOUNT \| T_FPTESTERR \| \
72	T_DEBUG }, \
73	{ "T800", 32, 4096, T_T8_FP \| T_2D_BLOCK \| T_FMUL \| T_WSUBDB \| \
74	T_DUP \| T_CRC \| T_BITCOUNT \| T_FPTESTERR }, \
75	{ "T801", 32, 4096, T_T8_FP \| T_2D_BLOCK \| T_FMUL \| T_WSUBDB \| \
76	T_DUP \| T_CRC \| T_BITCOUNT \| T_FPTESTERR }, \
77	{ "T805", 32, 4096, T_T8_FP \| T_2D_BLOCK \| T_FMUL \| T_WSUBDB \| \
78	T_DUP \| T_CRC \| T_BITCOUNT \| T_FPTESTERR \| \
79	T_DEBUG }, \
80	{ NULL, 0, 0, 0 } }
81
82	#define TRANSPUTER_INSTRUCTIONS { \
83	/* 0X / "j", / jump */ \
84	/* 1X / "ldlp", / load local pointer */ \
85	/* 2X / "pfix", / prefix */ \
86	/* 3X / "ldnl", / load non-local */ \
87	/* 4X / "ldc", / load constant */ \
88	/* 5X / "ldnlp", / load non-local pointer */ \
89	/* 6X / "nfix", / negative prefix */ \
90	/* 7X / "ldl", / load local */ \
91	/* 8X / "adc", / add constant */ \
92	/* 9X / "call", / call subroutine */ \
93	/* AX / "cj", / conditional jump */ \
94	/* BX / "ajw", / adjust workspace */ \
95	/* CX / "eqc", / equals constant */ \
96	/* DX / "stl", / store local */ \
97	/* EX / "stnl", / store non-local */ \
98	/* FX / "opr" / operate */ }
99
100
101	#define TRANSPUTER_N_IC_ARGS 1
102	#define TRANSPUTER_INSTR_ALIGNMENT_SHIFT 0
103	#define TRANSPUTER_IC_ENTRIES_SHIFT 12
104	#define TRANSPUTER_IC_ENTRIES_PER_PAGE (1 << TRANSPUTER_IC_ENTRIES_SHIFT)
105	#define TRANSPUTER_PC_TO_IC_ENTRY(a) (((a)>>TRANSPUTER_INSTR_ALIGNMENT_SHIFT) \
106	& (TRANSPUTER_IC_ENTRIES_PER_PAGE-1))
107	#define TRANSPUTER_ADDR_TO_PAGENR(a) ((a) >> (TRANSPUTER_IC_ENTRIES_SHIFT \
108	+ TRANSPUTER_INSTR_ALIGNMENT_SHIFT))
109
110	DYNTRANS_MISC_DECLARATIONS(transputer,TRANSPUTER,uint32_t)
111
112	#define TRANSPUTER_MAX_VPH_TLB_ENTRIES 128
113
114
115	struct transputer_cpu {
116	struct transputer_cpu_type_def cpu_type;
117
118	uint32_t a, b, c; /* GPRs */
119	uint32_t wptr; /* Workspace/stack pointer */
120	uint32_t oreg; /* Operand register */
121
122	uint64_t fa, fb, fc; /* Floating point registers */
123
124	int error;
125	int halt_on_error;
126	int fp_error;
127
128	/*
129	* Instruction translation cache and 32-bit virtual -> physical ->
130	* host address translation:
131	*/
132	DYNTRANS_ITC(transputer)
133	VPH_TLBS(transputer,TRANSPUTER)
134	VPH32(transputer,TRANSPUTER,uint32_t,uint8_t)
135	};
136
137
138	/* cpu_transputer.c: */
139	int transputer_run_instr(struct cpu *cpu);
140	void transputer_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,
141	unsigned char *host_page, int writeflag, uint64_t paddr_page);
142	void transputer_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);
143	void transputer_invalidate_code_translation(struct cpu *cpu, uint64_t, int);
144	int transputer_memory_rw(struct cpu cpu, struct memory mem, uint64_t vaddr,
145	unsigned char *data, size_t len, int writeflag, int cache_flags);
146	int transputer_cpu_family_init(struct cpu_family *);
147
148
149	#endif /* CPU_TRANSPUTER_H */