/[gxemul]/upstream/0.4.1/src/cpus/cpu_m68k_instr.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Contents of /upstream/0.4.1/src/cpus/cpu_m68k_instr.c

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Revision 29 - (show annotations)
Mon Oct 8 16:20:32 2007 UTC (16 years, 8 months ago) by dpavlin
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0.4.1
1 /*
2 * Copyright (C) 2005-2006 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: cpu_m68k_instr.c,v 1.7 2006/02/24 01:20:35 debug Exp $
29 *
30 * Motorola 68K instructions.
31 *
32 * Individual functions should keep track of cpu->n_translated_instrs.
33 * (n_translated_instrs is automatically increased by 1 for each function
34 * call. If no instruction was executed, then it should be decreased. If, say,
35 * 4 instructions were combined into one function and executed, then it should
36 * be increased by 3.)
37 */
38
39
40 /*
41 * nop: Do nothing.
42 */
43 X(nop)
44 {
45 }
46
47
48 /*****************************************************************************/
49
50
51 X(end_of_page)
52 {
53 /* Update the PC: (offset 0, but on the next page) */
54 cpu->pc &= ~((M68K_IC_ENTRIES_PER_PAGE-1) << 1);
55 cpu->pc += (M68K_IC_ENTRIES_PER_PAGE << 1);
56
57 /* Find the new physical page and update the translation pointers: */
58 m68k_pc_to_pointers(cpu);
59
60 /* end_of_page doesn't count as an executed instruction: */
61 cpu->n_translated_instrs --;
62 }
63
64
65 /*****************************************************************************/
66
67
68 /*
69 * m68k_instr_to_be_translated():
70 *
71 * Translate an instruction word into an m68k_instr_call. ic is filled in with
72 * valid data for the translated instruction, or a "nothing" instruction if
73 * there was a translation failure. The newly translated instruction is then
74 * executed.
75 */
76 X(to_be_translated)
77 {
78 uint32_t addr, low_pc;
79 uint16_t iword;
80 unsigned char *page;
81 unsigned char ib[2];
82 int main_opcode;
83 /* void (*samepage_function)(struct cpu *, struct m68k_instr_call *);*/
84
85 /* Figure out the (virtual) address of the instruction: */
86 low_pc = ((size_t)ic - (size_t)cpu->cd.m68k.cur_ic_page)
87 / sizeof(struct m68k_instr_call);
88 addr = cpu->pc & ~((M68K_IC_ENTRIES_PER_PAGE-1) <<
89 M68K_INSTR_ALIGNMENT_SHIFT);
90 addr += (low_pc << M68K_INSTR_ALIGNMENT_SHIFT);
91 cpu->pc = addr;
92 addr &= ~((1 << M68K_INSTR_ALIGNMENT_SHIFT) - 1);
93
94 /* Read the instruction word from memory: */
95 page = cpu->cd.m68k.host_load[addr >> 12];
96
97 if (page != NULL) {
98 /* fatal("TRANSLATION HIT!\n"); */
99 memcpy(ib, page + (addr & 0xfff), sizeof(ib));
100 } else {
101 /* fatal("TRANSLATION MISS!\n"); */
102 if (!cpu->memory_rw(cpu, cpu->mem, addr, ib,
103 sizeof(ib), MEM_READ, CACHE_INSTRUCTION)) {
104 fatal("to_be_translated(): "
105 "read failed: TODO\n");
106 goto bad;
107 }
108 }
109
110 iword = *((uint16_t *)&ib[0]);
111
112 #ifdef HOST_LITTLE_ENDIAN
113 iword = ((iword & 0xff) << 8) |
114 ((iword & 0xff00) >> 8);
115 #endif
116
117
118 fatal("M68K: iword = 0x%04x\n", iword);
119
120
121 #define DYNTRANS_TO_BE_TRANSLATED_HEAD
122 #include "cpu_dyntrans.c"
123 #undef DYNTRANS_TO_BE_TRANSLATED_HEAD
124
125
126 /*
127 * Translate the instruction:
128 */
129
130
131 /* TODO */
132
133
134 main_opcode = iword;
135
136 #if 0
137 switch (main_opcode) {
138
139 default:goto bad;
140 }
141 #endif
142
143
144 #define DYNTRANS_TO_BE_TRANSLATED_TAIL
145 #include "cpu_dyntrans.c"
146 #undef DYNTRANS_TO_BE_TRANSLATED_TAIL
147 }
148

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