25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: machine.c,v 1.406 2005/04/06 23:13:37 debug Exp $ |
* $Id: machine.c,v 1.470 2005/06/26 11:36:28 debug Exp $ |
29 |
* |
* |
30 |
* Emulation of specific machines. |
* Emulation of specific machines. |
31 |
* |
* |
67 |
|
|
68 |
/* For SGI and ARC emulation: */ |
/* For SGI and ARC emulation: */ |
69 |
#include "sgi_arcbios.h" |
#include "sgi_arcbios.h" |
|
#include "arcbios_other.h" |
|
70 |
#include "crimereg.h" |
#include "crimereg.h" |
71 |
|
|
72 |
/* For DECstation emulation: */ |
/* For DECstation emulation: */ |
83 |
#include "hpc_bootinfo.h" |
#include "hpc_bootinfo.h" |
84 |
#include "vripreg.h" |
#include "vripreg.h" |
85 |
|
|
86 |
|
#define BOOTSTR_BUFLEN 1000 |
87 |
|
#define BOOTARG_BUFLEN 2000 |
88 |
|
#define ETHERNET_STRING_MAXLEN 40 |
89 |
|
|
90 |
struct machine_entry_subtype { |
struct machine_entry_subtype { |
91 |
int machine_subtype;/* Old-style subtype */ |
int machine_subtype;/* Old-style subtype */ |
109 |
struct machine_entry_subtype **subtype; |
struct machine_entry_subtype **subtype; |
110 |
}; |
}; |
111 |
|
|
112 |
|
|
113 |
|
/* See main.c: */ |
114 |
|
extern int quiet_mode; |
115 |
|
|
116 |
|
|
117 |
/* This is initialized by machine_init(): */ |
/* This is initialized by machine_init(): */ |
118 |
static struct machine_entry *first_machine_entry = NULL; |
static struct machine_entry *first_machine_entry = NULL; |
119 |
|
|
140 |
m->name = strdup(name); |
m->name = strdup(name); |
141 |
|
|
142 |
/* Sane default values: */ |
/* Sane default values: */ |
143 |
m->serial_nr = 0; |
m->serial_nr = 1; |
144 |
m->machine_type = MACHINE_NONE; |
m->machine_type = MACHINE_NONE; |
145 |
m->machine_subtype = MACHINE_NONE; |
m->machine_subtype = MACHINE_NONE; |
146 |
|
#ifdef BINTRANS |
147 |
m->bintrans_enable = 1; |
m->bintrans_enable = 1; |
148 |
|
m->old_bintrans_enable = 1; |
149 |
|
#endif |
150 |
m->prom_emulation = 1; |
m->prom_emulation = 1; |
151 |
m->speed_tricks = 1; |
m->speed_tricks = 1; |
152 |
m->byte_order_override = NO_BYTE_ORDER_OVERRIDE; |
m->byte_order_override = NO_BYTE_ORDER_OVERRIDE; |
205 |
return 1; |
return 1; |
206 |
} |
} |
207 |
|
|
208 |
fatal("unknown subtype '%s' for emulation" |
fatal("Unknown subtype '%s' for emulation" |
209 |
" '%s'\n", ssubtype, stype); |
" '%s'\n", ssubtype, stype); |
210 |
|
if (!ssubtype[0]) |
211 |
|
fatal("(Maybe you forgot the -e" |
212 |
|
" command line option?)\n"); |
213 |
exit(1); |
exit(1); |
214 |
} |
} |
215 |
|
|
216 |
me = me->next; |
me = me->next; |
217 |
} |
} |
218 |
|
|
219 |
fatal("machine_name_to_type(): unknown emulation type '%s' (", stype); |
fatal("\nSorry, emulation \"%s\"", stype); |
220 |
if (ssubtype == NULL) |
if (ssubtype != NULL && ssubtype[0] != '\0') |
221 |
fatal("no subtype)\n"); |
fatal(" (subtype \"%s\")", ssubtype); |
222 |
else |
fatal(" is unknown.\n"); |
|
fatal("subtype '%s')\n", ssubtype); |
|
|
|
|
223 |
fatal("Use the -H command line option to get a list of available" |
fatal("Use the -H command line option to get a list of available" |
224 |
" types and subtypes.\n"); |
" types and subtypes.\n\n"); |
225 |
return 0; |
return 0; |
226 |
} |
} |
227 |
|
|
426 |
*/ |
*/ |
427 |
void store_buf(struct cpu *cpu, uint64_t addr, char *s, size_t len) |
void store_buf(struct cpu *cpu, uint64_t addr, char *s, size_t len) |
428 |
{ |
{ |
429 |
|
int psize = 1024; /* 1024 256 64 16 4 1 */ |
430 |
|
|
431 |
if ((addr >> 32) == 0) |
if ((addr >> 32) == 0) |
432 |
addr = (int64_t)(int32_t)addr; |
addr = (int64_t)(int32_t)addr; |
|
if ((addr & 7) == 0 && (((size_t)s) & 7) == 0) { |
|
|
while (len >= 8) { |
|
|
cpu->memory_rw(cpu, cpu->mem, addr, (unsigned char *)s, |
|
|
8, MEM_WRITE, CACHE_DATA); |
|
|
addr += 8; |
|
|
s += 8; |
|
|
len -= 8; |
|
|
} |
|
|
} |
|
433 |
|
|
434 |
if ((addr & 3) == 0 && (((size_t)s) & 3) == 0) { |
while (len != 0) { |
435 |
while (len >= 4) { |
if ((addr & (psize-1)) == 0) { |
436 |
cpu->memory_rw(cpu, cpu->mem, addr, (unsigned char *)s, |
while (len >= psize) { |
437 |
4, MEM_WRITE, CACHE_DATA); |
cpu->memory_rw(cpu, cpu->mem, addr, |
438 |
addr += 4; |
(unsigned char *)s, psize, MEM_WRITE, |
439 |
s += 4; |
CACHE_DATA); |
440 |
len -= 4; |
addr += psize; |
441 |
|
s += psize; |
442 |
|
len -= psize; |
443 |
|
} |
444 |
} |
} |
445 |
|
psize >>= 2; |
446 |
} |
} |
447 |
|
|
448 |
while (len-- != 0) |
while (len-- != 0) |
496 |
|
|
497 |
|
|
498 |
/* |
/* |
499 |
|
* load_16bit_word(): |
500 |
|
* |
501 |
|
* Helper function. Prints a warning and returns 0, if the read failed. |
502 |
|
* Emulated byte order is taken into account. |
503 |
|
*/ |
504 |
|
uint16_t load_16bit_word(struct cpu *cpu, uint64_t addr) |
505 |
|
{ |
506 |
|
unsigned char data[2]; |
507 |
|
|
508 |
|
if ((addr >> 32) == 0) |
509 |
|
addr = (int64_t)(int32_t)addr; |
510 |
|
cpu->memory_rw(cpu, cpu->mem, |
511 |
|
addr, data, sizeof(data), MEM_READ, CACHE_DATA); |
512 |
|
|
513 |
|
if (cpu->byte_order == EMUL_LITTLE_ENDIAN) { |
514 |
|
int tmp = data[0]; data[0] = data[1]; data[1] = tmp; |
515 |
|
} |
516 |
|
|
517 |
|
return (data[0] << 8) + data[1]; |
518 |
|
} |
519 |
|
|
520 |
|
|
521 |
|
/* |
522 |
* store_64bit_word_in_host(): |
* store_64bit_word_in_host(): |
523 |
* |
* |
524 |
* Stores a 64-bit word in the _host's_ RAM. Emulated byte order is taken |
* Stores a 64-bit word in the _host's_ RAM. Emulated byte order is taken |
602 |
|
|
603 |
if (assrt) { |
if (assrt) { |
604 |
/* OR in the irq_nr into the CSR: */ |
/* OR in the irq_nr into the CSR: */ |
605 |
m->kn02_csr->csr[0] |= irq_nr; |
m->md_int.kn02_csr->csr[0] |= irq_nr; |
606 |
} else { |
} else { |
607 |
/* AND out the irq_nr from the CSR: */ |
/* AND out the irq_nr from the CSR: */ |
608 |
m->kn02_csr->csr[0] &= ~irq_nr; |
m->md_int.kn02_csr->csr[0] &= ~irq_nr; |
609 |
} |
} |
610 |
|
|
611 |
current = m->kn02_csr->csr[0] & m->kn02_csr->csr[2]; |
current = m->md_int.kn02_csr->csr[0] & m->md_int.kn02_csr->csr[2]; |
612 |
if (current == 0) |
if (current == 0) |
613 |
cpu_interrupt_ack(cpu, 2); |
cpu_interrupt_ack(cpu, 2); |
614 |
else |
else |
627 |
/* debug("kmin_interrupt(): irq_nr=%i assrt=%i\n", irq_nr, assrt); */ |
/* debug("kmin_interrupt(): irq_nr=%i assrt=%i\n", irq_nr, assrt); */ |
628 |
|
|
629 |
if (assrt) |
if (assrt) |
630 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |= irq_nr; |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |= irq_nr; |
631 |
else |
else |
632 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] &= ~irq_nr; |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] &= ~irq_nr; |
633 |
|
|
634 |
if (m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
if (m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
635 |
& m->dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) / 0x10]) |
& m->md_int.dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) / 0x10]) |
636 |
cpu_interrupt(cpu, KMIN_INT_TC3); |
cpu_interrupt(cpu, KMIN_INT_TC3); |
637 |
else |
else |
638 |
cpu_interrupt_ack(cpu, KMIN_INT_TC3); |
cpu_interrupt_ack(cpu, KMIN_INT_TC3); |
648 |
/* debug("kn03_interrupt(): irq_nr=0x%x assrt=%i\n", irq_nr, assrt); */ |
/* debug("kn03_interrupt(): irq_nr=0x%x assrt=%i\n", irq_nr, assrt); */ |
649 |
|
|
650 |
if (assrt) |
if (assrt) |
651 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |= irq_nr; |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |= irq_nr; |
652 |
else |
else |
653 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] &= ~irq_nr; |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] &= ~irq_nr; |
654 |
|
|
655 |
if (m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
if (m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
656 |
& m->dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) / 0x10]) |
& m->md_int.dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) / 0x10]) |
657 |
cpu_interrupt(cpu, KN03_INT_ASIC); |
cpu_interrupt(cpu, KN03_INT_ASIC); |
658 |
else |
else |
659 |
cpu_interrupt_ack(cpu, KN03_INT_ASIC); |
cpu_interrupt_ack(cpu, KN03_INT_ASIC); |
670 |
debug("maxine_interrupt(): irq_nr=0x%x assrt=%i\n", irq_nr, assrt); |
debug("maxine_interrupt(): irq_nr=0x%x assrt=%i\n", irq_nr, assrt); |
671 |
|
|
672 |
if (assrt) |
if (assrt) |
673 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) |
674 |
/ 0x10] |= irq_nr; |
/ 0x10] |= irq_nr; |
675 |
else |
else |
676 |
m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) |
m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) |
677 |
/ 0x10] &= ~irq_nr; |
/ 0x10] &= ~irq_nr; |
678 |
|
|
679 |
if (m->dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
if (m->md_int.dec_ioasic_data->reg[(IOASIC_INTR - IOASIC_SLOT_1_START) / 0x10] |
680 |
& m->dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) |
& m->md_int.dec_ioasic_data->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) |
681 |
/ 0x10]) |
/ 0x10]) |
682 |
cpu_interrupt(cpu, XINE_INT_TC3); |
cpu_interrupt(cpu, XINE_INT_TC3); |
683 |
else |
else |
692 |
{ |
{ |
693 |
int r2 = 0; |
int r2 = 0; |
694 |
|
|
695 |
m->kn230_csr->csr |= irq_nr; |
m->md_int.kn230_csr->csr |= irq_nr; |
696 |
|
|
697 |
switch (irq_nr) { |
switch (irq_nr) { |
698 |
case KN230_CSR_INTR_SII: |
case KN230_CSR_INTR_SII: |
710 |
|
|
711 |
if (assrt) { |
if (assrt) { |
712 |
/* OR in the irq_nr mask into the CSR: */ |
/* OR in the irq_nr mask into the CSR: */ |
713 |
m->kn230_csr->csr |= irq_nr; |
m->md_int.kn230_csr->csr |= irq_nr; |
714 |
|
|
715 |
/* Assert MIPS interrupt 2 or 3: */ |
/* Assert MIPS interrupt 2 or 3: */ |
716 |
cpu_interrupt(cpu, r2); |
cpu_interrupt(cpu, r2); |
717 |
} else { |
} else { |
718 |
/* AND out the irq_nr mask from the CSR: */ |
/* AND out the irq_nr mask from the CSR: */ |
719 |
m->kn230_csr->csr &= ~irq_nr; |
m->md_int.kn230_csr->csr &= ~irq_nr; |
720 |
|
|
721 |
/* If the CSR interrupt bits are all zero, |
/* If the CSR interrupt bits are all zero, |
722 |
clear the bit in the cause register as well. */ |
clear the bit in the cause register as well. */ |
723 |
if (r2 == 2) { |
if (r2 == 2) { |
724 |
/* irq 2: */ |
/* irq 2: */ |
725 |
if ((m->kn230_csr->csr & (KN230_CSR_INTR_DZ0 |
if ((m->md_int.kn230_csr->csr & (KN230_CSR_INTR_DZ0 |
726 |
| KN230_CSR_INTR_OPT0 | KN230_CSR_INTR_OPT1)) == 0) |
| KN230_CSR_INTR_OPT0 | KN230_CSR_INTR_OPT1)) == 0) |
727 |
cpu_interrupt_ack(cpu, r2); |
cpu_interrupt_ack(cpu, r2); |
728 |
} else { |
} else { |
729 |
/* irq 3: */ |
/* irq 3: */ |
730 |
if ((m->kn230_csr->csr & (KN230_CSR_INTR_SII | |
if ((m->md_int.kn230_csr->csr & (KN230_CSR_INTR_SII | |
731 |
KN230_CSR_INTR_LANCE)) == 0) |
KN230_CSR_INTR_LANCE)) == 0) |
732 |
cpu_interrupt_ack(cpu, r2); |
cpu_interrupt_ack(cpu, r2); |
733 |
} |
} |
761 |
|
|
762 |
if (isa) { |
if (isa) { |
763 |
if (assrt) |
if (assrt) |
764 |
m->jazz_data->isa_int_asserted |= irq; |
m->md_int.jazz_data->isa_int_asserted |= irq; |
765 |
else |
else |
766 |
m->jazz_data->isa_int_asserted &= ~irq; |
m->md_int.jazz_data->isa_int_asserted &= ~irq; |
767 |
} else { |
} else { |
768 |
if (assrt) |
if (assrt) |
769 |
m->jazz_data->int_asserted |= irq; |
m->md_int.jazz_data->int_asserted |= irq; |
770 |
else |
else |
771 |
m->jazz_data->int_asserted &= ~irq; |
m->md_int.jazz_data->int_asserted &= ~irq; |
772 |
} |
} |
773 |
|
|
774 |
/* debug(" %08x %08x\n", m->jazz_data->int_asserted, |
/* debug(" %08x %08x\n", m->md_int.jazz_data->int_asserted, |
775 |
m->jazz_data->int_enable_mask); */ |
m->md_int.jazz_data->int_enable_mask); */ |
776 |
/* debug(" %08x %08x\n", m->jazz_data->isa_int_asserted, |
/* debug(" %08x %08x\n", m->md_int.jazz_data->isa_int_asserted, |
777 |
m->jazz_data->isa_int_enable_mask); */ |
m->md_int.jazz_data->isa_int_enable_mask); */ |
778 |
|
|
779 |
if (m->jazz_data->int_asserted /* & m->jazz_data->int_enable_mask */ |
if (m->md_int.jazz_data->int_asserted |
780 |
& ~0x8000 ) |
/* & m->md_int.jazz_data->int_enable_mask */ & ~0x8000 ) |
781 |
cpu_interrupt(cpu, 3); |
cpu_interrupt(cpu, 3); |
782 |
else |
else |
783 |
cpu_interrupt_ack(cpu, 3); |
cpu_interrupt_ack(cpu, 3); |
784 |
|
|
785 |
if (m->jazz_data->isa_int_asserted & m->jazz_data->isa_int_enable_mask) |
if (m->md_int.jazz_data->isa_int_asserted & |
786 |
|
m->md_int.jazz_data->isa_int_enable_mask) |
787 |
cpu_interrupt(cpu, 4); |
cpu_interrupt(cpu, 4); |
788 |
else |
else |
789 |
cpu_interrupt_ack(cpu, 4); |
cpu_interrupt_ack(cpu, 4); |
790 |
|
|
791 |
/* TODO: this "15" (0x8000) is the timer... fix this? */ |
/* TODO: this "15" (0x8000) is the timer... fix this? */ |
792 |
if (m->jazz_data->int_asserted & 0x8000) |
if (m->md_int.jazz_data->int_asserted & 0x8000) |
793 |
cpu_interrupt(cpu, 6); |
cpu_interrupt(cpu, 6); |
794 |
else |
else |
795 |
cpu_interrupt_ack(cpu, 6); |
cpu_interrupt_ack(cpu, 6); |
814 |
giu_irq = irq_nr - 32; |
giu_irq = irq_nr - 32; |
815 |
|
|
816 |
if (assrt) |
if (assrt) |
817 |
m->vr41xx_data->giuint |= (1 << giu_irq); |
m->md_int.vr41xx_data->giuint |= (1 << giu_irq); |
818 |
else |
else |
819 |
m->vr41xx_data->giuint &= ~(1 << giu_irq); |
m->md_int.vr41xx_data->giuint &= ~(1 << giu_irq); |
820 |
} |
} |
821 |
|
|
822 |
/* TODO: This is wrong. What about GIU bit 8? */ |
/* TODO: This is wrong. What about GIU bit 8? */ |
824 |
if (irq_nr != 8) { |
if (irq_nr != 8) { |
825 |
/* If any GIU bit is asserted, then assert the main |
/* If any GIU bit is asserted, then assert the main |
826 |
GIU interrupt: */ |
GIU interrupt: */ |
827 |
if (m->vr41xx_data->giuint & m->vr41xx_data->giumask) |
if (m->md_int.vr41xx_data->giuint & |
828 |
|
m->md_int.vr41xx_data->giumask) |
829 |
vr41xx_interrupt(m, cpu, 8 + 8, 1); |
vr41xx_interrupt(m, cpu, 8 + 8, 1); |
830 |
else |
else |
831 |
vr41xx_interrupt(m, cpu, 8 + 8, 0); |
vr41xx_interrupt(m, cpu, 8 + 8, 0); |
836 |
|
|
837 |
if (irq_nr < 16) { |
if (irq_nr < 16) { |
838 |
if (assrt) |
if (assrt) |
839 |
m->vr41xx_data->sysint1 |= (1 << irq_nr); |
m->md_int.vr41xx_data->sysint1 |= (1 << irq_nr); |
840 |
else |
else |
841 |
m->vr41xx_data->sysint1 &= ~(1 << irq_nr); |
m->md_int.vr41xx_data->sysint1 &= ~(1 << irq_nr); |
842 |
} else if (irq_nr < 32) { |
} else if (irq_nr < 32) { |
843 |
irq_nr -= 16; |
irq_nr -= 16; |
844 |
if (assrt) |
if (assrt) |
845 |
m->vr41xx_data->sysint2 |= (1 << irq_nr); |
m->md_int.vr41xx_data->sysint2 |= (1 << irq_nr); |
846 |
else |
else |
847 |
m->vr41xx_data->sysint2 &= ~(1 << irq_nr); |
m->md_int.vr41xx_data->sysint2 &= ~(1 << irq_nr); |
848 |
} |
} |
849 |
|
|
850 |
/* TODO: Which hardware interrupt pin? */ |
/* TODO: Which hardware interrupt pin? */ |
851 |
|
|
852 |
/* debug(" sysint1=%04x mask=%04x, sysint2=%04x mask=%04x\n", |
/* debug(" sysint1=%04x mask=%04x, sysint2=%04x mask=%04x\n", |
853 |
m->vr41xx_data->sysint1, m->vr41xx_data->msysint1, |
m->md_int.vr41xx_data->sysint1, m->md_int.vr41xx_data->msysint1, |
854 |
m->vr41xx_data->sysint2, m->vr41xx_data->msysint2); */ |
m->md_int.vr41xx_data->sysint2, m->md_int.vr41xx_data->msysint2); */ |
855 |
|
|
856 |
if ((m->vr41xx_data->sysint1 & m->vr41xx_data->msysint1) | |
if ((m->md_int.vr41xx_data->sysint1 & m->md_int.vr41xx_data->msysint1) | |
857 |
(m->vr41xx_data->sysint2 & m->vr41xx_data->msysint2)) |
(m->md_int.vr41xx_data->sysint2 & m->md_int.vr41xx_data->msysint2)) |
858 |
cpu_interrupt(cpu, 2); |
cpu_interrupt(cpu, 2); |
859 |
else |
else |
860 |
cpu_interrupt_ack(cpu, 2); |
cpu_interrupt_ack(cpu, 2); |
863 |
|
|
864 |
/* |
/* |
865 |
* Playstation 2 interrupt routine: |
* Playstation 2 interrupt routine: |
866 |
|
* |
867 |
|
* irq_nr = 8 + x normal irq x |
868 |
|
* 8 + 16 + y dma irq y |
869 |
|
* 8 + 32 + 0 sbus irq 0 (pcmcia) |
870 |
|
* 8 + 32 + 1 sbus irq 1 (usb) |
871 |
*/ |
*/ |
872 |
void ps2_interrupt(struct machine *m, struct cpu *cpu, int irq_nr, int assrt) |
void ps2_interrupt(struct machine *m, struct cpu *cpu, int irq_nr, int assrt) |
873 |
{ |
{ |
874 |
irq_nr -= 8; |
irq_nr -= 8; |
875 |
debug("ps2_interrupt(): irq_nr=0x%x assrt=%i\n", irq_nr, assrt); |
debug("ps2_interrupt(): irq_nr=0x%x assrt=%i\n", irq_nr, assrt); |
876 |
|
|
877 |
if (assrt) { |
if (irq_nr >= 32) { |
878 |
/* OR into the INTR: */ |
int msk = 0; |
879 |
if (irq_nr < 0x10000) |
switch (irq_nr - 32) { |
880 |
m->ps2_data->intr |= irq_nr; |
case 0: /* PCMCIA: */ |
881 |
|
msk = 0x100; |
882 |
|
break; |
883 |
|
case 1: /* USB: */ |
884 |
|
msk = 0x400; |
885 |
|
break; |
886 |
|
default: |
887 |
|
fatal("ps2_interrupt(): bad irq_nr %i\n", irq_nr); |
888 |
|
} |
889 |
|
|
890 |
|
if (assrt) |
891 |
|
m->md_int.ps2_data->sbus_smflg |= msk; |
892 |
else |
else |
893 |
m->ps2_data->dmac_reg[0x601] |= (irq_nr >> 16); |
m->md_int.ps2_data->sbus_smflg &= ~msk; |
894 |
|
|
895 |
/* Assert interrupt: TODO: masks */ |
if (m->md_int.ps2_data->sbus_smflg != 0) |
896 |
if (irq_nr >= 0x10000) |
cpu_interrupt(cpu, 8 + 1); |
|
cpu_interrupt(cpu, 3); |
|
897 |
else |
else |
898 |
cpu_interrupt(cpu, 2); |
cpu_interrupt_ack(cpu, 8 + 1); |
899 |
|
return; |
900 |
|
} |
901 |
|
|
902 |
|
if (assrt) { |
903 |
|
/* OR into the INTR: */ |
904 |
|
if (irq_nr < 16) |
905 |
|
m->md_int.ps2_data->intr |= (1 << irq_nr); |
906 |
|
else |
907 |
|
m->md_int.ps2_data->dmac_reg[0x601] |= |
908 |
|
(1 << (irq_nr-16)); |
909 |
} else { |
} else { |
910 |
/* AND out of the INTR: */ |
/* AND out of the INTR: */ |
911 |
if (irq_nr < 0x10000) |
if (irq_nr < 16) |
912 |
m->ps2_data->intr &= ~irq_nr; |
m->md_int.ps2_data->intr &= ~(1 << irq_nr); |
913 |
else |
else |
914 |
m->ps2_data->dmac_reg[0x601] &= ~(irq_nr >> 16); |
m->md_int.ps2_data->dmac_reg[0x601] &= |
915 |
|
~(1 << (irq_nr-16)); |
|
/* TODO: masks */ |
|
|
if ((m->ps2_data->intr & 0xffff) == 0) |
|
|
cpu_interrupt_ack(cpu, 2); |
|
|
if ((m->ps2_data->dmac_reg[0x601] & 0xffff) == 0) |
|
|
cpu_interrupt_ack(cpu, 3); |
|
916 |
} |
} |
917 |
|
|
918 |
|
/* TODO: Hm? How about the mask? */ |
919 |
|
if (m->md_int.ps2_data->intr /* & m->md_int.ps2_data->imask */ ) |
920 |
|
cpu_interrupt(cpu, 2); |
921 |
|
else |
922 |
|
cpu_interrupt_ack(cpu, 2); |
923 |
|
|
924 |
|
/* TODO: mask? */ |
925 |
|
if (m->md_int.ps2_data->dmac_reg[0x601] & 0xffff) |
926 |
|
cpu_interrupt(cpu, 3); |
927 |
|
else |
928 |
|
cpu_interrupt_ack(cpu, 3); |
929 |
} |
} |
930 |
|
|
931 |
|
|
954 |
int ms = irq_nr / 64; |
int ms = irq_nr / 64; |
955 |
uint32_t new = 1 << ms; |
uint32_t new = 1 << ms; |
956 |
if (assrt) |
if (assrt) |
957 |
m->sgi_ip22_data->reg[4] |= new; |
m->md_int.sgi_ip22_data->reg[4] |= new; |
958 |
else |
else |
959 |
m->sgi_ip22_data->reg[4] &= ~new; |
m->md_int.sgi_ip22_data->reg[4] &= ~new; |
960 |
/* TODO: is this enough? */ |
/* TODO: is this enough? */ |
961 |
irq_nr &= 63; |
irq_nr &= 63; |
962 |
} |
} |
963 |
|
|
964 |
if (irq_nr < 32) { |
if (irq_nr < 32) { |
965 |
if (assrt) |
if (assrt) |
966 |
m->sgi_ip22_data->reg[0] |= newmask; |
m->md_int.sgi_ip22_data->reg[0] |= newmask; |
967 |
else |
else |
968 |
m->sgi_ip22_data->reg[0] &= ~newmask; |
m->md_int.sgi_ip22_data->reg[0] &= ~newmask; |
969 |
} else { |
} else { |
970 |
if (assrt) |
if (assrt) |
971 |
m->sgi_ip22_data->reg[2] |= newmask; |
m->md_int.sgi_ip22_data->reg[2] |= newmask; |
972 |
else |
else |
973 |
m->sgi_ip22_data->reg[2] &= ~newmask; |
m->md_int.sgi_ip22_data->reg[2] &= ~newmask; |
974 |
} |
} |
975 |
|
|
976 |
/* Read stat and mask for local0: */ |
/* Read stat and mask for local0: */ |
977 |
stat = m->sgi_ip22_data->reg[0]; |
stat = m->md_int.sgi_ip22_data->reg[0]; |
978 |
mask = m->sgi_ip22_data->reg[1]; |
mask = m->md_int.sgi_ip22_data->reg[1]; |
979 |
if ((stat & mask) == 0) |
if ((stat & mask) == 0) |
980 |
cpu_interrupt_ack(cpu, 2); |
cpu_interrupt_ack(cpu, 2); |
981 |
else |
else |
982 |
cpu_interrupt(cpu, 2); |
cpu_interrupt(cpu, 2); |
983 |
|
|
984 |
/* Read stat and mask for local1: */ |
/* Read stat and mask for local1: */ |
985 |
stat = m->sgi_ip22_data->reg[2]; |
stat = m->md_int.sgi_ip22_data->reg[2]; |
986 |
mask = m->sgi_ip22_data->reg[3]; |
mask = m->md_int.sgi_ip22_data->reg[3]; |
987 |
if ((stat & mask) == 0) |
if ((stat & mask) == 0) |
988 |
cpu_interrupt_ack(cpu, 3); |
cpu_interrupt_ack(cpu, 3); |
989 |
else |
else |
1015 |
newmask = (int64_t)1 << irq_nr; |
newmask = (int64_t)1 << irq_nr; |
1016 |
|
|
1017 |
if (assrt) |
if (assrt) |
1018 |
m->sgi_ip30_data->isr |= newmask; |
m->md_int.sgi_ip30_data->isr |= newmask; |
1019 |
else |
else |
1020 |
m->sgi_ip30_data->isr &= ~newmask; |
m->md_int.sgi_ip30_data->isr &= ~newmask; |
1021 |
|
|
1022 |
just_assert_and_such: |
just_assert_and_such: |
1023 |
|
|
1027 |
cpu_interrupt_ack(cpu, 5); |
cpu_interrupt_ack(cpu, 5); |
1028 |
cpu_interrupt_ack(cpu, 6); |
cpu_interrupt_ack(cpu, 6); |
1029 |
|
|
1030 |
stat = m->sgi_ip30_data->isr; |
stat = m->md_int.sgi_ip30_data->isr; |
1031 |
mask = m->sgi_ip30_data->imask0; |
mask = m->md_int.sgi_ip30_data->imask0; |
1032 |
|
|
1033 |
if ((stat & mask) & 0x000000000000ffffULL) |
if ((stat & mask) & 0x000000000000ffffULL) |
1034 |
cpu_interrupt(cpu, 2); |
cpu_interrupt(cpu, 2); |
1059 |
* interrupt 2 should be asserted. |
* interrupt 2 should be asserted. |
1060 |
* |
* |
1061 |
* TODO: how should all this be done nicely? |
* TODO: how should all this be done nicely? |
|
* |
|
|
* TODO: mace interrupt mask |
|
1062 |
*/ |
*/ |
1063 |
|
|
1064 |
uint64_t crime_addr = CRIME_INTSTAT; |
uint64_t crime_addr = CRIME_INTSTAT; |
1065 |
uint64_t mace_addr = 0x14; |
uint64_t mace_addr = 0x10; |
1066 |
uint64_t crime_interrupts, crime_interrupts_mask, mace_interrupts; |
uint64_t crime_interrupts, crime_interrupts_mask; |
1067 |
|
uint64_t mace_interrupts, mace_interrupt_mask; |
1068 |
unsigned int i; |
unsigned int i; |
1069 |
unsigned char x[8]; |
unsigned char x[8]; |
1070 |
|
|
1071 |
|
/* Read current MACE interrupt assertions: */ |
1072 |
|
memcpy(x, m->md_int.ip32.mace_data->reg + mace_addr, |
1073 |
|
sizeof(uint64_t)); |
1074 |
|
mace_interrupts = 0; |
1075 |
|
for (i=0; i<sizeof(uint64_t); i++) { |
1076 |
|
mace_interrupts <<= 8; |
1077 |
|
mace_interrupts |= x[i]; |
1078 |
|
} |
1079 |
|
|
1080 |
|
/* Read current MACE interrupt mask: */ |
1081 |
|
memcpy(x, m->md_int.ip32.mace_data->reg + mace_addr + 8, |
1082 |
|
sizeof(uint64_t)); |
1083 |
|
mace_interrupt_mask = 0; |
1084 |
|
for (i=0; i<sizeof(uint64_t); i++) { |
1085 |
|
mace_interrupt_mask <<= 8; |
1086 |
|
mace_interrupt_mask |= x[i]; |
1087 |
|
} |
1088 |
|
|
1089 |
/* |
/* |
1090 |
* This mapping of both MACE and CRIME interrupts into the same |
* This mapping of both MACE and CRIME interrupts into the same |
1091 |
* 'int' is really ugly. |
* 'int' is really ugly. |
1097 |
* TODO: fix. |
* TODO: fix. |
1098 |
*/ |
*/ |
1099 |
if (irq_nr & MACE_PERIPH_SERIAL) { |
if (irq_nr & MACE_PERIPH_SERIAL) { |
|
/* Read current MACE interrupt bits: */ |
|
|
memcpy(x, m->mace_data->reg + mace_addr, sizeof(uint32_t)); |
|
|
mace_interrupts = 0; |
|
|
for (i=0; i<sizeof(uint32_t); i++) { |
|
|
/* SGI is big-endian... */ |
|
|
mace_interrupts <<= 8; |
|
|
mace_interrupts |= x[i]; |
|
|
} |
|
|
|
|
1100 |
if (assrt) |
if (assrt) |
1101 |
mace_interrupts |= (irq_nr & ~MACE_PERIPH_SERIAL); |
mace_interrupts |= (irq_nr & ~MACE_PERIPH_SERIAL); |
1102 |
else |
else |
1103 |
mace_interrupts &= ~(irq_nr & ~MACE_PERIPH_SERIAL); |
mace_interrupts &= ~(irq_nr & ~MACE_PERIPH_SERIAL); |
1104 |
|
|
|
/* Write back MACE interrupt bits: */ |
|
|
for (i=0; i<4; i++) |
|
|
x[3-i] = mace_interrupts >> (i*8); |
|
|
memcpy(m->mace_data->reg + mace_addr, x, sizeof(uint32_t)); |
|
|
|
|
1105 |
irq_nr = MACE_PERIPH_SERIAL; |
irq_nr = MACE_PERIPH_SERIAL; |
1106 |
if (mace_interrupts == 0) |
if ((mace_interrupts & mace_interrupt_mask) == 0) |
1107 |
assrt = 0; |
assrt = 0; |
1108 |
else |
else |
1109 |
assrt = 1; |
assrt = 1; |
1111 |
|
|
1112 |
/* Hopefully _MISC and _SERIAL will not be both on at the same time. */ |
/* Hopefully _MISC and _SERIAL will not be both on at the same time. */ |
1113 |
if (irq_nr & MACE_PERIPH_MISC) { |
if (irq_nr & MACE_PERIPH_MISC) { |
|
/* Read current MACE interrupt bits: */ |
|
|
memcpy(x, m->mace_data->reg + mace_addr, sizeof(uint32_t)); |
|
|
mace_interrupts = 0; |
|
|
for (i=0; i<sizeof(uint32_t); i++) { |
|
|
/* SGI is big-endian... */ |
|
|
mace_interrupts <<= 8; |
|
|
mace_interrupts |= x[i]; |
|
|
} |
|
|
|
|
1114 |
if (assrt) |
if (assrt) |
1115 |
mace_interrupts |= (irq_nr & ~MACE_PERIPH_MISC); |
mace_interrupts |= (irq_nr & ~MACE_PERIPH_MISC); |
1116 |
else |
else |
1117 |
mace_interrupts &= ~(irq_nr & ~MACE_PERIPH_MISC); |
mace_interrupts &= ~(irq_nr & ~MACE_PERIPH_MISC); |
1118 |
|
|
|
/* Write back MACE interrupt bits: */ |
|
|
for (i=0; i<4; i++) |
|
|
x[3-i] = mace_interrupts >> (i*8); |
|
|
memcpy(m->mace_data->reg + mace_addr, x, sizeof(uint32_t)); |
|
|
|
|
1119 |
irq_nr = MACE_PERIPH_MISC; |
irq_nr = MACE_PERIPH_MISC; |
1120 |
if (mace_interrupts == 0) |
if ((mace_interrupts & mace_interrupt_mask) == 0) |
1121 |
assrt = 0; |
assrt = 0; |
1122 |
else |
else |
1123 |
assrt = 1; |
assrt = 1; |
1124 |
} |
} |
1125 |
|
|
1126 |
|
/* Write back MACE interrupt assertions: */ |
1127 |
|
for (i=0; i<sizeof(uint64_t); i++) |
1128 |
|
x[7-i] = mace_interrupts >> (i*8); |
1129 |
|
memcpy(m->md_int.ip32.mace_data->reg + mace_addr, x, sizeof(uint64_t)); |
1130 |
|
|
1131 |
/* Read CRIME_INTSTAT: */ |
/* Read CRIME_INTSTAT: */ |
1132 |
memcpy(x, m->crime_data->reg + crime_addr, sizeof(uint64_t)); |
memcpy(x, m->md_int.ip32.crime_data->reg + crime_addr, |
1133 |
|
sizeof(uint64_t)); |
1134 |
crime_interrupts = 0; |
crime_interrupts = 0; |
1135 |
for (i=0; i<8; i++) { |
for (i=0; i<sizeof(uint64_t); i++) { |
|
/* SGI is big-endian... */ |
|
1136 |
crime_interrupts <<= 8; |
crime_interrupts <<= 8; |
1137 |
crime_interrupts |= x[i]; |
crime_interrupts |= x[i]; |
1138 |
} |
} |
1143 |
crime_interrupts &= ~irq_nr; |
crime_interrupts &= ~irq_nr; |
1144 |
|
|
1145 |
/* Write back CRIME_INTSTAT: */ |
/* Write back CRIME_INTSTAT: */ |
1146 |
for (i=0; i<8; i++) |
for (i=0; i<sizeof(uint64_t); i++) |
1147 |
x[7-i] = crime_interrupts >> (i*8); |
x[7-i] = crime_interrupts >> (i*8); |
1148 |
memcpy(m->crime_data->reg + crime_addr, x, sizeof(uint64_t)); |
memcpy(m->md_int.ip32.crime_data->reg + crime_addr, x, |
1149 |
|
sizeof(uint64_t)); |
1150 |
|
|
1151 |
/* Read CRIME_INTMASK: */ |
/* Read CRIME_INTMASK: */ |
1152 |
memcpy(x, m->crime_data->reg + CRIME_INTMASK, sizeof(uint64_t)); |
memcpy(x, m->md_int.ip32.crime_data->reg + CRIME_INTMASK, |
1153 |
|
sizeof(uint64_t)); |
1154 |
crime_interrupts_mask = 0; |
crime_interrupts_mask = 0; |
1155 |
for (i=0; i<8; i++) { |
for (i=0; i<sizeof(uint64_t); i++) { |
1156 |
crime_interrupts_mask <<= 8; |
crime_interrupts_mask <<= 8; |
1157 |
crime_interrupts_mask |= x[i]; |
crime_interrupts_mask |= x[i]; |
1158 |
} |
} |
1162 |
else |
else |
1163 |
cpu_interrupt(cpu, 2); |
cpu_interrupt(cpu, 2); |
1164 |
|
|
1165 |
/* printf("sgi_crime_machine_irq(%i,%i): new interrupts = 0x%08x\n", assrt, irq_nr, crime_interrupts); */ |
/* printf("sgi_crime_machine_irq(%i,%i): new interrupts = 0x%08x\n", |
1166 |
|
assrt, irq_nr, crime_interrupts); */ |
1167 |
} |
} |
1168 |
|
|
1169 |
|
|
1196 |
ms = 1 << (irq_nr & 31); |
ms = 1 << (irq_nr & 31); |
1197 |
|
|
1198 |
if (assrt) |
if (assrt) |
1199 |
m->au1x00_ic_data->request0_int |= ms; |
m->md_int.au1x00_ic_data->request0_int |= ms; |
1200 |
else |
else |
1201 |
m->au1x00_ic_data->request0_int &= ~ms; |
m->md_int.au1x00_ic_data->request0_int &= ~ms; |
1202 |
|
|
1203 |
/* TODO: Controller 1 */ |
/* TODO: Controller 1 */ |
1204 |
} |
} |
1205 |
|
|
1206 |
if ((m->au1x00_ic_data->request0_int & |
if ((m->md_int.au1x00_ic_data->request0_int & |
1207 |
m->au1x00_ic_data->mask) != 0) |
m->md_int.au1x00_ic_data->mask) != 0) |
1208 |
cpu_interrupt(cpu, 2); |
cpu_interrupt(cpu, 2); |
1209 |
else |
else |
1210 |
cpu_interrupt_ack(cpu, 2); |
cpu_interrupt_ack(cpu, 2); |
1215 |
} |
} |
1216 |
|
|
1217 |
|
|
1218 |
|
/* |
1219 |
|
* Malta (evbmips) interrupts: |
1220 |
|
* |
1221 |
|
* ISA interrupts. |
1222 |
|
* (irq_nr = 16+8 can be used to just reassert/deassert interrupts.) |
1223 |
|
*/ |
1224 |
|
void malta_interrupt(struct machine *m, struct cpu *cpu, int irq_nr, |
1225 |
|
int assrt) |
1226 |
|
{ |
1227 |
|
int mask; |
1228 |
|
|
1229 |
|
irq_nr -= 8; |
1230 |
|
mask = 1 << (irq_nr & 7); |
1231 |
|
|
1232 |
|
if (irq_nr < 8) { |
1233 |
|
if (assrt) |
1234 |
|
m->md_int.malta_data->assert_lo |= mask; |
1235 |
|
else |
1236 |
|
m->md_int.malta_data->assert_lo &= ~mask; |
1237 |
|
} else if (irq_nr < 16) { |
1238 |
|
if (assrt) |
1239 |
|
m->md_int.malta_data->assert_hi |= mask; |
1240 |
|
else |
1241 |
|
m->md_int.malta_data->assert_hi &= ~mask; |
1242 |
|
} |
1243 |
|
|
1244 |
|
/* Any interrupt assertions on PIC2 go to irq 2 on PIC1 */ |
1245 |
|
if (m->md_int.malta_data->assert_hi & |
1246 |
|
~m->md_int.malta_data->disable_hi) |
1247 |
|
m->md_int.malta_data->assert_lo |= 0x04; |
1248 |
|
else |
1249 |
|
m->md_int.malta_data->assert_lo &= ~0x04; |
1250 |
|
|
1251 |
|
/* Now, PIC1: */ |
1252 |
|
if (m->md_int.malta_data->assert_lo & |
1253 |
|
~m->md_int.malta_data->disable_lo) |
1254 |
|
cpu_interrupt(cpu, 2); |
1255 |
|
else |
1256 |
|
cpu_interrupt_ack(cpu, 2); |
1257 |
|
} |
1258 |
|
|
1259 |
|
|
1260 |
|
/* |
1261 |
|
* x86 (PC) interrupts: |
1262 |
|
* |
1263 |
|
* (irq_nr = 16 can be used to just reassert/deassert interrupts.) |
1264 |
|
*/ |
1265 |
|
void x86_pc_interrupt(struct machine *m, struct cpu *cpu, int irq_nr, int assrt) |
1266 |
|
{ |
1267 |
|
int mask = 1 << (irq_nr & 7); |
1268 |
|
|
1269 |
|
if (irq_nr < 8) { |
1270 |
|
if (assrt) |
1271 |
|
m->md.pc.pic1->irr |= mask; |
1272 |
|
else |
1273 |
|
m->md.pc.pic1->irr &= ~mask; |
1274 |
|
} else if (irq_nr < 16) { |
1275 |
|
if (m->md.pc.pic2 == NULL) { |
1276 |
|
fatal("x86_pc_interrupt(): pic2 used (irq_nr = %i), " |
1277 |
|
"but we are emulating an XT?\n", irq_nr); |
1278 |
|
return; |
1279 |
|
} |
1280 |
|
if (assrt) |
1281 |
|
m->md.pc.pic2->irr |= mask; |
1282 |
|
else |
1283 |
|
m->md.pc.pic2->irr &= ~mask; |
1284 |
|
} |
1285 |
|
|
1286 |
|
if (m->md.pc.pic2 != NULL) { |
1287 |
|
/* Any interrupt assertions on PIC2 go to irq 2 on PIC1 */ |
1288 |
|
/* (TODO: don't hardcode this here) */ |
1289 |
|
if (m->md.pc.pic2->irr & ~m->md.pc.pic2->ier) |
1290 |
|
m->md.pc.pic1->irr |= 0x04; |
1291 |
|
else |
1292 |
|
m->md.pc.pic1->irr &= ~0x04; |
1293 |
|
} |
1294 |
|
|
1295 |
|
/* Now, PIC1: */ |
1296 |
|
if (m->md.pc.pic1->irr & ~m->md.pc.pic1->ier) |
1297 |
|
cpu->cd.x86.interrupt_asserted = 1; |
1298 |
|
else |
1299 |
|
cpu->cd.x86.interrupt_asserted = 0; |
1300 |
|
} |
1301 |
|
|
1302 |
|
|
1303 |
/**************************************************************************** |
/**************************************************************************** |
1304 |
* * |
* * |
1305 |
* Machine dependant Initialization routines * |
* Machine dependant Initialization routines * |
1342 |
int hpcmips_fb_ysize_mem = 0; |
int hpcmips_fb_ysize_mem = 0; |
1343 |
|
|
1344 |
/* ARCBIOS stuff: */ |
/* ARCBIOS stuff: */ |
|
struct arcbios_spb arcbios_spb; |
|
|
struct arcbios_spb_64 arcbios_spb_64; |
|
|
struct arcbios_sysid arcbios_sysid; |
|
|
struct arcbios_dsp_stat arcbios_dsp_stat; |
|
|
uint64_t mem_base, mem_count; |
|
|
uint64_t system = 0; |
|
1345 |
uint64_t sgi_ram_offset = 0; |
uint64_t sgi_ram_offset = 0; |
|
uint64_t arc_reserved; |
|
1346 |
int arc_wordlen = sizeof(uint32_t); |
int arc_wordlen = sizeof(uint32_t); |
|
char *short_machine_name = NULL; |
|
1347 |
char *eaddr_string = "eaddr=10:20:30:40:50:60"; /* nonsense */ |
char *eaddr_string = "eaddr=10:20:30:40:50:60"; /* nonsense */ |
1348 |
unsigned char macaddr[6]; |
unsigned char macaddr[6]; |
1349 |
|
|
1350 |
/* Generic bootstring stuff: */ |
/* Generic bootstring stuff: */ |
1351 |
int bootdev_id = diskimage_bootdev(machine); |
int bootdev_type = 0; |
1352 |
|
int bootdev_id; |
1353 |
char *bootstr = NULL; |
char *bootstr = NULL; |
1354 |
char *bootarg = NULL; |
char *bootarg = NULL; |
1355 |
char *init_bootpath; |
char *init_bootpath; |
1364 |
struct cpu *cpu = machine->cpus[machine->bootstrap_cpu]; |
struct cpu *cpu = machine->cpus[machine->bootstrap_cpu]; |
1365 |
|
|
1366 |
|
|
1367 |
|
bootdev_id = diskimage_bootdev(machine, &bootdev_type); |
1368 |
|
|
1369 |
mem = cpu->mem; |
mem = cpu->mem; |
1370 |
machine->machine_name = NULL; |
machine->machine_name = NULL; |
1371 |
|
|
1403 |
|
|
1404 |
case MACHINE_TESTMIPS: |
case MACHINE_TESTMIPS: |
1405 |
/* |
/* |
1406 |
* A MIPS test machine (which happens to work with my |
* A MIPS test machine (which happens to work with the |
1407 |
* thesis work). |
* code in my master's thesis). :-) |
1408 |
*/ |
*/ |
1409 |
cpu->byte_order = EMUL_BIG_ENDIAN; |
cpu->byte_order = EMUL_BIG_ENDIAN; |
1410 |
machine->machine_name = "MIPS test machine"; |
machine->machine_name = "MIPS test machine"; |
1549 |
dev_mc146818_init(machine, mem, |
dev_mc146818_init(machine, mem, |
1550 |
KN02_SYS_CLOCK, KN02_INT_CLOCK, MC146818_DEC, 1); |
KN02_SYS_CLOCK, KN02_INT_CLOCK, MC146818_DEC, 1); |
1551 |
|
|
1552 |
machine->kn02_csr = |
machine->md_int.kn02_csr = |
1553 |
dev_kn02_init(cpu, mem, KN02_SYS_CSR); |
dev_kn02_init(cpu, mem, KN02_SYS_CSR); |
1554 |
|
|
1555 |
framebuffer_console_name = "osconsole=0,7"; |
framebuffer_console_name = "osconsole=0,7"; |
1583 |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1c300000) slot 12 |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1c300000) slot 12 |
1584 |
* dma for asc0 (0x1c380000) slot 14 |
* dma for asc0 (0x1c380000) slot 14 |
1585 |
*/ |
*/ |
1586 |
machine->dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1c000000, 0); |
machine->md_int.dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1c000000, 0); |
1587 |
dev_le_init(machine, mem, 0x1c0c0000, 0, 0, KMIN_INTR_LANCE +8, 4*65536); |
dev_le_init(machine, mem, 0x1c0c0000, 0, 0, KMIN_INTR_LANCE +8, 4*65536); |
1588 |
dev_scc_init(machine, mem, 0x1c100000, KMIN_INTR_SCC_0 +8, machine->use_x11, 0, 1); |
dev_scc_init(machine, mem, 0x1c100000, KMIN_INTR_SCC_0 +8, machine->use_x11, 0, 1); |
1589 |
dev_scc_init(machine, mem, 0x1c180000, KMIN_INTR_SCC_1 +8, machine->use_x11, 1, 1); |
dev_scc_init(machine, mem, 0x1c180000, KMIN_INTR_SCC_1 +8, machine->use_x11, 1, 1); |
1649 |
* mcclock0 at ioasic0 offset 0x200000: mc146818 or compatible (0x1fa00000) |
* mcclock0 at ioasic0 offset 0x200000: mc146818 or compatible (0x1fa00000) |
1650 |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1fb00000) |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1fb00000) |
1651 |
*/ |
*/ |
1652 |
machine->dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1f800000, 0); |
machine->md_int.dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1f800000, 0); |
1653 |
|
|
1654 |
dev_le_init(machine, mem, KN03_SYS_LANCE, 0, 0, KN03_INTR_LANCE +8, 4*65536); |
dev_le_init(machine, mem, KN03_SYS_LANCE, 0, 0, KN03_INTR_LANCE +8, 4*65536); |
1655 |
|
|
1656 |
machine->dec_ioasic_data->dma_func[3] = dev_scc_dma_func; |
machine->md_int.dec_ioasic_data->dma_func[3] = dev_scc_dma_func; |
1657 |
machine->dec_ioasic_data->dma_func_extra[2] = dev_scc_init(machine, mem, KN03_SYS_SCC_0, KN03_INTR_SCC_0 +8, machine->use_x11, 0, 1); |
machine->md_int.dec_ioasic_data->dma_func_extra[2] = dev_scc_init(machine, mem, KN03_SYS_SCC_0, KN03_INTR_SCC_0 +8, machine->use_x11, 0, 1); |
1658 |
machine->dec_ioasic_data->dma_func[2] = dev_scc_dma_func; |
machine->md_int.dec_ioasic_data->dma_func[2] = dev_scc_dma_func; |
1659 |
machine->dec_ioasic_data->dma_func_extra[3] = dev_scc_init(machine, mem, KN03_SYS_SCC_1, KN03_INTR_SCC_1 +8, machine->use_x11, 1, 1); |
machine->md_int.dec_ioasic_data->dma_func_extra[3] = dev_scc_init(machine, mem, KN03_SYS_SCC_1, KN03_INTR_SCC_1 +8, machine->use_x11, 1, 1); |
1660 |
|
|
1661 |
dev_mc146818_init(machine, mem, KN03_SYS_CLOCK, KN03_INT_RTC, MC146818_DEC, 1); |
dev_mc146818_init(machine, mem, KN03_SYS_CLOCK, KN03_INT_RTC, MC146818_DEC, 1); |
1662 |
dev_asc_init(machine, mem, KN03_SYS_SCSI, |
dev_asc_init(machine, mem, KN03_SYS_SCSI, |
1715 |
* Clock uses interrupt 3 (shared with XMI?). |
* Clock uses interrupt 3 (shared with XMI?). |
1716 |
*/ |
*/ |
1717 |
|
|
1718 |
machine->dec5800_csr = dev_dec5800_init(machine, mem, 0x10000000); |
machine->md_int.dec5800_csr = dev_dec5800_init(machine, mem, 0x10000000); |
1719 |
dev_decbi_init(mem, 0x10000000); |
dev_decbi_init(mem, 0x10000000); |
1720 |
dev_ssc_init(machine, mem, 0x10140000, 2, machine->use_x11, &machine->dec5800_csr->csr); |
dev_ssc_init(machine, mem, 0x10140000, 2, machine->use_x11, &machine->md_int.dec5800_csr->csr); |
1721 |
dev_decxmi_init(mem, 0x11800000); |
dev_decxmi_init(mem, 0x11800000); |
1722 |
dev_deccca_init(mem, DEC_DECCCA_BASEADDR); |
dev_deccca_init(mem, DEC_DECCCA_BASEADDR); |
1723 |
|
|
1786 |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1c300000) |
* asc0 at ioasic0 offset 0x300000: NCR53C94, 25MHz, SCSI ID 7 (0x1c300000) |
1787 |
* xcfb0 at tc0 slot 2 offset 0x0: 1024x768x8 built-in framebuffer (0xa000000) |
* xcfb0 at tc0 slot 2 offset 0x0: 1024x768x8 built-in framebuffer (0xa000000) |
1788 |
*/ |
*/ |
1789 |
machine->dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1c000000, 0); |
machine->md_int.dec_ioasic_data = dev_dec_ioasic_init(cpu, mem, 0x1c000000, 0); |
1790 |
|
|
1791 |
/* TURBOchannel slots (0 and 1): */ |
/* TURBOchannel slots (0 and 1): */ |
1792 |
dev_turbochannel_init(machine, mem, 0, |
dev_turbochannel_init(machine, mem, 0, |
1893 |
|
|
1894 |
snprintf(tmpstr, sizeof(tmpstr) - 1, |
snprintf(tmpstr, sizeof(tmpstr) - 1, |
1895 |
"kn230 addr=0x%llx", (long long)KN230_SYS_ICSR); |
"kn230 addr=0x%llx", (long long)KN230_SYS_ICSR); |
1896 |
machine->kn230_csr = device_add(machine, tmpstr); |
machine->md_int.kn230_csr = device_add(machine, tmpstr); |
1897 |
|
|
1898 |
serial_console_name = "osconsole=0"; |
serial_console_name = "osconsole=0"; |
1899 |
break; |
break; |
1972 |
|
|
1973 |
#if 0 |
#if 0 |
1974 |
if (machine->machine_subtype == MACHINE_DEC_PMAX_3100) |
if (machine->machine_subtype == MACHINE_DEC_PMAX_3100) |
1975 |
strcpy(bootpath, "rz(0,0,0)"); |
strlcpy(bootpath, "rz(0,0,0)", sizeof(bootpath)); |
1976 |
else |
else |
1977 |
#endif |
#endif |
1978 |
strcpy(bootpath, "5/rz1/"); |
strlcpy(bootpath, "5/rz1/", sizeof(bootpath)); |
1979 |
|
|
1980 |
if (bootdev_id < 0 || machine->force_netboot) { |
if (bootdev_id < 0 || machine->force_netboot) { |
1981 |
/* tftp boot: */ |
/* tftp boot: */ |
1982 |
strcpy(bootpath, "5/tftp/"); |
strlcpy(bootpath, "5/tftp/", sizeof(bootpath)); |
1983 |
bootpath[0] = '0' + boot_net_boardnumber; |
bootpath[0] = '0' + boot_net_boardnumber; |
1984 |
} else { |
} else { |
1985 |
/* disk boot: */ |
/* disk boot: */ |
1986 |
bootpath[0] = '0' + boot_scsi_boardnumber; |
bootpath[0] = '0' + boot_scsi_boardnumber; |
1987 |
if (diskimage_is_a_tape(machine, bootdev_id)) |
if (diskimage_is_a_tape(machine, bootdev_id, |
1988 |
|
bootdev_type)) |
1989 |
bootpath[2] = 't'; |
bootpath[2] = 't'; |
1990 |
bootpath[4] = '0' + bootdev_id; |
bootpath[4] = '0' + bootdev_id; |
1991 |
} |
} |
1993 |
init_bootpath = bootpath; |
init_bootpath = bootpath; |
1994 |
} |
} |
1995 |
|
|
1996 |
bootarg = malloc(strlen(init_bootpath) + |
bootarg = malloc(BOOTARG_BUFLEN); |
1997 |
strlen(machine->boot_kernel_filename) + 1 + |
if (bootarg == NULL) { |
1998 |
strlen(machine->boot_string_argument) + 1); |
fprintf(stderr, "out of memory\n"); |
1999 |
strcpy(bootarg, init_bootpath); |
exit(1); |
2000 |
strcat(bootarg, machine->boot_kernel_filename); |
} |
2001 |
|
strlcpy(bootarg, init_bootpath, BOOTARG_BUFLEN); |
2002 |
|
if (strlcat(bootarg, machine->boot_kernel_filename, |
2003 |
|
BOOTARG_BUFLEN) > BOOTARG_BUFLEN) { |
2004 |
|
fprintf(stderr, "bootarg truncated?\n"); |
2005 |
|
exit(1); |
2006 |
|
} |
2007 |
|
|
2008 |
bootstr = "boot"; |
bootstr = "boot"; |
2009 |
|
|
2018 |
cpu->cd.mips.gpr[MIPS_GPR_A0] --; |
cpu->cd.mips.gpr[MIPS_GPR_A0] --; |
2019 |
|
|
2020 |
if (machine->boot_string_argument[0] != '\0') { |
if (machine->boot_string_argument[0] != '\0') { |
2021 |
strcat(bootarg, " "); |
strlcat(bootarg, " ", BOOTARG_BUFLEN); |
2022 |
strcat(bootarg, machine->boot_string_argument); |
if (strlcat(bootarg, machine->boot_string_argument, |
2023 |
|
BOOTARG_BUFLEN) >= BOOTARG_BUFLEN) { |
2024 |
|
fprintf(stderr, "bootstr truncated?\n"); |
2025 |
|
exit(1); |
2026 |
|
} |
2027 |
} |
} |
2028 |
|
|
2029 |
xx.a.common.next = (char *)&xx.b - (char *)&xx; |
xx.a.common.next = (char *)&xx.b - (char *)&xx; |
2032 |
|
|
2033 |
xx.b.common.next = (char *)&xx.c - (char *)&xx.b; |
xx.b.common.next = (char *)&xx.c - (char *)&xx.b; |
2034 |
xx.b.common.type = BTINFO_BOOTPATH; |
xx.b.common.type = BTINFO_BOOTPATH; |
2035 |
strcpy(xx.b.bootpath, bootstr); |
strlcpy(xx.b.bootpath, bootstr, sizeof(xx.b.bootpath)); |
2036 |
|
|
2037 |
xx.c.common.next = 0; |
xx.c.common.next = 0; |
2038 |
xx.c.common.type = BTINFO_SYMTAB; |
xx.c.common.type = BTINFO_SYMTAB; |
2073 |
*/ |
*/ |
2074 |
{ |
{ |
2075 |
char tmps[300]; |
char tmps[300]; |
2076 |
sprintf(tmps, "cca=%x", |
snprintf(tmps, sizeof(tmps), "cca=%x", |
2077 |
(int)(DEC_DECCCA_BASEADDR + 0xa0000000ULL)); |
(int)(DEC_DECCCA_BASEADDR + 0xa0000000ULL)); |
2078 |
add_environment_string(cpu, tmps, &addr); |
add_environment_string(cpu, tmps, &addr); |
2079 |
} |
} |
2080 |
|
|
2081 |
/* These are needed for Sprite to boot: */ |
/* These are needed for Sprite to boot: */ |
2082 |
{ |
{ |
2083 |
char tmps[300]; |
char tmps[500]; |
2084 |
|
|
2085 |
sprintf(tmps, "boot=%s", bootarg); |
snprintf(tmps, sizeof(tmps), "boot=%s", bootarg); |
2086 |
|
tmps[sizeof(tmps)-1] = '\0'; |
2087 |
add_environment_string(cpu, tmps, &addr); |
add_environment_string(cpu, tmps, &addr); |
2088 |
|
|
2089 |
sprintf(tmps, "bitmap=0x%x", (uint32_t)(( |
snprintf(tmps, sizeof(tmps), "bitmap=0x%x", (uint32_t)(( |
2090 |
DEC_MEMMAP_ADDR + sizeof(memmap.pagesize)) |
DEC_MEMMAP_ADDR + sizeof(memmap.pagesize)) |
2091 |
& 0xffffffffULL)); |
& 0xffffffffULL)); |
2092 |
|
tmps[sizeof(tmps)-1] = '\0'; |
2093 |
add_environment_string(cpu, tmps, &addr); |
add_environment_string(cpu, tmps, &addr); |
2094 |
|
|
2095 |
sprintf(tmps, "bitmaplen=0x%x", |
snprintf(tmps, sizeof(tmps), "bitmaplen=0x%x", |
2096 |
machine->physical_ram_in_mb * 1048576 / 4096 / 8); |
machine->physical_ram_in_mb * 1048576 / 4096 / 8); |
2097 |
|
tmps[sizeof(tmps)-1] = '\0'; |
2098 |
add_environment_string(cpu, tmps, &addr); |
add_environment_string(cpu, tmps, &addr); |
2099 |
} |
} |
2100 |
|
|
2134 |
*/ |
*/ |
2135 |
/* dev_XXX_init(cpu, mem, 0x10000000, machine->emulated_hz); */ |
/* dev_XXX_init(cpu, mem, 0x10000000, machine->emulated_hz); */ |
2136 |
dev_mc146818_init(machine, mem, 0x10000070, 0, MC146818_PC_CMOS, 4); |
dev_mc146818_init(machine, mem, 0x10000070, 0, MC146818_PC_CMOS, 4); |
2137 |
|
|
2138 |
machine->main_console_handle = dev_ns16550_init(machine, mem, |
machine->main_console_handle = dev_ns16550_init(machine, mem, |
2139 |
0x1c800000, 5, 1, 1, "serial console"); |
0x1c800000, 5, 1, 1, "serial console"); |
2140 |
|
|
2141 |
|
#if 0 |
2142 |
|
dev_ns16550_init(machine, mem, 0x1f000010, 0, 1, 1, |
2143 |
|
"other serial console"); |
2144 |
|
#endif |
2145 |
|
|
2146 |
/* |
/* |
2147 |
* According to NetBSD/cobalt: |
* According to NetBSD/cobalt: |
2148 |
* |
* |
2153 |
* pciide0 at pci0 dev 9 function 1: VIA Technologies VT82C586 (Apollo VP) ATA33 cr |
* pciide0 at pci0 dev 9 function 1: VIA Technologies VT82C586 (Apollo VP) ATA33 cr |
2154 |
* tlp1 at pci0 dev 12 function 0: DECchip 21143 Ethernet, pass 4.1 |
* tlp1 at pci0 dev 12 function 0: DECchip 21143 Ethernet, pass 4.1 |
2155 |
*/ |
*/ |
2156 |
pci_data = dev_gt_init(machine, mem, 0x14000000, 2, 6); /* 7 for PCI, not 6? */ |
pci_data = dev_gt_init(machine, mem, 0x14000000, 2, 6, 11); /* 7 for PCI, not 6? */ |
2157 |
/* bus_pci_add(machine, pci_data, mem, 0, 7, 0, pci_dec21143_init, pci_dec21143_rr); */ |
/* bus_pci_add(machine, pci_data, mem, 0, 7, 0, pci_dec21143_init, pci_dec21143_rr); */ |
2158 |
bus_pci_add(machine, pci_data, mem, 0, 8, 0, NULL, NULL); /* PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_860 */ |
bus_pci_add(machine, pci_data, mem, 0, 8, 0, NULL, NULL); /* PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_860 */ |
2159 |
bus_pci_add(machine, pci_data, mem, 0, 9, 0, pci_vt82c586_isa_init, pci_vt82c586_isa_rr); |
bus_pci_add(machine, pci_data, mem, 0, 9, 0, pci_vt82c586_isa_init, pci_vt82c586_isa_rr); |
2211 |
machine->main_console_handle = dev_ns16550_init( |
machine->main_console_handle = dev_ns16550_init( |
2212 |
machine, mem, 0xa008680, 0, 4, |
machine, mem, 0xa008680, 0, 4, |
2213 |
machine->use_x11? 0 : 1, "serial console"); /* TODO: irq? */ |
machine->use_x11? 0 : 1, "serial console"); /* TODO: irq? */ |
2214 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4131); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4131); |
2215 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2216 |
|
|
2217 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2242 |
machine->main_console_handle = dev_ns16550_init( |
machine->main_console_handle = dev_ns16550_init( |
2243 |
machine, mem, 0xa008680, 0, 4, |
machine, mem, 0xa008680, 0, 4, |
2244 |
machine->use_x11? 0 : 1, "serial console"); /* TODO: irq? */ |
machine->use_x11? 0 : 1, "serial console"); /* TODO: irq? */ |
2245 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2246 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2247 |
|
|
2248 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2270 |
hpcmips_fb_bits = 16; |
hpcmips_fb_bits = 16; |
2271 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2272 |
|
|
2273 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2274 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2275 |
|
|
2276 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2298 |
hpcmips_fb_bits = 16; |
hpcmips_fb_bits = 16; |
2299 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2300 |
|
|
2301 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2302 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2303 |
|
|
2304 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2326 |
hpcmips_fb_bits = 16; |
hpcmips_fb_bits = 16; |
2327 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2328 |
|
|
2329 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2330 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2331 |
|
|
2332 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2354 |
hpcmips_fb_bits = 16; |
hpcmips_fb_bits = 16; |
2355 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2356 |
|
|
2357 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2358 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2359 |
|
|
2360 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2382 |
hpcmips_fb_bits = 4; |
hpcmips_fb_bits = 4; |
2383 |
hpcmips_fb_encoding = BIFB_D4_M2L_F; |
hpcmips_fb_encoding = BIFB_D4_M2L_F; |
2384 |
|
|
2385 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4181); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4181); |
2386 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2387 |
|
|
2388 |
/* TODO: Hm... irq 17 according to linux, but |
/* TODO: Hm... irq 17 according to linux, but |
2423 |
hpcmips_fb_bits = 16; |
hpcmips_fb_bits = 16; |
2424 |
hpcmips_fb_encoding = BIFB_D16_0000; |
hpcmips_fb_encoding = BIFB_D16_0000; |
2425 |
|
|
2426 |
machine->vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
machine->md_int.vr41xx_data = dev_vr41xx_init(machine, mem, 4121); |
2427 |
machine->md_interrupt = vr41xx_interrupt; |
machine->md_interrupt = vr41xx_interrupt; |
2428 |
|
|
2429 |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
store_32bit_word_in_host(cpu, (unsigned char *)&hpc_bootinfo.platid_cpu, |
2446 |
|
|
2447 |
if (machine->use_x11) |
if (machine->use_x11) |
2448 |
machine->main_console_handle = |
machine->main_console_handle = |
2449 |
machine->vr41xx_data->kiu_console_handle; |
machine->md_int.vr41xx_data->kiu_console_handle; |
2450 |
|
|
2451 |
/* NetBSD/hpcmips and possibly others expects the following: */ |
/* NetBSD/hpcmips and possibly others expects the following: */ |
2452 |
|
|
2546 |
* ohci0: OHCI version 1.0 |
* ohci0: OHCI version 1.0 |
2547 |
*/ |
*/ |
2548 |
|
|
2549 |
|
machine->md_int.ps2_data = dev_ps2_stuff_init(machine, mem, 0x10000000); |
2550 |
device_add(machine, "ps2_gs addr=0x12000000"); |
device_add(machine, "ps2_gs addr=0x12000000"); |
2551 |
machine->ps2_data = dev_ps2_stuff_init(machine, mem, 0x10000000); |
device_add(machine, "ps2_ether addr=0x14001000"); |
|
dev_ps2_ohci_init(cpu, mem, 0x1f801600); |
|
2552 |
dev_ram_init(mem, 0x1c000000, 4 * 1048576, DEV_RAM_RAM, 0); /* TODO: how much? */ |
dev_ram_init(mem, 0x1c000000, 4 * 1048576, DEV_RAM_RAM, 0); /* TODO: how much? */ |
2553 |
|
/* irq = 8 + 32 + 1 (SBUS/USB) */ |
2554 |
|
device_add(machine, "ohci addr=0x1f801600 irq=41"); |
2555 |
|
|
2556 |
machine->md_interrupt = ps2_interrupt; |
machine->md_interrupt = ps2_interrupt; |
2557 |
|
|
2560 |
store_32bit_word(cpu, PLAYSTATION2_BDA + 0, PLAYSTATION2_SIFBIOS); |
store_32bit_word(cpu, PLAYSTATION2_BDA + 0, PLAYSTATION2_SIFBIOS); |
2561 |
store_buf(cpu, PLAYSTATION2_BDA + 4, "PS2b", 4); |
store_buf(cpu, PLAYSTATION2_BDA + 4, "PS2b", 4); |
2562 |
|
|
2563 |
#if 0 |
/* Set the Harddisk controller present flag, if either |
2564 |
/* Harddisk controller present flag: */ |
disk 0 or 1 is present: */ |
2565 |
store_32bit_word(cpu, 0xa0000000 + machine->physical_ram_in_mb*1048576 - 0x1000 + 0x0, 0x100); |
if (diskimage_exist(machine, 0, DISKIMAGE_IDE) || |
2566 |
dev_ps2_spd_init(machine, mem, 0x14000000); |
diskimage_exist(machine, 1, DISKIMAGE_IDE)) { |
2567 |
#endif |
store_32bit_word(cpu, 0xa0000000 + machine->physical_ram_in_mb*1048576 - 0x1000 + 0x0, 0x100); |
2568 |
|
dev_ps2_spd_init(machine, mem, 0x14000000); |
2569 |
|
} |
2570 |
|
|
2571 |
store_32bit_word(cpu, 0xa0000000 + machine->physical_ram_in_mb*1048576 - 0x1000 + 0x4, PLAYSTATION2_OPTARGS); |
store_32bit_word(cpu, 0xa0000000 + machine->physical_ram_in_mb*1048576 - 0x1000 + 0x4, PLAYSTATION2_OPTARGS); |
2572 |
bootstr = "root=/dev/hda1 crtmode=vesa0,60"; |
{ |
2573 |
store_string(cpu, PLAYSTATION2_OPTARGS, bootstr); |
int tmplen = 1000; |
2574 |
|
char *tmp = malloc(tmplen); |
2575 |
|
if (tmp == NULL) { |
2576 |
|
fprintf(stderr, "out of memory\n"); |
2577 |
|
exit(1); |
2578 |
|
} |
2579 |
|
|
2580 |
|
strlcpy(tmp, "root=/dev/hda1 crtmode=vesa0,60", tmplen); |
2581 |
|
|
2582 |
|
if (machine->boot_string_argument[0]) |
2583 |
|
snprintf(tmp+strlen(tmp), tmplen-strlen(tmp), |
2584 |
|
" %s", machine->boot_string_argument); |
2585 |
|
tmp[tmplen-1] = '\0'; |
2586 |
|
|
2587 |
|
bootstr = tmp; |
2588 |
|
store_string(cpu, PLAYSTATION2_OPTARGS, bootstr); |
2589 |
|
} |
2590 |
|
|
2591 |
/* TODO: netbsd's bootinfo.h, for symbolic names */ |
/* TODO: netbsd's bootinfo.h, for symbolic names */ |
2592 |
{ |
{ |
2606 |
} |
} |
2607 |
|
|
2608 |
/* "BOOTINFO_PCMCIA_TYPE" in NetBSD's bootinfo.h. This contains the sbus controller type. */ |
/* "BOOTINFO_PCMCIA_TYPE" in NetBSD's bootinfo.h. This contains the sbus controller type. */ |
2609 |
store_32bit_word(cpu, 0xa0000000 + machine->physical_ram_in_mb*1048576 - 0x1000 + 0x1c, 3); |
store_32bit_word(cpu, 0xa0000000 + machine->physical_ram_in_mb*1048576 - 0x1000 + 0x1c, 2); |
|
|
|
|
/* TODO: Is this necessary? */ |
|
|
cpu->cd.mips.gpr[MIPS_GPR_SP] = 0x80007f00; |
|
2610 |
|
|
2611 |
break; |
break; |
2612 |
|
|
2620 |
* detailed list of IP ("Inhouse Processor") model numbers. |
* detailed list of IP ("Inhouse Processor") model numbers. |
2621 |
* (Or http://hardware.majix.org/computers/sgi/iptable.shtml) |
* (Or http://hardware.majix.org/computers/sgi/iptable.shtml) |
2622 |
*/ |
*/ |
2623 |
machine->machine_name = malloc(500); |
machine->machine_name = malloc(MACHINE_NAME_MAXBUF); |
2624 |
if (machine->machine_name == NULL) { |
if (machine->machine_name == NULL) { |
2625 |
fprintf(stderr, "out of memory\n"); |
fprintf(stderr, "out of memory\n"); |
2626 |
exit(1); |
exit(1); |
2627 |
} |
} |
|
short_machine_name = malloc(500); |
|
|
if (short_machine_name == NULL) { |
|
|
fprintf(stderr, "out of memory\n"); |
|
|
exit(1); |
|
|
} |
|
2628 |
|
|
2629 |
if (machine->machine_type == MACHINE_SGI) { |
if (machine->machine_type == MACHINE_SGI) { |
2630 |
cpu->byte_order = EMUL_BIG_ENDIAN; |
cpu->byte_order = EMUL_BIG_ENDIAN; |
2631 |
sprintf(short_machine_name, "SGI-IP%i", machine->machine_subtype); |
snprintf(machine->machine_name, MACHINE_NAME_MAXBUF, |
2632 |
sprintf(machine->machine_name, "SGI-IP%i", machine->machine_subtype); |
"SGI-IP%i", machine->machine_subtype); |
|
|
|
|
/* Super-special case for IP24: */ |
|
|
if (machine->machine_subtype == 24) |
|
|
sprintf(short_machine_name, "SGI-IP22"); |
|
2633 |
|
|
2634 |
sgi_ram_offset = 1048576 * machine->memory_offset_in_mb; |
sgi_ram_offset = 1048576 * machine->memory_offset_in_mb; |
2635 |
|
|
2647 |
} |
} |
2648 |
} else { |
} else { |
2649 |
cpu->byte_order = EMUL_LITTLE_ENDIAN; |
cpu->byte_order = EMUL_LITTLE_ENDIAN; |
2650 |
sprintf(short_machine_name, "ARC"); |
snprintf(machine->machine_name, |
2651 |
sprintf(machine->machine_name, "ARC"); |
MACHINE_NAME_MAXBUF, "ARC"); |
2652 |
} |
} |
2653 |
|
|
2654 |
if (machine->machine_type == MACHINE_SGI) { |
if (machine->machine_type == MACHINE_SGI) { |
2655 |
/* TODO: Other SGI machine types? */ |
/* TODO: Other SGI machine types? */ |
2656 |
switch (machine->machine_subtype) { |
switch (machine->machine_subtype) { |
2657 |
case 12: |
case 12: |
2658 |
strcat(machine->machine_name, " (Iris Indigo IP12)"); |
strlcat(machine->machine_name, |
2659 |
|
" (Iris Indigo IP12)", MACHINE_NAME_MAXBUF); |
2660 |
|
|
2661 |
/* TODO */ |
/* TODO */ |
2662 |
/* 33 MHz R3000, according to http://www.irisindigo.com/ */ |
/* 33 MHz R3000, according to http://www.irisindigo.com/ */ |
2664 |
|
|
2665 |
break; |
break; |
2666 |
case 19: |
case 19: |
2667 |
strcat(machine->machine_name, " (Everest IP19)"); |
strlcat(machine->machine_name, |
2668 |
|
" (Everest IP19)", MACHINE_NAME_MAXBUF); |
2669 |
machine->main_console_handle = |
machine->main_console_handle = |
2670 |
dev_zs_init(machine, mem, 0x1fbd9830, 0, 1, "serial zs"); /* serial? netbsd? */ |
dev_zs_init(machine, mem, 0x1fbd9830, 0, 1, "serial zs"); /* serial? netbsd? */ |
2671 |
dev_scc_init(machine, mem, 0x10086000, 0, machine->use_x11, 0, 8); /* serial? irix? */ |
dev_scc_init(machine, mem, 0x10086000, 0, machine->use_x11, 0, 8); /* serial? irix? */ |
2685 |
|
|
2686 |
break; |
break; |
2687 |
case 20: |
case 20: |
2688 |
strcat(machine->machine_name, " (Indigo)"); |
strlcat(machine->machine_name, |
2689 |
|
" (Indigo)", MACHINE_NAME_MAXBUF); |
2690 |
|
|
2691 |
/* |
/* |
2692 |
* Guesses based on NetBSD 2.0 beta, 20040606. |
* Guesses based on NetBSD 2.0 beta, 20040606. |
2706 |
*/ |
*/ |
2707 |
|
|
2708 |
/* int0 at mainbus0 addr 0x1fb801c0 */ |
/* int0 at mainbus0 addr 0x1fb801c0 */ |
2709 |
machine->sgi_ip20_data = dev_sgi_ip20_init(cpu, mem, DEV_SGI_IP20_BASE); |
machine->md_int.sgi_ip20_data = dev_sgi_ip20_init(cpu, mem, DEV_SGI_IP20_BASE); |
2710 |
|
|
2711 |
/* imc0 at mainbus0 addr 0x1fa00000: revision 0: TODO (or in dev_sgi_ip20?) */ |
/* imc0 at mainbus0 addr 0x1fa00000: revision 0: TODO (or in dev_sgi_ip20?) */ |
2712 |
|
|
2731 |
|
|
2732 |
break; |
break; |
2733 |
case 21: |
case 21: |
2734 |
strcat(machine->machine_name, " (uknown SGI-IP21 ?)"); /* TODO */ |
strlcat(machine->machine_name, /* TODO */ |
2735 |
|
" (uknown SGI-IP21 ?)", MACHINE_NAME_MAXBUF); |
2736 |
/* NOTE: Special case for arc_wordlen: */ |
/* NOTE: Special case for arc_wordlen: */ |
2737 |
arc_wordlen = sizeof(uint64_t); |
arc_wordlen = sizeof(uint64_t); |
2738 |
|
|
2742 |
case 22: |
case 22: |
2743 |
case 24: |
case 24: |
2744 |
if (machine->machine_subtype == 22) { |
if (machine->machine_subtype == 22) { |
2745 |
strcat(machine->machine_name, " (Indy, Indigo2, Challenge S; Full-house)"); |
strlcat(machine->machine_name, |
2746 |
machine->sgi_ip22_data = dev_sgi_ip22_init(machine, mem, 0x1fbd9000, 0); |
" (Indy, Indigo2, Challenge S; Full-house)", |
2747 |
|
MACHINE_NAME_MAXBUF); |
2748 |
|
machine->md_int.sgi_ip22_data = dev_sgi_ip22_init(machine, mem, 0x1fbd9000, 0); |
2749 |
} else { |
} else { |
2750 |
strcat(machine->machine_name, " (Indy, Indigo2, Challenge S; Guiness)"); |
strlcat(machine->machine_name, |
2751 |
machine->sgi_ip22_data = dev_sgi_ip22_init(machine, mem, 0x1fbd9880, 1); |
" (Indy, Indigo2, Challenge S; Guiness)", |
2752 |
|
MACHINE_NAME_MAXBUF); |
2753 |
|
machine->md_int.sgi_ip22_data = dev_sgi_ip22_init(machine, mem, 0x1fbd9880, 1); |
2754 |
} |
} |
2755 |
|
|
2756 |
/* |
/* |
2793 |
|
|
2794 |
/* Not supported by NetBSD 1.6.2, but by 2.0_BETA: */ |
/* Not supported by NetBSD 1.6.2, but by 2.0_BETA: */ |
2795 |
j = dev_pckbc_init(machine, mem, 0x1fbd9840, PCKBC_8242, |
j = dev_pckbc_init(machine, mem, 0x1fbd9840, PCKBC_8242, |
2796 |
0, 0, machine->use_x11); /* TODO: irq numbers */ |
0, 0, machine->use_x11, 0); /* TODO: irq numbers */ |
2797 |
|
|
2798 |
if (machine->use_x11) |
if (machine->use_x11) |
2799 |
machine->main_console_handle = j; |
machine->main_console_handle = j; |
2822 |
case 25: |
case 25: |
2823 |
/* NOTE: Special case for arc_wordlen: */ |
/* NOTE: Special case for arc_wordlen: */ |
2824 |
arc_wordlen = sizeof(uint64_t); |
arc_wordlen = sizeof(uint64_t); |
2825 |
strcat(machine->machine_name, " (Everest IP25)"); |
strlcat(machine->machine_name, |
2826 |
|
" (Everest IP25)", MACHINE_NAME_MAXBUF); |
2827 |
|
|
2828 |
/* serial? irix? */ |
/* serial? irix? */ |
2829 |
dev_scc_init(machine, mem, |
dev_scc_init(machine, mem, |
2844 |
case 26: |
case 26: |
2845 |
/* NOTE: Special case for arc_wordlen: */ |
/* NOTE: Special case for arc_wordlen: */ |
2846 |
arc_wordlen = sizeof(uint64_t); |
arc_wordlen = sizeof(uint64_t); |
2847 |
strcat(machine->machine_name, |
strlcat(machine->machine_name, |
2848 |
" (uknown SGI-IP26 ?)"); /* TODO */ |
" (uknown SGI-IP26 ?)", |
2849 |
|
MACHINE_NAME_MAXBUF); /* TODO */ |
2850 |
machine->main_console_handle = |
machine->main_console_handle = |
2851 |
dev_zs_init(machine, mem, 0x1fbd9830, |
dev_zs_init(machine, mem, 0x1fbd9830, |
2852 |
0, 1, "zs console"); |
0, 1, "zs console"); |
2853 |
break; |
break; |
2854 |
case 27: |
case 27: |
2855 |
strcat(machine->machine_name, |
strlcat(machine->machine_name, |
2856 |
" (Origin 200/2000, Onyx2)"); |
" (Origin 200/2000, Onyx2)", |
2857 |
|
MACHINE_NAME_MAXBUF); |
2858 |
arc_wordlen = sizeof(uint64_t); |
arc_wordlen = sizeof(uint64_t); |
2859 |
/* 2 cpus per node */ |
/* 2 cpus per node */ |
2860 |
|
|
2865 |
case 28: |
case 28: |
2866 |
/* NOTE: Special case for arc_wordlen: */ |
/* NOTE: Special case for arc_wordlen: */ |
2867 |
arc_wordlen = sizeof(uint64_t); |
arc_wordlen = sizeof(uint64_t); |
2868 |
strcat(machine->machine_name, " (Impact Indigo2 ?)"); |
strlcat(machine->machine_name, |
2869 |
|
" (Impact Indigo2 ?)", MACHINE_NAME_MAXBUF); |
2870 |
|
|
2871 |
device_add(machine, "random addr=0x1fbe0000, len=1"); |
device_add(machine, "random addr=0x1fbe0000, len=1"); |
2872 |
|
|
2876 |
case 30: |
case 30: |
2877 |
/* NOTE: Special case for arc_wordlen: */ |
/* NOTE: Special case for arc_wordlen: */ |
2878 |
arc_wordlen = sizeof(uint64_t); |
arc_wordlen = sizeof(uint64_t); |
2879 |
strcat(machine->machine_name, " (Octane)"); |
strlcat(machine->machine_name, |
2880 |
|
" (Octane)", MACHINE_NAME_MAXBUF); |
2881 |
|
|
2882 |
machine->sgi_ip30_data = dev_sgi_ip30_init(machine, mem, 0x0ff00000); |
machine->md_int.sgi_ip30_data = dev_sgi_ip30_init(machine, mem, 0x0ff00000); |
2883 |
machine->md_interrupt = sgi_ip30_interrupt; |
machine->md_interrupt = sgi_ip30_interrupt; |
2884 |
|
|
2885 |
dev_ram_init(mem, 0xa0000000ULL, |
dev_ram_init(mem, 0xa0000000ULL, |
2911 |
|
|
2912 |
break; |
break; |
2913 |
case 32: |
case 32: |
2914 |
strcat(machine->machine_name, " (O2)"); |
strlcat(machine->machine_name, |
2915 |
|
" (O2)", MACHINE_NAME_MAXBUF); |
2916 |
|
|
2917 |
/* TODO: Find out where the physical ram is actually located. */ |
/* TODO: Find out where the physical ram is actually located. */ |
2918 |
dev_ram_init(mem, 0x07ffff00ULL, 256, DEV_RAM_MIRROR, 0x03ffff00); |
dev_ram_init(mem, 0x07ffff00ULL, 256, DEV_RAM_MIRROR, 0x03ffff00); |
2923 |
dev_ram_init(mem, 0x20000000ULL, 128 * 1048576, DEV_RAM_MIRROR, 0x00000000); |
dev_ram_init(mem, 0x20000000ULL, 128 * 1048576, DEV_RAM_MIRROR, 0x00000000); |
2924 |
dev_ram_init(mem, 0x40000000ULL, 128 * 1048576, DEV_RAM_MIRROR, 0x10000000); |
dev_ram_init(mem, 0x40000000ULL, 128 * 1048576, DEV_RAM_MIRROR, 0x10000000); |
2925 |
|
|
2926 |
machine->crime_data = dev_crime_init(machine, mem, 0x14000000, 2, machine->use_x11); /* crime0 */ |
machine->md_int.ip32.crime_data = dev_crime_init(machine, mem, 0x14000000, 2, machine->use_x11); /* crime0 */ |
2927 |
dev_sgi_mte_init(mem, 0x15000000); /* mte ??? memory thing */ |
dev_sgi_mte_init(mem, 0x15000000); /* mte ??? memory thing */ |
2928 |
dev_sgi_gbe_init(machine, mem, 0x16000000); /* gbe? framebuffer? */ |
dev_sgi_gbe_init(machine, mem, 0x16000000); /* gbe? framebuffer? */ |
2929 |
|
|
2950 |
* 1f3a0000 mcclock0 |
* 1f3a0000 mcclock0 |
2951 |
*/ |
*/ |
2952 |
|
|
2953 |
machine->mace_data = dev_mace_init(mem, 0x1f310000, 2); |
machine->md_int.ip32.mace_data = dev_mace_init(mem, 0x1f310000, 2); |
2954 |
machine->md_interrupt = sgi_ip32_interrupt; |
machine->md_interrupt = sgi_ip32_interrupt; |
2955 |
|
|
2956 |
/* |
/* |
2967 |
* intr 7 = MACE_PCI_BRIDGE |
* intr 7 = MACE_PCI_BRIDGE |
2968 |
*/ |
*/ |
2969 |
|
|
2970 |
|
#if 0 |
2971 |
i = dev_pckbc_init(machine, mem, 0x1f320000, |
i = dev_pckbc_init(machine, mem, 0x1f320000, |
2972 |
PCKBC_8242, 0x200 + MACE_PERIPH_MISC, |
PCKBC_8242, 0x200 + MACE_PERIPH_MISC, |
2973 |
0x800 + MACE_PERIPH_MISC, machine->use_x11); |
0x800 + MACE_PERIPH_MISC, machine->use_x11, 0); |
2974 |
/* keyb+mouse (mace irq numbers) */ |
/* keyb+mouse (mace irq numbers) */ |
2975 |
|
#endif |
2976 |
|
|
2977 |
net_generate_unique_mac(machine, macaddr); |
net_generate_unique_mac(machine, macaddr); |
2978 |
eaddr_string = malloc(30); |
eaddr_string = malloc(ETHERNET_STRING_MAXLEN); |
2979 |
if (eaddr_string == NULL) { |
if (eaddr_string == NULL) { |
2980 |
fprintf(stderr, "out of memory\n"); |
fprintf(stderr, "out of memory\n"); |
2981 |
exit(1); |
exit(1); |
2982 |
} |
} |
2983 |
sprintf(eaddr_string, "eaddr=%02x:%02x:" |
snprintf(eaddr_string, ETHERNET_STRING_MAXLEN, |
2984 |
"%02x:%02x:%02x:%02x", |
"eaddr=%02x:%02x:%02x:%02x:%02x:%02x", |
2985 |
macaddr[0], macaddr[1], macaddr[2], |
macaddr[0], macaddr[1], macaddr[2], |
2986 |
macaddr[3], macaddr[4], macaddr[5]); |
macaddr[3], macaddr[4], macaddr[5]); |
2987 |
dev_sgi_mec_init(machine, mem, 0x1f280000, MACE_ETHERNET, macaddr); |
dev_sgi_mec_init(machine, mem, 0x1f280000, |
2988 |
|
MACE_ETHERNET, macaddr); |
2989 |
|
|
2990 |
dev_sgi_ust_init(mem, 0x1f340000); /* ust? */ |
dev_sgi_ust_init(mem, 0x1f340000); /* ust? */ |
2991 |
|
|
2996 |
(1<<26) + MACE_PERIPH_SERIAL, 0x100, |
(1<<26) + MACE_PERIPH_SERIAL, 0x100, |
2997 |
0, "serial 1"); /* com1 */ |
0, "serial 1"); /* com1 */ |
2998 |
|
|
2999 |
|
#if 0 |
3000 |
if (machine->use_x11) |
if (machine->use_x11) |
3001 |
machine->main_console_handle = i; |
machine->main_console_handle = i; |
3002 |
else |
else |
3003 |
|
#endif |
3004 |
machine->main_console_handle = j; |
machine->main_console_handle = j; |
3005 |
|
|
3006 |
dev_mc146818_init(machine, mem, 0x1f3a0000, (1<<8) + MACE_PERIPH_MISC, MC146818_SGI, 0x40); /* mcclock0 */ |
dev_mc146818_init(machine, mem, 0x1f3a0000, (1<<8) + MACE_PERIPH_MISC, MC146818_SGI, 0x40); /* mcclock0 */ |
3016 |
|
|
3017 |
pci_data = dev_macepci_init(mem, 0x1f080000, MACE_PCI_BRIDGE); /* macepci0 */ |
pci_data = dev_macepci_init(mem, 0x1f080000, MACE_PCI_BRIDGE); /* macepci0 */ |
3018 |
/* bus_pci_add(machine, pci_data, mem, 0, 0, 0, pci_ne2000_init, pci_ne2000_rr); TODO */ |
/* bus_pci_add(machine, pci_data, mem, 0, 0, 0, pci_ne2000_init, pci_ne2000_rr); TODO */ |
3019 |
#if 1 |
|
3020 |
bus_pci_add(machine, pci_data, mem, 0, 1, 0, pci_ahc_init, pci_ahc_rr); |
/* TODO: make this nicer */ |
3021 |
#endif |
if (diskimage_exist(machine, 0, DISKIMAGE_SCSI) || |
3022 |
|
diskimage_exist(machine, 1, DISKIMAGE_SCSI) || |
3023 |
|
diskimage_exist(machine, 2, DISKIMAGE_SCSI) || |
3024 |
|
diskimage_exist(machine, 3, DISKIMAGE_SCSI) || |
3025 |
|
diskimage_exist(machine, 4, DISKIMAGE_SCSI) || |
3026 |
|
diskimage_exist(machine, 5, DISKIMAGE_SCSI) || |
3027 |
|
diskimage_exist(machine, 6, DISKIMAGE_SCSI) || |
3028 |
|
diskimage_exist(machine, 7, DISKIMAGE_SCSI)) |
3029 |
|
bus_pci_add(machine, pci_data, mem, 0, 1, 0, pci_ahc_init, pci_ahc_rr); |
3030 |
|
|
3031 |
|
/* TODO: second ahc */ |
3032 |
/* bus_pci_add(machine, pci_data, mem, 0, 2, 0, pci_ahc_init, pci_ahc_rr); */ |
/* bus_pci_add(machine, pci_data, mem, 0, 2, 0, pci_ahc_init, pci_ahc_rr); */ |
3033 |
|
|
3034 |
break; |
break; |
3035 |
case 35: |
case 35: |
3036 |
strcat(machine->machine_name, " (Origin 3000)"); |
strlcat(machine->machine_name, |
3037 |
|
" (Origin 3000)", MACHINE_NAME_MAXBUF); |
3038 |
/* 4 cpus per node */ |
/* 4 cpus per node */ |
3039 |
|
|
3040 |
machine->main_console_handle = |
machine->main_console_handle = |
3042 |
0, 1, "zs console"); |
0, 1, "zs console"); |
3043 |
break; |
break; |
3044 |
case 53: |
case 53: |
3045 |
strcat(machine->machine_name, " (Origin 350)"); |
strlcat(machine->machine_name, |
3046 |
|
" (Origin 350)", MACHINE_NAME_MAXBUF); |
3047 |
/* |
/* |
3048 |
* According to http://kumba.drachentekh.net/xml/myguide.html |
* According to http://kumba.drachentekh.net/xml/myguide.html |
3049 |
* Origin 350, Tezro IP53 R16000 |
* Origin 350, Tezro IP53 R16000 |
3070 |
|
|
3071 |
switch (machine->machine_subtype) { |
switch (machine->machine_subtype) { |
3072 |
case MACHINE_ARC_NEC_RD94: |
case MACHINE_ARC_NEC_RD94: |
3073 |
strcat(machine->machine_name, " (NEC-RD94, NEC RISCstation 2250)"); |
strlcat(machine->machine_name, |
3074 |
|
" (NEC-RD94, NEC RISCstation 2250)", |
3075 |
|
MACHINE_NAME_MAXBUF); |
3076 |
break; |
break; |
3077 |
case MACHINE_ARC_NEC_R94: |
case MACHINE_ARC_NEC_R94: |
3078 |
strcat(machine->machine_name, " (NEC-R94; NEC RISCstation 2200)"); |
strlcat(machine->machine_name, " (NEC-R94; NEC RISCstation 2200)", |
3079 |
|
MACHINE_NAME_MAXBUF); |
3080 |
break; |
break; |
3081 |
case MACHINE_ARC_NEC_R96: |
case MACHINE_ARC_NEC_R96: |
3082 |
strcat(machine->machine_name, " (NEC-R96; NEC Express RISCserver)"); |
strlcat(machine->machine_name, " (NEC-R96; NEC Express RISCserver)", |
3083 |
|
MACHINE_NAME_MAXBUF); |
3084 |
break; |
break; |
3085 |
} |
} |
3086 |
|
|
3091 |
|
|
3092 |
device_add(machine, "sn addr=0x80001000 irq=0"); |
device_add(machine, "sn addr=0x80001000 irq=0"); |
3093 |
dev_mc146818_init(machine, mem, 0x80004000ULL, 0, MC146818_ARC_NEC, 1); |
dev_mc146818_init(machine, mem, 0x80004000ULL, 0, MC146818_ARC_NEC, 1); |
3094 |
i = dev_pckbc_init(machine, mem, 0x80005000ULL, PCKBC_8042, 0, 0, machine->use_x11); |
i = dev_pckbc_init(machine, mem, 0x80005000ULL, PCKBC_8042, 0, 0, machine->use_x11, 0); |
3095 |
j = dev_ns16550_init(machine, mem, 0x80006000ULL, |
j = dev_ns16550_init(machine, mem, 0x80006000ULL, |
3096 |
3, 1, machine->use_x11? 0 : 1, "serial 0"); /* com0 */ |
3, 1, machine->use_x11? 0 : 1, "serial 0"); /* com0 */ |
3097 |
dev_ns16550_init(machine, mem, 0x80007000ULL, |
dev_ns16550_init(machine, mem, 0x80007000ULL, |
3134 |
* Parallel at "start: 0x 0 18c10278, length: 0x1000, level: 5, vector: 5" |
* Parallel at "start: 0x 0 18c10278, length: 0x1000, level: 5, vector: 5" |
3135 |
*/ |
*/ |
3136 |
|
|
3137 |
strcat(machine->machine_name, " (NEC-R98; NEC RISCserver 4200)"); |
strlcat(machine->machine_name, |
3138 |
|
" (NEC-R98; NEC RISCserver 4200)", |
3139 |
|
MACHINE_NAME_MAXBUF); |
3140 |
|
|
3141 |
/* |
/* |
3142 |
* Windows NT access stuff at these addresses: |
* Windows NT access stuff at these addresses: |
3192 |
|
|
3193 |
switch (machine->machine_subtype) { |
switch (machine->machine_subtype) { |
3194 |
case MACHINE_ARC_JAZZ_PICA: |
case MACHINE_ARC_JAZZ_PICA: |
3195 |
strcat(machine->machine_name, " (Microsoft Jazz, Acer PICA-61)"); |
strlcat(machine->machine_name, " (Microsoft Jazz, Acer PICA-61)", |
3196 |
|
MACHINE_NAME_MAXBUF); |
3197 |
break; |
break; |
3198 |
case MACHINE_ARC_JAZZ_MAGNUM: |
case MACHINE_ARC_JAZZ_MAGNUM: |
3199 |
strcat(machine->machine_name, " (Microsoft Jazz, MIPS Magnum)"); |
strlcat(machine->machine_name, " (Microsoft Jazz, MIPS Magnum)", |
3200 |
|
MACHINE_NAME_MAXBUF); |
3201 |
break; |
break; |
3202 |
default: |
default: |
3203 |
fatal("error in machine.c. jazz\n"); |
fatal("error in machine.c. jazz\n"); |
3204 |
exit(1); |
exit(1); |
3205 |
} |
} |
3206 |
|
|
3207 |
machine->jazz_data = device_add(machine, |
machine->md_int.jazz_data = device_add(machine, |
3208 |
"jazz addr=0x80000000"); |
"jazz addr=0x80000000"); |
3209 |
machine->md_interrupt = jazz_interrupt; |
machine->md_interrupt = jazz_interrupt; |
3210 |
|
|
3211 |
|
i = dev_pckbc_init(machine, mem, 0x80005000ULL, |
3212 |
|
PCKBC_JAZZ, 8 + 6, 8 + 7, machine->use_x11, 0); |
3213 |
|
|
3214 |
|
j = dev_ns16550_init(machine, mem, |
3215 |
|
0x80006000ULL, 8 + 8, 1, |
3216 |
|
machine->use_x11? 0 : 1, "serial 0"); |
3217 |
|
dev_ns16550_init(machine, mem, |
3218 |
|
0x80007000ULL, 8 + 9, 1, 0, "serial 1"); |
3219 |
|
|
3220 |
|
if (machine->use_x11) |
3221 |
|
machine->main_console_handle = i; |
3222 |
|
else |
3223 |
|
machine->main_console_handle = j; |
3224 |
|
|
3225 |
switch (machine->machine_subtype) { |
switch (machine->machine_subtype) { |
3226 |
case MACHINE_ARC_JAZZ_PICA: |
case MACHINE_ARC_JAZZ_PICA: |
3227 |
dev_vga_init(machine, mem, |
if (machine->use_x11) { |
3228 |
0x400b8000ULL, 0x600003c0ULL, |
dev_vga_init(machine, mem, |
3229 |
ARC_CONSOLE_MAX_X, ARC_CONSOLE_MAX_Y, machine->machine_name); |
0x400a0000ULL, 0x600003c0ULL, |
3230 |
arcbios_console_init(cpu, 0x400b8000ULL, |
machine->machine_name); |
3231 |
0x600003c0ULL, ARC_CONSOLE_MAX_X, |
arcbios_console_init(machine, |
3232 |
ARC_CONSOLE_MAX_Y); |
0x400b8000ULL, 0x600003c0ULL); |
3233 |
|
} |
3234 |
break; |
break; |
3235 |
case MACHINE_ARC_JAZZ_MAGNUM: |
case MACHINE_ARC_JAZZ_MAGNUM: |
3236 |
/* PROM mirror? */ |
/* PROM mirror? */ |
3250 |
|
|
3251 |
dev_asc_init(machine, mem, |
dev_asc_init(machine, mem, |
3252 |
0x80002000ULL, 8 + 5, NULL, DEV_ASC_PICA, |
0x80002000ULL, 8 + 5, NULL, DEV_ASC_PICA, |
3253 |
dev_jazz_dma_controller, machine->jazz_data); |
dev_jazz_dma_controller, |
3254 |
|
machine->md_int.jazz_data); |
3255 |
|
|
3256 |
device_add(machine, "fdc addr=0x80003000, irq=0"); |
device_add(machine, "fdc addr=0x80003000, irq=0"); |
3257 |
|
|
3258 |
dev_mc146818_init(machine, mem, |
dev_mc146818_init(machine, mem, |
3259 |
0x80004000ULL, 2, MC146818_ARC_JAZZ, 1); |
0x80004000ULL, 2, MC146818_ARC_JAZZ, 1); |
3260 |
|
|
|
i = dev_pckbc_init(machine, mem, 0x80005000ULL, |
|
|
PCKBC_JAZZ, 8 + 6, 8 + 7, machine->use_x11); |
|
|
|
|
|
j = dev_ns16550_init(machine, mem, |
|
|
0x80006000ULL, 8 + 8, 1, |
|
|
machine->use_x11? 0 : 1, "serial 0"); |
|
|
dev_ns16550_init(machine, mem, |
|
|
0x80007000ULL, 8 + 9, 1, 0, "serial 1"); |
|
|
|
|
|
if (machine->use_x11) |
|
|
machine->main_console_handle = i; |
|
|
else |
|
|
machine->main_console_handle = j; |
|
|
|
|
3261 |
#if 0 |
#if 0 |
3262 |
Not yet. |
Not yet. |
3263 |
dev_wdc_init(machine, mem, 0x900001f0ULL, 8+16 + 14, 0); |
dev_wdc_init(machine, mem, 0x900001f0ULL, 8+16 + 14, 0); |
3275 |
* See http://mail-index.netbsd.org/port-arc/2000/10/18/0001.html. |
* See http://mail-index.netbsd.org/port-arc/2000/10/18/0001.html. |
3276 |
*/ |
*/ |
3277 |
|
|
3278 |
strcat(machine->machine_name, " (Microsoft Jazz, Olivetti M700)"); |
strlcat(machine->machine_name, " (Microsoft Jazz, Olivetti M700)", |
3279 |
|
MACHINE_NAME_MAXBUF); |
3280 |
|
|
3281 |
machine->jazz_data = device_add(machine, |
machine->md_int.jazz_data = device_add(machine, |
3282 |
"jazz addr=0x80000000"); |
"jazz addr=0x80000000"); |
3283 |
machine->md_interrupt = jazz_interrupt; |
machine->md_interrupt = jazz_interrupt; |
3284 |
|
|
3288 |
i = 0; /* TODO: Yuck! */ |
i = 0; /* TODO: Yuck! */ |
3289 |
#if 0 |
#if 0 |
3290 |
i = dev_pckbc_init(machine, mem, 0x80005000ULL, |
i = dev_pckbc_init(machine, mem, 0x80005000ULL, |
3291 |
PCKBC_JAZZ, 8 + 6, 8 + 7, machine->use_x11); |
PCKBC_JAZZ, 8 + 6, 8 + 7, machine->use_x11, 0); |
3292 |
#endif |
#endif |
3293 |
j = dev_ns16550_init(machine, mem, |
j = dev_ns16550_init(machine, mem, |
3294 |
0x80006000ULL, 8 + 8, 1, |
0x80006000ULL, 8 + 8, 1, |
3314 |
* http://mail-index.netbsd.org/port-arc/2000/10/14/0000.html |
* http://mail-index.netbsd.org/port-arc/2000/10/14/0000.html |
3315 |
*/ |
*/ |
3316 |
|
|
3317 |
strcat(machine->machine_name, " (Deskstation Tyne)"); |
strlcat(machine->machine_name, " (Deskstation Tyne)", |
3318 |
|
MACHINE_NAME_MAXBUF); |
|
dev_vga_init(machine, mem, 0x1000b8000ULL, 0x9000003c0ULL, |
|
|
ARC_CONSOLE_MAX_X, ARC_CONSOLE_MAX_Y, machine->machine_name); |
|
|
|
|
|
arcbios_console_init(cpu, 0x1000b8000ULL, |
|
|
0x9000003c0ULL, ARC_CONSOLE_MAX_X, |
|
|
ARC_CONSOLE_MAX_Y); |
|
3319 |
|
|
3320 |
i = dev_ns16550_init(machine, mem, 0x9000003f8ULL, 0, 1, machine->use_x11? 0 : 1, "serial 0"); |
i = dev_ns16550_init(machine, mem, 0x9000003f8ULL, 0, 1, machine->use_x11? 0 : 1, "serial 0"); |
3321 |
dev_ns16550_init(machine, mem, 0x9000002f8ULL, 0, 1, 0, "serial 1"); |
dev_ns16550_init(machine, mem, 0x9000002f8ULL, 0, 1, 0, "serial 1"); |
3331 |
#endif |
#endif |
3332 |
/* PC kbd */ |
/* PC kbd */ |
3333 |
j = dev_pckbc_init(machine, mem, 0x900000060ULL, |
j = dev_pckbc_init(machine, mem, 0x900000060ULL, |
3334 |
PCKBC_8042, 0, 0, machine->use_x11); |
PCKBC_8042, 0, 0, machine->use_x11, 0); |
3335 |
|
|
3336 |
if (machine->use_x11) |
if (machine->use_x11) |
3337 |
machine->main_console_handle = j; |
machine->main_console_handle = j; |
3338 |
else |
else |
3339 |
machine->main_console_handle = i; |
machine->main_console_handle = i; |
3340 |
|
|
3341 |
|
if (machine->use_x11) { |
3342 |
|
dev_vga_init(machine, mem, 0x1000a0000ULL, |
3343 |
|
0x9000003c0ULL, machine->machine_name); |
3344 |
|
|
3345 |
|
arcbios_console_init(machine, |
3346 |
|
0x1000b8000ULL, 0x9000003c0ULL); |
3347 |
|
} |
3348 |
break; |
break; |
3349 |
|
|
3350 |
default: |
default: |
3354 |
} |
} |
3355 |
} |
} |
3356 |
|
|
|
|
|
|
if (!machine->prom_emulation) |
|
|
goto no_arc_prom_emulation; /* TODO: ugly */ |
|
|
|
|
|
|
|
3357 |
/* |
/* |
3358 |
* This is important: :-) |
* This is important: :-) |
3359 |
* |
* |
3360 |
* TODO: There should not be any use of |
* TODO: There should not be any use of ARCBIOS before this |
3361 |
* ARCBIOS before this statement. |
* point. |
|
*/ |
|
|
if (arc_wordlen == sizeof(uint64_t)) |
|
|
arcbios_set_64bit_mode(1); |
|
|
|
|
|
if (machine->physical_ram_in_mb < 16) |
|
|
fprintf(stderr, "WARNING! The ARC platform specification doesn't allow less than 16 MB of RAM. Continuing anyway.\n"); |
|
|
|
|
|
arcbios_set_default_exception_handler(cpu); |
|
|
|
|
|
memset(&arcbios_sysid, 0, sizeof(arcbios_sysid)); |
|
|
if (machine->machine_type == MACHINE_SGI) { |
|
|
/* Vendor ID, max 8 chars: */ |
|
|
strncpy(arcbios_sysid.VendorId, "SGI", 3); |
|
|
switch (machine->machine_subtype) { |
|
|
case 22: |
|
|
strncpy(arcbios_sysid.ProductId, |
|
|
"87654321", 8); /* some kind of ID? */ |
|
|
break; |
|
|
case 32: |
|
|
strncpy(arcbios_sysid.ProductId, "8", 1); |
|
|
/* 6 or 8 (?) */ |
|
|
break; |
|
|
default: |
|
|
snprintf(arcbios_sysid.ProductId, 8, "IP%i", |
|
|
machine->machine_subtype); |
|
|
} |
|
|
} else { |
|
|
switch (machine->machine_subtype) { |
|
|
case MACHINE_ARC_NEC_RD94: |
|
|
strncpy(arcbios_sysid.VendorId, "NEC W&S", 8); /* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "RD94", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R94: |
|
|
strncpy(arcbios_sysid.VendorId, "NEC W&S", 8); /* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "ijkl", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R96: |
|
|
strncpy(arcbios_sysid.VendorId, "MIPS DUO", 8); /* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "blahblah", 8); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R98: |
|
|
strncpy(arcbios_sysid.VendorId, "NEC W&S", 8); /* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "R98", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_PICA: |
|
|
strncpy(arcbios_sysid.VendorId, "MIPS MAG", 8);/* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "ijkl", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_MAGNUM: |
|
|
strncpy(arcbios_sysid.VendorId, "MIPS MAG", 8);/* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "ijkl", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_M700: |
|
|
strncpy(arcbios_sysid.VendorId, "OLI00000", 8);/* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "ijkl", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
case MACHINE_ARC_DESKTECH_TYNE: |
|
|
strncpy(arcbios_sysid.VendorId, "DESKTECH", 8);/* NOTE: max 8 chars */ |
|
|
strncpy(arcbios_sysid.ProductId, "ijkl", 4); /* NOTE: max 8 chars */ |
|
|
break; |
|
|
default: |
|
|
fatal("error in machine.c sysid\n"); |
|
|
exit(1); |
|
|
} |
|
|
} |
|
|
store_buf(cpu, SGI_SYSID_ADDR, (char *)&arcbios_sysid, sizeof(arcbios_sysid)); |
|
|
|
|
|
arcbios_get_dsp_stat(cpu, &arcbios_dsp_stat); |
|
|
store_buf(cpu, ARC_DSPSTAT_ADDR, (char *)&arcbios_dsp_stat, sizeof(arcbios_dsp_stat)); |
|
|
|
|
|
/* |
|
|
* The first 12 MBs of RAM are simply reserved... this simplifies things a lot. |
|
|
* If there's more than 512MB of RAM, it has to be split in two, according to |
|
|
* the ARC spec. This code creates a number of chunks of at most 512MB each. |
|
|
* |
|
|
* NOTE: The region of physical address space between 0x10000000 and 0x1fffffff |
|
|
* (256 - 512 MB) is usually occupied by memory mapped devices, so that portion is "lost". |
|
|
*/ |
|
|
|
|
|
arc_reserved = 0x2000; |
|
|
if (machine->machine_type == MACHINE_SGI) |
|
|
arc_reserved = 0x4000; |
|
|
|
|
|
arcbios_add_memory_descriptor(cpu, 0, arc_reserved, ARCBIOS_MEM_FirmwarePermanent); |
|
|
arcbios_add_memory_descriptor(cpu, sgi_ram_offset + arc_reserved, 0x60000-arc_reserved, ARCBIOS_MEM_FirmwareTemporary); |
|
|
|
|
|
mem_base = 12; |
|
|
mem_base += sgi_ram_offset / 1048576; |
|
|
|
|
|
while (mem_base < machine->physical_ram_in_mb + sgi_ram_offset/1048576) { |
|
|
mem_count = machine->physical_ram_in_mb + sgi_ram_offset/1048576 |
|
|
- mem_base; |
|
|
|
|
|
/* Skip the 256-512MB region (for devices) */ |
|
|
if (mem_base < 256 && mem_base + mem_count > 256) { |
|
|
mem_count = 256-mem_base; |
|
|
} |
|
|
|
|
|
/* At most 512MB per descriptor (at least the first 512MB |
|
|
must be separated this way, according to the ARC spec) */ |
|
|
if (mem_count > 512) |
|
|
mem_count = 512; |
|
|
|
|
|
arcbios_add_memory_descriptor(cpu, mem_base * 1048576, |
|
|
mem_count * 1048576, ARCBIOS_MEM_FreeMemory); |
|
|
|
|
|
mem_base += mem_count; |
|
|
|
|
|
/* Skip the devices: */ |
|
|
if (mem_base == 256) |
|
|
mem_base = 512; |
|
|
} |
|
|
|
|
|
|
|
|
/* |
|
|
* Components: (this is an example of what a system could look like) |
|
|
* |
|
|
* [System] |
|
|
* [CPU] (one for each cpu) |
|
|
* [FPU] (one for each cpu) |
|
|
* [CPU Caches] |
|
|
* [Memory] |
|
|
* [Ethernet] |
|
|
* [Serial] |
|
|
* [SCSI] |
|
|
* [Disk] |
|
|
* |
|
|
* Here's a good list of what hardware is in different IP-models: |
|
|
* http://www.linux-mips.org/archives/linux-mips/2001-03/msg00101.html |
|
|
*/ |
|
|
|
|
|
if (machine->machine_name == NULL) |
|
|
fatal("ERROR: machine_name == NULL\n"); |
|
|
if (short_machine_name == NULL) |
|
|
fatal("ERROR: short_machine_name == NULL\n"); |
|
|
|
|
|
switch (machine->machine_type) { |
|
|
case MACHINE_SGI: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, short_machine_name, 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
default: |
|
|
/* ARC: */ |
|
|
switch (machine->machine_subtype) { |
|
|
case MACHINE_ARC_NEC_RD94: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "NEC-RD94", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R94: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "NEC-R94", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R96: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "NEC-R96", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R98: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "NEC-R98", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_PICA: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "PICA-61", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_MAGNUM: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "Microsoft-Jazz", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_M700: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "Microsoft-Jazz", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_DESKTECH_TYNE: |
|
|
system = arcbios_addchild_manual(cpu, COMPONENT_CLASS_SystemClass, COMPONENT_TYPE_ARC, |
|
|
0, 1, 2, 0, 0xffffffff, "DESKTECH-TYNE", 0 /* ROOT */ , NULL, 0); |
|
|
break; |
|
|
default: |
|
|
fatal("Unimplemented ARC machine type %i\n", |
|
|
machine->machine_subtype); |
|
|
exit(1); |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
/* |
|
|
* Common stuff for both SGI and ARC: |
|
3362 |
*/ |
*/ |
|
debug("ARC system @ 0x%llx\n", (long long)system); |
|
|
|
|
|
for (i=0; i<machine->ncpus; i++) { |
|
|
uint64_t cpuaddr, fpu=0, picache, pdcache, sdcache=0; |
|
|
int cache_size, cache_line_size; |
|
|
unsigned int jj; |
|
|
char arc_cpu_name[100]; |
|
|
char arc_fpc_name[105]; |
|
|
|
|
|
snprintf(arc_cpu_name, sizeof(arc_cpu_name), |
|
|
"MIPS-%s", machine->cpu_name); |
|
|
|
|
|
if (machine->machine_type == MACHINE_ARC && |
|
|
machine->machine_subtype == MACHINE_ARC_NEC_R96) |
|
|
snprintf(arc_cpu_name, sizeof(arc_cpu_name), |
|
|
"MIPS-%s - Pr 4/5.0, Fp 5/0", |
|
|
machine->cpu_name); |
|
|
|
|
|
arc_cpu_name[sizeof(arc_cpu_name)-1] = 0; |
|
|
for (jj=0; jj<strlen(arc_cpu_name); jj++) |
|
|
if (arc_cpu_name[jj] >= 'a' && arc_cpu_name[jj] <= 'z') |
|
|
arc_cpu_name[jj] += ('A' - 'a'); |
|
|
|
|
|
strcpy(arc_fpc_name, arc_cpu_name); |
|
|
strcat(arc_fpc_name, "FPC"); |
|
|
|
|
|
cpuaddr = arcbios_addchild_manual(cpu, COMPONENT_CLASS_ProcessorClass, COMPONENT_TYPE_CPU, |
|
|
0, 1, 2, i, 0xffffffff, arc_cpu_name, system, NULL, 0); |
|
|
|
|
|
/* |
|
|
* TODO: This was in the ARC specs, but it isn't |
|
|
* really used by ARC implementations? |
|
|
* At least SGI-IP32 uses it. |
|
|
*/ |
|
|
if (machine->machine_type == MACHINE_SGI) |
|
|
fpu = arcbios_addchild_manual(cpu, COMPONENT_CLASS_ProcessorClass, COMPONENT_TYPE_FPU, |
|
|
0, 1, 2, 0, 0xffffffff, arc_fpc_name, cpuaddr, NULL, 0); |
|
|
|
|
|
cache_size = DEFAULT_PCACHE_SIZE - 12; |
|
|
if (machine->cache_picache) |
|
|
cache_size = machine->cache_picache - 12; |
|
|
if (cache_size < 0) |
|
|
cache_size = 0; |
|
|
|
|
|
cache_line_size = DEFAULT_PCACHE_LINESIZE; |
|
|
if (machine->cache_picache_linesize) |
|
|
cache_line_size = machine->cache_picache_linesize; |
|
|
if (cache_line_size < 0) |
|
|
cache_line_size = 0; |
|
|
|
|
|
picache = arcbios_addchild_manual(cpu, COMPONENT_CLASS_CacheClass, |
|
|
COMPONENT_TYPE_PrimaryICache, 0, 1, 2, |
|
|
/* |
|
|
* Key bits: 0xXXYYZZZZ |
|
|
* XX is refill-size. |
|
|
* Cache line size is 1 << YY, |
|
|
* Cache size is 4KB << ZZZZ. |
|
|
*/ |
|
|
0x01000000 + (cache_line_size << 16) + cache_size, |
|
|
/* 32 bytes per line, default = 32 KB total */ |
|
|
0xffffffff, NULL, cpuaddr, NULL, 0); |
|
|
|
|
|
cache_size = DEFAULT_PCACHE_SIZE - 12; |
|
|
if (machine->cache_pdcache) |
|
|
cache_size = machine->cache_pdcache - 12; |
|
|
if (cache_size < 0) |
|
|
cache_size = 0; |
|
|
|
|
|
cache_line_size = DEFAULT_PCACHE_LINESIZE; |
|
|
if (machine->cache_pdcache_linesize) |
|
|
cache_line_size = machine->cache_pdcache_linesize; |
|
|
if (cache_line_size < 0) |
|
|
cache_line_size = 0; |
|
|
|
|
|
pdcache = arcbios_addchild_manual(cpu, COMPONENT_CLASS_CacheClass, |
|
|
COMPONENT_TYPE_PrimaryDCache, 0, 1, 2, |
|
|
/* |
|
|
* Key bits: 0xYYZZZZ |
|
|
* Cache line size is 1 << YY, |
|
|
* Cache size is 4KB << ZZZZ. |
|
|
*/ |
|
|
0x01000000 + (cache_line_size << 16) + cache_size, |
|
|
/* 32 bytes per line, default = 32 KB total */ |
|
|
0xffffffff, NULL, cpuaddr, NULL, 0); |
|
|
|
|
|
if (machine->cache_secondary >= 12) { |
|
|
cache_size = machine->cache_secondary - 12; |
|
|
|
|
|
cache_line_size = 6; /* 64 bytes default */ |
|
|
if (machine->cache_secondary_linesize) |
|
|
cache_line_size = machine->cache_secondary_linesize; |
|
|
if (cache_line_size < 0) |
|
|
cache_line_size = 0; |
|
|
|
|
|
sdcache = arcbios_addchild_manual(cpu, COMPONENT_CLASS_CacheClass, |
|
|
COMPONENT_TYPE_SecondaryDCache, 0, 1, 2, |
|
|
/* |
|
|
* Key bits: 0xYYZZZZ |
|
|
* Cache line size is 1 << YY, |
|
|
* Cache size is 4KB << ZZZZ. |
|
|
*/ |
|
|
0x01000000 + (cache_line_size << 16) + cache_size, |
|
|
/* 64 bytes per line, default = 1 MB total */ |
|
|
0xffffffff, NULL, cpuaddr, NULL, 0); |
|
|
} |
|
|
|
|
|
debug("ARC cpu%i @ 0x%llx", i, (long long)cpuaddr); |
|
|
|
|
|
if (fpu != 0) |
|
|
debug(" (fpu @ 0x%llx)\n", (long long)fpu); |
|
|
else |
|
|
debug("\n"); |
|
|
|
|
|
debug(" picache @ 0x%llx, pdcache @ 0x%llx\n", |
|
|
(long long)picache, (long long)pdcache); |
|
|
|
|
|
if (machine->cache_secondary >= 12) |
|
|
debug(" sdcache @ 0x%llx\n", |
|
|
(long long)sdcache); |
|
|
|
|
|
if (machine->machine_type == MACHINE_SGI) { |
|
|
/* TODO: Memory amount (and base address?)! */ |
|
|
uint64_t memory = arcbios_addchild_manual(cpu, COMPONENT_CLASS_MemoryClass, |
|
|
COMPONENT_TYPE_MemoryUnit, |
|
|
0, 1, 2, 0, 0xffffffff, "memory", cpuaddr, NULL, 0); |
|
|
debug(" memory @ 0x%llx\n", (long long)memory); |
|
|
} |
|
|
} |
|
3363 |
|
|
3364 |
|
if (machine->prom_emulation) |
3365 |
|
arcbios_init(machine, arc_wordlen == sizeof(uint64_t), |
3366 |
|
sgi_ram_offset); |
3367 |
|
else |
3368 |
|
goto no_arc_prom_emulation; /* TODO: ugly */ |
3369 |
|
|
3370 |
/* |
/* |
|
* Other components, and default TLB entries: |
|
|
* |
|
3371 |
* TODO: How to build the component tree intermixed with |
* TODO: How to build the component tree intermixed with |
3372 |
* the rest of device initialization? |
* the rest of device initialization? |
3373 |
*/ |
*/ |
3374 |
|
|
|
if (machine->machine_type == MACHINE_SGI) { |
|
|
/* TODO: On which models is this required? */ |
|
|
mips_coproc_tlb_set_entry(cpu, 0, 1048576*16, |
|
|
0xc000000000000000ULL, |
|
|
0x0, 1048576*16, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
} |
|
|
|
|
|
if (machine->machine_type == MACHINE_ARC && |
|
|
( machine->machine_subtype == MACHINE_ARC_NEC_RD94 || |
|
|
machine->machine_subtype == MACHINE_ARC_NEC_R94 || |
|
|
machine->machine_subtype == MACHINE_ARC_NEC_R96 )) { |
|
|
uint64_t jazzbus, eisa, other; |
|
|
|
|
|
jazzbus = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_AdapterClass, |
|
|
COMPONENT_TYPE_MultiFunctionAdapter, |
|
|
0, 1, 2, 0, 0xffffffff, "Jazz-Internal Bus", |
|
|
system, NULL, 0); |
|
|
|
|
|
switch (machine->machine_subtype) { |
|
|
case MACHINE_ARC_NEC_RD94: |
|
|
case MACHINE_ARC_NEC_R94: |
|
|
if (machine->use_x11) |
|
|
arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_DisplayController, |
|
|
0, 1, 2, 0, 0x0, "10110004", |
|
|
system, NULL, 0); |
|
|
break; |
|
|
case MACHINE_ARC_NEC_R96: |
|
|
if (machine->use_x11) { |
|
|
uint64_t x; |
|
|
x = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_DisplayController, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0x0, "necvdfrb", |
|
|
jazzbus, NULL, 0); |
|
|
arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_MonitorPeripheral, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "640x480", |
|
|
x, NULL, 0); |
|
|
} |
|
|
|
|
|
/* TODO: R[D]94 too? */ |
|
|
eisa = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_AdapterClass, |
|
|
COMPONENT_TYPE_EISAAdapter, |
|
|
0, 1, 2, 0, 0xffffffff, "EISA", |
|
|
system, NULL, 0); |
|
|
|
|
|
other = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_OtherController, |
|
|
0, 1, 2, 0, 0xffffffff, "NEC1C01", |
|
|
eisa, NULL, 0); |
|
|
|
|
|
break; |
|
|
} |
|
|
} |
|
|
|
|
|
if (machine->machine_type == MACHINE_ARC && |
|
|
(machine->machine_subtype == MACHINE_ARC_JAZZ_PICA |
|
|
|| machine->machine_subtype == MACHINE_ARC_JAZZ_MAGNUM)) { |
|
|
uint64_t jazzbus, ali_s3, vxl; |
|
|
uint64_t diskcontroller, floppy, kbdctl, kbd; |
|
|
uint64_t ptrctl, ptr, paral, audio; |
|
|
uint64_t eisa, scsi; |
|
|
/* uint64_t serial1, serial2; */ |
|
|
|
|
|
jazzbus = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_AdapterClass, |
|
|
COMPONENT_TYPE_MultiFunctionAdapter, |
|
|
0, 1, 2, 0, 0xffffffff, "Jazz-Internal Bus", |
|
|
system, NULL, 0); |
|
|
|
|
|
/* |
|
|
* DisplayController, needed by NetBSD: |
|
|
* TODO: NetBSD still doesn't use it :( |
|
|
*/ |
|
|
switch (machine->machine_subtype) { |
|
|
case MACHINE_ARC_JAZZ_PICA: |
|
|
/* Default TLB entries on PICA-61: */ |
|
|
|
|
|
/* 7: 256K, asid: 0x0, v: 0xe1000000, |
|
|
p0: 0xfff00000(2.VG), p1: 0x0(0..G) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 7, 262144, |
|
|
0xffffffffe1000000ULL, |
|
|
0x0fff00000ULL, 0, |
|
|
1, 0, 0, 0, 1, 0, 2, 0); |
|
|
|
|
|
/* 8: 64K, asid: 0x0, v: 0xe0000000, |
|
|
p0: 0x80000000(2DVG), p1: 0x0(0..G) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 8, 65536, |
|
|
0xffffffffe0000000ULL, |
|
|
0x080000000ULL, 0, |
|
|
1, 0, 1, 0, 1, 0, 2, 0); |
|
|
|
|
|
/* 9: 64K, asid: 0x0, v: 0xe00e0000, |
|
|
p0: 0x800e0000(2DVG), p1: 0x800f0000(2DVG) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 9, 65536, |
|
|
(uint64_t)0xffffffffe00e0000ULL, |
|
|
(uint64_t)0x0800e0000ULL, |
|
|
(uint64_t)0x0800f0000ULL, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
|
|
|
/* 10: 4K, asid: 0x0, v: 0xe0100000, |
|
|
p0: 0xf0000000(2DVG), p1: 0x0(0..G) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 10, 4096, |
|
|
(uint64_t)0xffffffffe0100000ULL, |
|
|
(uint64_t)0x0f0000000ULL, 0, |
|
|
1, 0, 1, 0, 1, 0, 2, 0); |
|
|
|
|
|
/* 11: 1M, asid: 0x0, v: 0xe0200000, |
|
|
p0: 0x60000000(2DVG), p1: 0x60100000(2DVG) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 11, 1048576, |
|
|
0xffffffffe0200000ULL, |
|
|
0x060000000ULL, 0x060100000ULL, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
|
|
|
/* 12: 1M, asid: 0x0, v: 0xe0400000, |
|
|
p0: 0x60200000(2DVG), p1: 0x60300000(2DVG) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 12, 1048576, |
|
|
0xffffffffe0400000ULL, |
|
|
0x060200000ULL, 0x060300000ULL, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
|
|
|
/* 13: 4M, asid: 0x0, v: 0xe0800000, |
|
|
p0: 0x40000000(2DVG), p1: 0x40400000(2DVG) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 13, 1048576*4, |
|
|
0xffffffffe0800000ULL, |
|
|
0x040000000ULL, 0x040400000ULL, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
|
|
|
/* 14: 16M, asid: 0x0, v: 0xe2000000, |
|
|
p0: 0x90000000(2DVG), p1: 0x91000000(2DVG) */ |
|
|
mips_coproc_tlb_set_entry(cpu, 14, 1048576*16, |
|
|
0xffffffffe2000000ULL, |
|
|
0x090000000ULL, 0x091000000ULL, |
|
|
1, 1, 1, 1, 1, 0, 2, 2); |
|
|
|
|
|
if (machine->use_x11) { |
|
|
ali_s3 = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_DisplayController, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "ALI_S3", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_MonitorPeripheral, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "1024x768", |
|
|
ali_s3, NULL, 0); |
|
|
} |
|
|
break; |
|
|
case MACHINE_ARC_JAZZ_MAGNUM: |
|
|
if (machine->use_x11) { |
|
|
vxl = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_DisplayController, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "VXL", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_MonitorPeripheral, |
|
|
COMPONENT_FLAG_ConsoleOut | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "1024x768", |
|
|
vxl, NULL, 0); |
|
|
} |
|
|
break; |
|
|
} |
|
|
|
|
|
diskcontroller = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_DiskController, |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "I82077", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
floppy = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_FloppyDiskPeripheral, |
|
|
COMPONENT_FLAG_Removable | |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, NULL, |
|
|
diskcontroller, NULL, 0); |
|
|
|
|
|
kbdctl = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_KeyboardController, |
|
|
COMPONENT_FLAG_ConsoleIn | |
|
|
COMPONENT_FLAG_Input, |
|
|
1, 2, 0, 0xffffffff, "I8742", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
kbd = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_KeyboardPeripheral, |
|
|
COMPONENT_FLAG_ConsoleIn | |
|
|
COMPONENT_FLAG_Input, |
|
|
1, 2, 0, 0xffffffff, "PCAT_ENHANCED", |
|
|
kbdctl, NULL, 0); |
|
|
|
|
|
ptrctl = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_PointerController, |
|
|
COMPONENT_FLAG_Input, |
|
|
1, 2, 0, 0xffffffff, "I8742", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
ptr = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_PeripheralClass, |
|
|
COMPONENT_TYPE_PointerPeripheral, |
|
|
COMPONENT_FLAG_Input, |
|
|
1, 2, 0, 0xffffffff, "PS2 MOUSE", |
|
|
ptrctl, NULL, 0); |
|
|
|
|
|
/* These cause Windows NT to bug out. */ |
|
|
#if 0 |
|
|
serial1 = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_SerialController, |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "COM1", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
serial2 = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_SerialController, |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "COM1", |
|
|
jazzbus, NULL, 0); |
|
|
#endif |
|
|
|
|
|
paral = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_ParallelController, |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "LPT1", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
audio = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_ControllerClass, |
|
|
COMPONENT_TYPE_AudioController, |
|
|
COMPONENT_FLAG_Input | |
|
|
COMPONENT_FLAG_Output, |
|
|
1, 2, 0, 0xffffffff, "MAGNUM", |
|
|
jazzbus, NULL, 0); |
|
|
|
|
|
eisa = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_AdapterClass, |
|
|
COMPONENT_TYPE_EISAAdapter, |
|
|
0, 1, 2, 0, 0xffffffff, "EISA", |
|
|
system, NULL, 0); |
|
|
|
|
|
{ |
|
|
unsigned char config[78]; |
|
|
memset(config, 0, sizeof(config)); |
|
|
|
|
|
/* config data version: 1, revision: 2, count: 4 */ |
|
|
config[0] = 0x01; config[1] = 0x00; |
|
|
config[2] = 0x02; config[3] = 0x00; |
|
|
config[4] = 0x04; config[5] = 0x00; config[6] = 0x00; config[7] = 0x00; |
|
|
|
|
|
/* |
|
|
type: Interrupt |
|
|
share_disposition: DeviceExclusive, flags: LevelSensitive |
|
|
level: 4, vector: 22, reserved1: 0 |
|
|
*/ |
|
|
config[8] = arc_CmResourceTypeInterrupt; |
|
|
config[9] = arc_CmResourceShareDeviceExclusive; |
|
|
config[10] = arc_CmResourceInterruptLevelSensitive; |
|
|
config[12] = 4; |
|
|
config[16] = 22; |
|
|
config[20] = 0; |
|
|
|
|
|
/* |
|
|
type: Memory |
|
|
share_disposition: DeviceExclusive, flags: ReadWrite |
|
|
start: 0x 0 80002000, length: 0x1000 |
|
|
*/ |
|
|
config[24] = arc_CmResourceTypeMemory; |
|
|
config[25] = arc_CmResourceShareDeviceExclusive; |
|
|
config[26] = arc_CmResourceMemoryReadWrite; |
|
|
config[28] = 0x00; config[29] = 0x20; config[30] = 0x00; config[31] = 0x80; |
|
|
config[32] = 0x00; config[33] = 0x00; config[34] = 0x00; config[35] = 0x00; |
|
|
config[36] = 0x00; config[37] = 0x10; config[38] = 0x00; config[39] = 0x00; |
|
|
|
|
|
/* |
|
|
type: DMA |
|
|
share_disposition: DeviceExclusive, flags: 0x0 |
|
|
channel: 0, port: 0, reserved1: 0 |
|
|
*/ |
|
|
config[40] = arc_CmResourceTypeDMA; |
|
|
config[41] = arc_CmResourceShareDeviceExclusive; |
|
|
/* 42..43 = flags, 44,45,46,47 = channel, 48,49,50,51 = port, 52,53,54,55 = reserved */ |
|
|
|
|
|
/* type: DeviceSpecific |
|
|
share_disposition: DeviceExclusive, flags: 0x0 |
|
|
datasize: 6, reserved1: 0, reserved2: 0 |
|
|
data: [0x1:0x0:0x2:0x0:0x7:0x30] |
|
|
*/ |
|
|
config[56] = arc_CmResourceTypeDeviceSpecific; |
|
|
config[57] = arc_CmResourceShareDeviceExclusive; |
|
|
/* 58,59 = flags 60,61,62,63 = data size, 64..71 = reserved */ |
|
|
config[60] = 6; |
|
|
/* 72..77 = the data */ |
|
|
config[72] = 0x01; |
|
|
config[73] = 0x00; |
|
|
config[74] = 0x02; |
|
|
config[75] = 0x00; |
|
|
config[76] = 0x07; |
|
|
config[77] = 0x30; |
|
|
scsi = arcbios_addchild_manual(cpu, |
|
|
COMPONENT_CLASS_AdapterClass, |
|
|
COMPONENT_TYPE_SCSIAdapter, |
|
|
0, 1, 2, 0, 0xffffffff, "ESP216", |
|
|
system, config, sizeof(config)); |
|
|
|
|
|
arcbios_register_scsicontroller(scsi); |
|
|
} |
|
|
|
|
|
} |
|
|
|
|
|
|
|
|
add_symbol_name(&machine->symbol_context, |
|
|
ARC_FIRMWARE_ENTRIES, 0x10000, "[ARCBIOS entry]", 0); |
|
|
|
|
|
switch (arc_wordlen) { |
|
|
case sizeof(uint64_t): |
|
|
for (i=0; i<100; i++) |
|
|
store_64bit_word(cpu, ARC_FIRMWARE_VECTORS + i*8, |
|
|
ARC_FIRMWARE_ENTRIES + i*8); |
|
|
for (i=0; i<100; i++) |
|
|
store_64bit_word(cpu, ARC_PRIVATE_VECTORS + i*8, |
|
|
ARC_PRIVATE_ENTRIES + i*8); |
|
|
break; |
|
|
default: |
|
|
for (i=0; i<100; i++) |
|
|
store_32bit_word(cpu, ARC_FIRMWARE_VECTORS + i*4, |
|
|
ARC_FIRMWARE_ENTRIES + i*4); |
|
|
for (i=0; i<100; i++) |
|
|
store_32bit_word(cpu, ARC_PRIVATE_VECTORS + i*4, |
|
|
ARC_PRIVATE_ENTRIES + i*4); |
|
|
} |
|
|
|
|
|
switch (arc_wordlen) { |
|
|
case sizeof(uint64_t): |
|
|
/* |
|
|
* ARCS64 SPD (TODO: This is just a guess) |
|
|
*/ |
|
|
memset(&arcbios_spb_64, 0, sizeof(arcbios_spb_64)); |
|
|
store_64bit_word_in_host(cpu, (unsigned char *)&arcbios_spb_64.SPBSignature, ARCBIOS_SPB_SIGNATURE); |
|
|
store_16bit_word_in_host(cpu, (unsigned char *)&arcbios_spb_64.Version, 64); |
|
|
store_16bit_word_in_host(cpu, (unsigned char *)&arcbios_spb_64.Revision, 0); |
|
|
store_64bit_word_in_host(cpu, (unsigned char *)&arcbios_spb_64.FirmwareVector, ARC_FIRMWARE_VECTORS); |
|
|
store_buf(cpu, SGI_SPB_ADDR, (char *)&arcbios_spb_64, sizeof(arcbios_spb_64)); |
|
|
break; |
|
|
default: /* 32-bit */ |
|
|
/* |
|
|
* ARCBIOS SPB: (For ARC and 32-bit SGI modes) |
|
|
*/ |
|
|
memset(&arcbios_spb, 0, sizeof(arcbios_spb)); |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.SPBSignature, ARCBIOS_SPB_SIGNATURE); |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.SPBLength, sizeof(arcbios_spb)); |
|
|
store_16bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.Version, 1); |
|
|
store_16bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.Revision, machine->machine_type == MACHINE_SGI? 10 : 2); |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.FirmwareVector, ARC_FIRMWARE_VECTORS); |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.FirmwareVectorLength, 100 * 4); /* ? */ |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.PrivateVector, ARC_PRIVATE_VECTORS); |
|
|
store_32bit_word_in_host(cpu, (unsigned char *)&arcbios_spb.PrivateVectorLength, 100 * 4); /* ? */ |
|
|
store_buf(cpu, SGI_SPB_ADDR, (char *)&arcbios_spb, sizeof(arcbios_spb)); |
|
|
} |
|
|
|
|
3375 |
/* |
/* |
3376 |
* Boot string in ARC format: |
* Boot string in ARC format: |
3377 |
* |
* |
3391 |
/* TODO: Make this nicer. */ |
/* TODO: Make this nicer. */ |
3392 |
if (machine->machine_type == MACHINE_SGI) { |
if (machine->machine_type == MACHINE_SGI) { |
3393 |
if (machine->machine_subtype == 30) |
if (machine->machine_subtype == 30) |
3394 |
strcat(init_bootpath, "xio(0)pci(15)"); |
strlcat(init_bootpath, "xio(0)pci(15)", |
3395 |
|
MACHINE_NAME_MAXBUF); |
3396 |
if (machine->machine_subtype == 32) |
if (machine->machine_subtype == 32) |
3397 |
strcat(init_bootpath, "pci(0)"); |
strlcat(init_bootpath, "pci(0)", |
3398 |
|
MACHINE_NAME_MAXBUF); |
3399 |
} |
} |
3400 |
|
|
3401 |
if (diskimage_is_a_cdrom(machine, bootdev_id)) |
if (diskimage_is_a_cdrom(machine, bootdev_id, |
3402 |
snprintf(init_bootpath + strlen(init_bootpath), 400, |
bootdev_type)) |
3403 |
"scsi(0)cdrom(%i)fdisk(0)", bootdev_id); |
snprintf(init_bootpath + strlen(init_bootpath), |
3404 |
|
400,"scsi(0)cdrom(%i)fdisk(0)", bootdev_id); |
3405 |
else |
else |
3406 |
snprintf(init_bootpath + strlen(init_bootpath), 400, |
snprintf(init_bootpath + strlen(init_bootpath), |
3407 |
"scsi(0)disk(%i)rdisk(0)partition(1)", bootdev_id); |
400,"scsi(0)disk(%i)rdisk(0)partition(1)", |
3408 |
|
bootdev_id); |
3409 |
} |
} |
3410 |
|
|
3411 |
if (machine->machine_type == MACHINE_ARC) |
if (machine->machine_type == MACHINE_ARC) |
3412 |
strcat(init_bootpath, "\\"); |
strlcat(init_bootpath, "\\", MACHINE_NAME_MAXBUF); |
3413 |
|
|
3414 |
bootstr = malloc(strlen(init_bootpath) + |
bootstr = malloc(BOOTSTR_BUFLEN); |
3415 |
strlen(machine->boot_kernel_filename) + 1); |
if (bootstr == NULL) { |
3416 |
strcpy(bootstr, init_bootpath); |
fprintf(stderr, "out of memory\n"); |
3417 |
strcat(bootstr, machine->boot_kernel_filename); |
exit(1); |
3418 |
|
} |
3419 |
|
strlcpy(bootstr, init_bootpath, BOOTSTR_BUFLEN); |
3420 |
|
if (strlcat(bootstr, machine->boot_kernel_filename, |
3421 |
|
BOOTSTR_BUFLEN) >= BOOTSTR_BUFLEN) { |
3422 |
|
fprintf(stderr, "boot string too long?\n"); |
3423 |
|
exit(1); |
3424 |
|
} |
3425 |
|
|
3426 |
/* Boot args., eg "-a" */ |
/* Boot args., eg "-a" */ |
3427 |
bootarg = machine->boot_string_argument; |
bootarg = machine->boot_string_argument; |
3430 |
cpu->cd.mips.gpr[MIPS_GPR_A0] = 0; /* note: argc is increased later */ |
cpu->cd.mips.gpr[MIPS_GPR_A0] = 0; /* note: argc is increased later */ |
3431 |
|
|
3432 |
/* TODO: not needed? */ |
/* TODO: not needed? */ |
3433 |
cpu->cd.mips.gpr[MIPS_GPR_SP] = machine->physical_ram_in_mb * 1048576 + 0x80000000 - 0x2080; |
cpu->cd.mips.gpr[MIPS_GPR_SP] = (int64_t)(int32_t) |
3434 |
|
(machine->physical_ram_in_mb * 1048576 + 0x80000000 - 0x2080); |
3435 |
|
|
3436 |
/* Set up argc/argv: */ |
/* Set up argc/argv: */ |
3437 |
addr = ARC_ENV_STRINGS; |
addr = ARC_ENV_STRINGS; |
3549 |
add_environment_string(cpu, "kernname=unix", &addr); |
add_environment_string(cpu, "kernname=unix", &addr); |
3550 |
} else { |
} else { |
3551 |
char *tmp; |
char *tmp; |
3552 |
tmp = malloc(strlen(bootarg) + strlen("OSLOADOPTIONS=") + 2); |
size_t mlen = strlen(bootarg) + strlen("OSLOADOPTIONS=") + 2; |
3553 |
sprintf(tmp, "OSLOADOPTIONS=%s", bootarg); |
tmp = malloc(mlen); |
3554 |
|
snprintf(tmp, mlen, "OSLOADOPTIONS=%s", bootarg); |
3555 |
store_pointer_and_advance(cpu, &addr2, addr, arc_wordlen==sizeof(uint64_t)); |
store_pointer_and_advance(cpu, &addr2, addr, arc_wordlen==sizeof(uint64_t)); |
3556 |
add_environment_string(cpu, tmp, &addr); |
add_environment_string(cpu, tmp, &addr); |
3557 |
|
|
3585 |
|
|
3586 |
/* First of all, the MeshCube has an Au1500 in it: */ |
/* First of all, the MeshCube has an Au1500 in it: */ |
3587 |
machine->md_interrupt = au1x00_interrupt; |
machine->md_interrupt = au1x00_interrupt; |
3588 |
machine->au1x00_ic_data = dev_au1x00_init(machine, mem); |
machine->md_int.au1x00_ic_data = dev_au1x00_init(machine, mem); |
3589 |
|
|
3590 |
/* |
/* |
3591 |
* TODO: Which non-Au1500 devices, and at what addresses? |
* TODO: Which non-Au1500 devices, and at what addresses? |
3633 |
device_add(machine, "8250 addr=0x18000800 addr_mult=4 irq=0"); |
device_add(machine, "8250 addr=0x18000800 addr_mult=4 irq=0"); |
3634 |
break; |
break; |
3635 |
|
|
|
case MACHINE_WRT54G: |
|
|
machine->machine_name = "Linksys WRT54G"; |
|
|
|
|
|
if (machine->use_x11) |
|
|
fprintf(stderr, "WARNING! Linksys WRT54G with -X is meaningless. Continuing anyway.\n"); |
|
|
|
|
|
/* 200 MHz default */ |
|
|
if (machine->emulated_hz == 0) |
|
|
machine->emulated_hz = 200000000; |
|
|
|
|
|
/* |
|
|
* Linux should be loaded at 0x80001000. |
|
|
* RAM: 16 or 32 MB, Flash RAM: 4 or 8 MB. |
|
|
* http://www.bumpclub.ee/~jaanus/wrt54g/vana/minicom.cap: |
|
|
* |
|
|
* Starting program at 0x80001000 |
|
|
* CPU revision is: 00029007 |
|
|
* Primary instruction cache 8kb, linesize 16 bytes (2 ways) |
|
|
* Primary data cache 4kb, linesize 16 bytes (2 ways) |
|
|
* memory: 01000000 @ 00000000 (usable) |
|
|
* Kernel command line: root=/dev/mtdblock2 rootfstype=squashfs init=/etc/preinit noinitrd console=ttyS0,115200 |
|
|
* CPU: BCM4712 rev 1 at 200 MHz |
|
|
* Calibrating delay loop... 199.47 BogoMIPS |
|
|
* ttyS00 at 0xb8000300 (irq = 3) is a 16550A |
|
|
* ttyS01 at 0xb8000400 (irq = 0) is a 16550A |
|
|
* Flash device: 0x400000 at 0x1c000000 |
|
|
* .. |
|
|
*/ |
|
|
|
|
|
/* TODO: What should the initial register contents be? */ |
|
|
#if 1 |
|
|
{ |
|
|
int i; |
|
|
for (i=0; i<32; i++) |
|
|
cpu->cd.mips.gpr[i] = 0x01230000 + (i << 8) + 0x55; |
|
|
} |
|
|
#endif |
|
|
|
|
|
break; |
|
|
|
|
3636 |
case MACHINE_SONYNEWS: |
case MACHINE_SONYNEWS: |
3637 |
/* |
/* |
3638 |
* There are several models, according to |
* There are several models, according to |
3670 |
|
|
3671 |
break; |
break; |
3672 |
|
|
3673 |
|
case MACHINE_EVBMIPS: |
3674 |
|
/* http://www.netbsd.org/Ports/evbmips/ */ |
3675 |
|
cpu->byte_order = EMUL_LITTLE_ENDIAN; |
3676 |
|
|
3677 |
|
switch (machine->machine_subtype) { |
3678 |
|
case MACHINE_EVBMIPS_MALTA: |
3679 |
|
machine->machine_name = "MALTA (evbmips)"; |
3680 |
|
|
3681 |
|
machine->md_int.malta_data = |
3682 |
|
device_add(machine, "malta addr=0x18000020"); |
3683 |
|
machine->md_interrupt = malta_interrupt; |
3684 |
|
|
3685 |
|
dev_mc146818_init(machine, mem, 0x18000070, |
3686 |
|
8 + 8, MC146818_PC_CMOS, 1); |
3687 |
|
machine->main_console_handle = dev_ns16550_init(machine, mem, |
3688 |
|
0x180003f8, 8 + 4, 1, 1, "serial console"); |
3689 |
|
|
3690 |
|
/* TODO: Irqs */ |
3691 |
|
pci_data = dev_gt_init(machine, mem, 0x1be00000, |
3692 |
|
8+16, 8+16, 120); |
3693 |
|
|
3694 |
|
/* TODO: Haha, this is bogus. Just a cut&paste |
3695 |
|
from the Cobalt emulation above. */ |
3696 |
|
bus_pci_add(machine, pci_data, mem, 0, 9, 0, |
3697 |
|
pci_vt82c586_isa_init, pci_vt82c586_isa_rr); |
3698 |
|
bus_pci_add(machine, pci_data, mem, 0, 9, 1, |
3699 |
|
pci_vt82c586_ide_init, pci_vt82c586_ide_rr); |
3700 |
|
|
3701 |
|
device_add(machine, "malta_lcd addr=0x1f000400"); |
3702 |
|
break; |
3703 |
|
case MACHINE_EVBMIPS_PB1000: |
3704 |
|
machine->machine_name = "PB1000 (evbmips)"; |
3705 |
|
machine->md_interrupt = au1x00_interrupt; |
3706 |
|
machine->md_int.au1x00_ic_data = |
3707 |
|
dev_au1x00_init(machine, mem); |
3708 |
|
break; |
3709 |
|
default: |
3710 |
|
fatal("Unimplemented EVBMIPS model.\n"); |
3711 |
|
exit(1); |
3712 |
|
} |
3713 |
|
|
3714 |
|
/* This is just a test. TODO */ |
3715 |
|
for (i=0; i<32; i++) |
3716 |
|
cpu->cd.mips.gpr[i] = |
3717 |
|
0x01230000 + (i << 8) + 0x55; |
3718 |
|
|
3719 |
|
/* NetBSD/evbmips wants these: (at least for Malta) */ |
3720 |
|
|
3721 |
|
/* a0 = argc */ |
3722 |
|
cpu->cd.mips.gpr[MIPS_GPR_A0] = 2; |
3723 |
|
|
3724 |
|
/* a1 = argv */ |
3725 |
|
cpu->cd.mips.gpr[MIPS_GPR_A1] = (int32_t)0x9fc01000; |
3726 |
|
store_32bit_word(cpu, (int32_t)0x9fc01000, 0x9fc01040); |
3727 |
|
store_32bit_word(cpu, (int32_t)0x9fc01004, 0x9fc01200); |
3728 |
|
|
3729 |
|
bootstr = strdup(machine->boot_kernel_filename); |
3730 |
|
bootarg = strdup(machine->boot_string_argument); |
3731 |
|
store_string(cpu, (int32_t)0x9fc01040, bootstr); |
3732 |
|
store_string(cpu, (int32_t)0x9fc01200, bootarg); |
3733 |
|
|
3734 |
|
/* a2 = (yamon_env_var *)envp */ |
3735 |
|
cpu->cd.mips.gpr[MIPS_GPR_A2] = 0; |
3736 |
|
|
3737 |
|
/* a3 = memsize */ |
3738 |
|
cpu->cd.mips.gpr[MIPS_GPR_A3] = |
3739 |
|
machine->physical_ram_in_mb * 1048576; |
3740 |
|
|
3741 |
|
/* Yamon emulation vectors at 0x9fc005xx: */ |
3742 |
|
for (i=0; i<0x100; i+=4) |
3743 |
|
store_32bit_word(cpu, (int64_t)(int32_t)0x9fc00500 + i, |
3744 |
|
(int64_t)(int32_t)0x9fc00800 + i); |
3745 |
|
break; |
3746 |
|
|
3747 |
|
case MACHINE_PSP: |
3748 |
|
/* |
3749 |
|
* The Playstation Portable seems to be a strange beast. |
3750 |
|
* |
3751 |
|
* http://yun.cup.com/psppg004.html (in Japanese) seems to |
3752 |
|
* suggest that virtual addresses are not displaced by |
3753 |
|
* 0x80000000 as on normal CPUs, but by 0x40000000? |
3754 |
|
*/ |
3755 |
|
machine->machine_name = "Playstation Portable"; |
3756 |
|
cpu->byte_order = EMUL_LITTLE_ENDIAN; |
3757 |
|
|
3758 |
|
if (!machine->use_x11 && !quiet_mode) |
3759 |
|
fprintf(stderr, "-------------------------------------" |
3760 |
|
"------------------------------------------\n" |
3761 |
|
"\n WARNING! You are emulating a PSP without -X. " |
3762 |
|
"You will miss graphical output!\n\n" |
3763 |
|
"-------------------------------------" |
3764 |
|
"------------------------------------------\n"); |
3765 |
|
|
3766 |
|
/* 480 x 272 pixels framebuffer (512 bytes per line) */ |
3767 |
|
fb = dev_fb_init(machine, mem, 0x04000000, VFB_HPCMIPS, |
3768 |
|
480,272, 512,1088, -15, "Playstation Portable", 0); |
3769 |
|
|
3770 |
|
/* |
3771 |
|
* TODO/NOTE: This is ugly, but necessary since GXemul doesn't |
3772 |
|
* emulate any MIPS CPU without MMU right now. |
3773 |
|
*/ |
3774 |
|
mips_coproc_tlb_set_entry(cpu, 0, 1048576*16, |
3775 |
|
0x44000000 /*vaddr*/, 0x4000000, 0x4000000 + 1048576*16, |
3776 |
|
1,1,1,1,1, 0, 2, 2); |
3777 |
|
mips_coproc_tlb_set_entry(cpu, 1, 1048576*16, |
3778 |
|
0x8000000 /*vaddr*/, 0x0, 0x0 + 1048576*16, |
3779 |
|
1,1,1,1,1, 0, 2, 2); |
3780 |
|
mips_coproc_tlb_set_entry(cpu, 2, 1048576*16, |
3781 |
|
0x9000000 /*vaddr*/, 0x01000000, 0x01000000 + 1048576*16, |
3782 |
|
1,1,1,1,1, 0, 2, 2); |
3783 |
|
mips_coproc_tlb_set_entry(cpu, 3, 1048576*16, |
3784 |
|
0x0 /*vaddr*/, 0, 0 + 1048576*16, 1,1,1,1,1, 0, 2, 2); |
3785 |
|
|
3786 |
|
cpu->cd.mips.gpr[MIPS_GPR_SP] = 0xfff0; |
3787 |
|
|
3788 |
|
break; |
3789 |
|
|
3790 |
case MACHINE_BAREPPC: |
case MACHINE_BAREPPC: |
3791 |
/* |
/* |
3792 |
* A "bare" PPC machine. |
* A "bare" PPC machine. |
3869 |
dev_ns16550_init(machine, mem, 0x800002f8, 0, 1, 0, "serial 1"); |
dev_ns16550_init(machine, mem, 0x800002f8, 0, 1, 0, "serial 1"); |
3870 |
|
|
3871 |
/* This is used by Linux too: */ |
/* This is used by Linux too: */ |
3872 |
dev_vga_init(machine, mem, 0xc00b8000ULL, 0x800003c0ULL, 80, 25, |
dev_vga_init(machine, mem, 0xc00a0000ULL, 0x800003c0ULL, |
3873 |
machine->machine_name); |
machine->machine_name); |
3874 |
|
|
3875 |
store_32bit_word(cpu, 0x3010, |
store_32bit_word(cpu, 0x3010, |
4006 |
/* TODO */ |
/* TODO */ |
4007 |
break; |
break; |
4008 |
|
|
4009 |
|
case MACHINE_BAREARM: |
4010 |
|
machine->machine_name = "\"Bare\" ARM machine"; |
4011 |
|
break; |
4012 |
|
|
4013 |
|
case MACHINE_TESTARM: |
4014 |
|
machine->machine_name = "ARM test machine"; |
4015 |
|
|
4016 |
|
machine->main_console_handle = dev_cons_init( |
4017 |
|
machine, mem, DEV_CONS_ADDRESS, "console", 2); |
4018 |
|
|
4019 |
|
fb = dev_fb_init(machine, mem, 0x12000000, VFB_GENERIC, |
4020 |
|
640,480, 640,480, 24, "generic", 1); |
4021 |
|
break; |
4022 |
|
|
4023 |
|
case MACHINE_BAREX86: |
4024 |
|
machine->machine_name = "\"Bare\" x86 machine"; |
4025 |
|
break; |
4026 |
|
|
4027 |
|
case MACHINE_X86: |
4028 |
|
if (machine->machine_subtype == MACHINE_X86_XT) |
4029 |
|
machine->machine_name = "PC XT"; |
4030 |
|
else |
4031 |
|
machine->machine_name = "Generic x86 PC"; |
4032 |
|
|
4033 |
|
/* Interrupt controllers: */ |
4034 |
|
snprintf(tmpstr, sizeof(tmpstr) - 1, "8259 addr=0x%llx", |
4035 |
|
(long long)(X86_IO_BASE + 0x20)); |
4036 |
|
machine->md.pc.pic1 = device_add(machine, tmpstr); |
4037 |
|
if (machine->machine_subtype != MACHINE_X86_XT) { |
4038 |
|
snprintf(tmpstr, sizeof(tmpstr) - 1, "8259 addr=0x%llx irq=2", |
4039 |
|
(long long)(X86_IO_BASE + 0xa0)); |
4040 |
|
machine->md.pc.pic2 = device_add(machine, tmpstr); |
4041 |
|
} |
4042 |
|
|
4043 |
|
machine->md_interrupt = x86_pc_interrupt; |
4044 |
|
|
4045 |
|
/* Timer: */ |
4046 |
|
snprintf(tmpstr, sizeof(tmpstr) - 1, "8253 addr=0x%llx irq=0", |
4047 |
|
(long long)(X86_IO_BASE + 0x40)); |
4048 |
|
device_add(machine, tmpstr); |
4049 |
|
|
4050 |
|
snprintf(tmpstr, sizeof(tmpstr) - 1, "pccmos addr=0x%llx", |
4051 |
|
(long long)(X86_IO_BASE + 0x70)); |
4052 |
|
device_add(machine, tmpstr); |
4053 |
|
|
4054 |
|
/* TODO: IRQ when emulating a PC XT? */ |
4055 |
|
|
4056 |
|
/* IDE controllers: */ |
4057 |
|
if (diskimage_exist(machine, 0, DISKIMAGE_IDE) || |
4058 |
|
diskimage_exist(machine, 1, DISKIMAGE_IDE)) |
4059 |
|
dev_wdc_init(machine, mem, X86_IO_BASE + 0x1f0, 14, 0); |
4060 |
|
if (diskimage_exist(machine, 2, DISKIMAGE_IDE) || |
4061 |
|
diskimage_exist(machine, 3, DISKIMAGE_IDE)) |
4062 |
|
dev_wdc_init(machine, mem, X86_IO_BASE + 0x170, 15, 2); |
4063 |
|
|
4064 |
|
/* Floppy controller at irq 6 */ |
4065 |
|
snprintf(tmpstr, sizeof(tmpstr) - 1, "fdc addr=0x%llx irq=6", |
4066 |
|
(long long)(X86_IO_BASE + 0x3f0)); |
4067 |
|
device_add(machine, tmpstr); |
4068 |
|
|
4069 |
|
/* TODO: sound blaster (eventually) at irq 7? */ |
4070 |
|
|
4071 |
|
/* TODO: parallel port */ |
4072 |
|
|
4073 |
|
/* Serial ports: (TODO: 8250 for PC XT?) */ |
4074 |
|
dev_ns16550_init(machine, mem, X86_IO_BASE + 0x3f8, 4, 1, 0, "com1"); |
4075 |
|
dev_ns16550_init(machine, mem, X86_IO_BASE + 0x378, 3, 1, 0, "com2"); |
4076 |
|
|
4077 |
|
/* VGA + keyboard: */ |
4078 |
|
dev_vga_init(machine, mem, 0xa0000ULL, X86_IO_BASE + 0x3c0, |
4079 |
|
"Generic x86 PC"); |
4080 |
|
machine->main_console_handle = dev_pckbc_init(machine, |
4081 |
|
mem, X86_IO_BASE + 0x60, PCKBC_8042, 1, 12, 1, 1); |
4082 |
|
|
4083 |
|
if (machine->prom_emulation) |
4084 |
|
pc_bios_init(cpu); |
4085 |
|
|
4086 |
|
if (!machine->use_x11 && !quiet_mode) |
4087 |
|
fprintf(stderr, "-------------------------------------" |
4088 |
|
"------------------------------------------\n" |
4089 |
|
"\n WARNING! You are emulating a PC without -X. " |
4090 |
|
"You will miss graphical output!\n\n" |
4091 |
|
"-------------------------------------" |
4092 |
|
"------------------------------------------\n"); |
4093 |
|
break; |
4094 |
|
|
4095 |
default: |
default: |
4096 |
fatal("Unknown emulation type %i\n", machine->machine_type); |
fatal("Unknown emulation type %i\n", machine->machine_type); |
4097 |
exit(1); |
exit(1); |
4159 |
case MACHINE_NETGEAR: |
case MACHINE_NETGEAR: |
4160 |
m->physical_ram_in_mb = 16; |
m->physical_ram_in_mb = 16; |
4161 |
break; |
break; |
4162 |
case MACHINE_WRT54G: |
case MACHINE_EVBMIPS: |
4163 |
m->physical_ram_in_mb = 32; |
m->physical_ram_in_mb = 64; |
4164 |
|
break; |
4165 |
|
case MACHINE_PSP: |
4166 |
|
/* |
4167 |
|
* According to |
4168 |
|
* http://wiki.ps2dev.org/psp:memory_map: |
4169 |
|
* 0×08000000 = 8 MB kernel memory |
4170 |
|
* 0×08800000 = 24 MB user memory |
4171 |
|
*/ |
4172 |
|
m->physical_ram_in_mb = 8 + 24; |
4173 |
break; |
break; |
4174 |
case MACHINE_ARC: |
case MACHINE_ARC: |
4175 |
switch (m->machine_subtype) { |
switch (m->machine_subtype) { |
4199 |
case MACHINE_TESTURISC: |
case MACHINE_TESTURISC: |
4200 |
m->physical_ram_in_mb = 2; |
m->physical_ram_in_mb = 2; |
4201 |
break; |
break; |
4202 |
|
case MACHINE_X86: |
4203 |
|
if (m->machine_subtype == MACHINE_X86_XT) |
4204 |
|
m->physical_ram_in_mb = 1; |
4205 |
|
break; |
4206 |
} |
} |
4207 |
} |
} |
4208 |
|
|
4209 |
/* Special hack for WRT54G and hpcmips machines: */ |
/* Special hack for hpcmips machines: */ |
4210 |
if (m->machine_type == MACHINE_WRT54G || |
if (m->machine_type == MACHINE_HPCMIPS) { |
|
m->machine_type == MACHINE_HPCMIPS) { |
|
4211 |
m->dbe_on_nonexistant_memaccess = 0; |
m->dbe_on_nonexistant_memaccess = 0; |
4212 |
} |
} |
4213 |
|
|
4303 |
case MACHINE_NETGEAR: |
case MACHINE_NETGEAR: |
4304 |
m->cpu_name = strdup("RC32334"); |
m->cpu_name = strdup("RC32334"); |
4305 |
break; |
break; |
|
case MACHINE_WRT54G: |
|
|
m->cpu_name = strdup("BCM4712"); |
|
|
break; |
|
4306 |
case MACHINE_ARC: |
case MACHINE_ARC: |
4307 |
switch (m->machine_subtype) { |
switch (m->machine_subtype) { |
4308 |
case MACHINE_ARC_JAZZ_PICA: |
case MACHINE_ARC_JAZZ_PICA: |
4334 |
if (m->cpu_name == NULL) |
if (m->cpu_name == NULL) |
4335 |
m->cpu_name = strdup("R4400"); |
m->cpu_name = strdup("R4400"); |
4336 |
break; |
break; |
4337 |
|
case MACHINE_EVBMIPS: |
4338 |
|
switch (m->machine_subtype) { |
4339 |
|
case MACHINE_EVBMIPS_MALTA: |
4340 |
|
m->cpu_name = strdup("5Kc"); |
4341 |
|
break; |
4342 |
|
case MACHINE_EVBMIPS_PB1000: |
4343 |
|
m->cpu_name = strdup("AU1000"); |
4344 |
|
break; |
4345 |
|
default:fatal("Unimpl. evbmips.\n"); |
4346 |
|
exit(1); |
4347 |
|
} |
4348 |
|
break; |
4349 |
|
case MACHINE_PSP: |
4350 |
|
m->cpu_name = strdup("Allegrex"); |
4351 |
|
break; |
4352 |
|
|
4353 |
/* PowerPC: */ |
/* PowerPC: */ |
4354 |
case MACHINE_BAREPPC: |
case MACHINE_BAREPPC: |
4419 |
case MACHINE_TESTALPHA: |
case MACHINE_TESTALPHA: |
4420 |
m->cpu_name = strdup("EV4"); |
m->cpu_name = strdup("EV4"); |
4421 |
break; |
break; |
4422 |
|
|
4423 |
|
/* ARM: */ |
4424 |
|
case MACHINE_BAREARM: |
4425 |
|
case MACHINE_TESTARM: |
4426 |
|
m->cpu_name = strdup("ARM"); |
4427 |
|
break; |
4428 |
|
|
4429 |
|
/* x86: */ |
4430 |
|
case MACHINE_BAREX86: |
4431 |
|
case MACHINE_X86: |
4432 |
|
if (m->machine_subtype == MACHINE_X86_XT) |
4433 |
|
m->cpu_name = strdup("8086"); |
4434 |
|
else |
4435 |
|
m->cpu_name = strdup("AMD64"); |
4436 |
|
break; |
4437 |
} |
} |
4438 |
|
|
4439 |
if (m->cpu_name == NULL) { |
if (m->cpu_name == NULL) { |
4682 |
* entries will appear in normal order when listed. :-) |
* entries will appear in normal order when listed. :-) |
4683 |
*/ |
*/ |
4684 |
|
|
4685 |
|
/* X86 machine: */ |
4686 |
|
me = machine_entry_new("x86-based PC", ARCH_X86, |
4687 |
|
MACHINE_X86, 2, 2); |
4688 |
|
me->aliases[0] = "pc"; |
4689 |
|
me->aliases[1] = "x86"; |
4690 |
|
me->subtype[0] = machine_entry_subtype_new("Generic PC", |
4691 |
|
MACHINE_X86_GENERIC, 1); |
4692 |
|
me->subtype[0]->aliases[0] = "generic"; |
4693 |
|
me->subtype[1] = machine_entry_subtype_new("PC XT", MACHINE_X86_XT, 1); |
4694 |
|
me->subtype[1]->aliases[0] = "xt"; |
4695 |
|
if (cpu_family_ptr_by_number(ARCH_X86) != NULL) { |
4696 |
|
me->next = first_machine_entry; first_machine_entry = me; |
4697 |
|
} |
4698 |
|
|
4699 |
/* Walnut: (NetBSD/evbppc) */ |
/* Walnut: (NetBSD/evbppc) */ |
4700 |
me = machine_entry_new("Walnut evaluation board", ARCH_PPC, |
me = machine_entry_new("Walnut evaluation board", ARCH_PPC, |
4701 |
MACHINE_WALNUT, 2, 0); |
MACHINE_WALNUT, 2, 0); |
4737 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
4738 |
} |
} |
4739 |
|
|
4740 |
|
/* Test-machine for ARM: */ |
4741 |
|
me = machine_entry_new("Test-machine for ARM", ARCH_ARM, |
4742 |
|
MACHINE_TESTARM, 1, 0); |
4743 |
|
me->aliases[0] = "testarm"; |
4744 |
|
if (cpu_family_ptr_by_number(ARCH_ARM) != NULL) { |
4745 |
|
me->next = first_machine_entry; first_machine_entry = me; |
4746 |
|
} |
4747 |
|
|
4748 |
/* Test-machine for Alpha: */ |
/* Test-machine for Alpha: */ |
4749 |
me = machine_entry_new("Test-machine for Alpha", ARCH_ALPHA, |
me = machine_entry_new("Test-machine for Alpha", ARCH_ALPHA, |
4750 |
MACHINE_TESTALPHA, 1, 0); |
MACHINE_TESTALPHA, 1, 0); |
4817 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
4818 |
} |
} |
4819 |
|
|
4820 |
|
/* Playstation Portable: */ |
4821 |
|
me = machine_entry_new("Playstation Portable", ARCH_MIPS, |
4822 |
|
MACHINE_PSP, 1, 0); |
4823 |
|
me->aliases[0] = "psp"; |
4824 |
|
if (cpu_family_ptr_by_number(ARCH_MIPS) != NULL) { |
4825 |
|
me->next = first_machine_entry; first_machine_entry = me; |
4826 |
|
} |
4827 |
|
|
4828 |
/* NetGear: */ |
/* NetGear: */ |
4829 |
me = machine_entry_new("NetGear WG602", ARCH_MIPS, |
me = machine_entry_new("NetGear WG602", ARCH_MIPS, |
4830 |
MACHINE_NETGEAR, 2, 0); |
MACHINE_NETGEAR, 2, 0); |
4849 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
4850 |
} |
} |
4851 |
|
|
4852 |
|
/* Evaluation Boards (MALTA etc): */ |
4853 |
|
me = machine_entry_new("evbmips", ARCH_MIPS, |
4854 |
|
MACHINE_EVBMIPS, 1, 2); |
4855 |
|
me->aliases[0] = "evbmips"; |
4856 |
|
me->subtype[0] = machine_entry_subtype_new("Malta", |
4857 |
|
MACHINE_EVBMIPS_MALTA, 1); |
4858 |
|
me->subtype[0]->aliases[0] = "malta"; |
4859 |
|
me->subtype[1] = machine_entry_subtype_new("PB1000", |
4860 |
|
MACHINE_EVBMIPS_PB1000, 1); |
4861 |
|
me->subtype[1]->aliases[0] = "pb1000"; |
4862 |
|
if (cpu_family_ptr_by_number(ARCH_MIPS) != NULL) { |
4863 |
|
me->next = first_machine_entry; first_machine_entry = me; |
4864 |
|
} |
4865 |
|
|
4866 |
/* Macintosh (PPC): */ |
/* Macintosh (PPC): */ |
4867 |
me = machine_entry_new("Macintosh (PPC)", ARCH_PPC, |
me = machine_entry_new("Macintosh (PPC)", ARCH_PPC, |
4868 |
MACHINE_MACPPC, 1, 2); |
MACHINE_MACPPC, 1, 2); |
4877 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
4878 |
} |
} |
4879 |
|
|
|
/* Linksys: */ |
|
|
me = machine_entry_new("Linksys WRT54G", ARCH_MIPS, |
|
|
MACHINE_WRT54G, 2, 0); |
|
|
me->aliases[0] = "linksys"; |
|
|
me->aliases[1] = "wrt54g"; |
|
|
if (cpu_family_ptr_by_number(ARCH_MIPS) != NULL) { |
|
|
me->next = first_machine_entry; first_machine_entry = me; |
|
|
} |
|
|
|
|
4880 |
/* HPCmips: */ |
/* HPCmips: */ |
4881 |
me = machine_entry_new("Handheld MIPS (HPC)", |
me = machine_entry_new("Handheld MIPS (HPC)", |
4882 |
ARCH_MIPS, MACHINE_HPCMIPS, 2, 8); |
ARCH_MIPS, MACHINE_HPCMIPS, 2, 8); |
4914 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
4915 |
} |
} |
4916 |
|
|
4917 |
|
/* Generic "bare" X86 machine: */ |
4918 |
|
me = machine_entry_new("Generic \"bare\" X86 machine", ARCH_X86, |
4919 |
|
MACHINE_BAREX86, 1, 0); |
4920 |
|
me->aliases[0] = "barex86"; |
4921 |
|
if (cpu_family_ptr_by_number(ARCH_X86) != NULL) { |
4922 |
|
me->next = first_machine_entry; first_machine_entry = me; |
4923 |
|
} |
4924 |
|
|
4925 |
/* Generic "bare" URISC machine: */ |
/* Generic "bare" URISC machine: */ |
4926 |
me = machine_entry_new("Generic \"bare\" URISC machine", ARCH_URISC, |
me = machine_entry_new("Generic \"bare\" URISC machine", ARCH_URISC, |
4927 |
MACHINE_BAREURISC, 1, 0); |
MACHINE_BAREURISC, 1, 0); |
4962 |
me->next = first_machine_entry; first_machine_entry = me; |
me->next = first_machine_entry; first_machine_entry = me; |
4963 |
} |
} |
4964 |
|
|
4965 |
|
/* Generic "bare" ARM machine: */ |
4966 |
|
me = machine_entry_new("Generic \"bare\" ARM machine", ARCH_ARM, |
4967 |
|
MACHINE_BAREARM, 1, 0); |
4968 |
|
me->aliases[0] = "barearm"; |
4969 |
|
if (cpu_family_ptr_by_number(ARCH_ARM) != NULL) { |
4970 |
|
me->next = first_machine_entry; first_machine_entry = me; |
4971 |
|
} |
4972 |
|
|
4973 |
/* Generic "bare" Alpha machine: */ |
/* Generic "bare" Alpha machine: */ |
4974 |
me = machine_entry_new("Generic \"bare\" Alpha machine", ARCH_ALPHA, |
me = machine_entry_new("Generic \"bare\" Alpha machine", ARCH_ALPHA, |
4975 |
MACHINE_BAREALPHA, 1, 0); |
MACHINE_BAREALPHA, 1, 0); |