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/* |
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* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: dev_pccmos.c,v 1.22 2006/02/09 20:02:59 debug Exp $ |
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* |
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* PC CMOS/RTC device (ISA ports 0x70 and 0x71). |
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* |
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* The main point of this device is to be a "PC style wrapper" for accessing |
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* the MC146818 (the RTC). In most other respects, this device is bogus, and |
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* just acts as a 256-byte RAM device. |
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*/ |
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|
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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|
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#include "cpu.h" |
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#include "device.h" |
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#include "devices.h" |
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#include "emul.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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|
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|
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#define DEV_PCCMOS_LENGTH 2 |
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#define PCCMOS_MC146818_FAKE_ADDR 0x1d00000000ULL |
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|
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struct pccmos_data { |
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unsigned char select; |
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unsigned char ram[256]; |
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}; |
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|
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|
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/* |
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* dev_pccmos_access(): |
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*/ |
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DEVICE_ACCESS(pccmos) |
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{ |
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struct pccmos_data *d = (struct pccmos_data *) extra; |
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uint64_t idata = 0, odata = 0; |
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unsigned char b = 0; |
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int r = 1; |
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|
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if (writeflag == MEM_WRITE) |
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b = idata = memory_readmax64(cpu, data, len); |
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|
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/* |
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* Accesses to CMOS register 0 .. 0xd are rerouted to the |
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* RTC; all other access are treated as CMOS RAM read/writes. |
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*/ |
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|
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if ((relative_addr & 1) == 0) { |
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if (writeflag == MEM_WRITE) { |
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d->select = idata; |
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if (idata <= 0x0d) { |
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r = cpu->memory_rw(cpu, cpu->mem, |
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PCCMOS_MC146818_FAKE_ADDR, &b, 1, |
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MEM_WRITE, PHYSICAL); |
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} |
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} else |
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odata = d->select; |
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} else { |
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if (d->select <= 0x0d) { |
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if (writeflag == MEM_WRITE) { |
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r = cpu->memory_rw(cpu, cpu->mem, |
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PCCMOS_MC146818_FAKE_ADDR + 1, &b, 1, |
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MEM_WRITE, PHYSICAL); |
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} else { |
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r = cpu->memory_rw(cpu, cpu->mem, |
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PCCMOS_MC146818_FAKE_ADDR + 1, &b, 1, |
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MEM_READ, PHYSICAL); |
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odata = b; |
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} |
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} else { |
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if (writeflag == MEM_WRITE) |
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d->ram[d->select] = idata; |
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else |
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odata = d->ram[d->select]; |
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} |
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} |
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|
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if (r == 0) |
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fatal("[ pccmos: memory_rw() error! ]\n"); |
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|
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if (writeflag == MEM_READ) |
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memory_writemax64(cpu, data, len, odata); |
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|
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return 1; |
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} |
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|
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|
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DEVINIT(pccmos) |
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{ |
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struct pccmos_data *d = malloc(sizeof(struct pccmos_data)); |
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int irq_nr, type = MC146818_PC_CMOS, len = DEV_PCCMOS_LENGTH; |
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|
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if (d == NULL) { |
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fprintf(stderr, "out of memory\n"); |
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exit(1); |
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} |
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memset(d, 0, sizeof(struct pccmos_data)); |
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|
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/* |
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* Different machines use different IRQ schemes. |
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*/ |
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switch (devinit->machine->machine_type) { |
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case MACHINE_CATS: |
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case MACHINE_NETWINDER: |
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irq_nr = 32 + 8; |
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type = MC146818_CATS; |
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d->ram[0x48] = 20; /* century */ |
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len = DEV_PCCMOS_LENGTH * 2; |
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break; |
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case MACHINE_ALGOR: |
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irq_nr = 8 + 8; |
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type = MC146818_ALGOR; |
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break; |
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case MACHINE_ARC: |
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fatal("\nARC pccmos: TODO\n\n"); |
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irq_nr = 8 + 8; /* TODO */ |
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type = MC146818_ALGOR; |
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break; |
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case MACHINE_EVBMIPS: |
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/* Malta etc. */ |
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irq_nr = 8 + 8; |
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type = MC146818_ALGOR; |
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break; |
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case MACHINE_X86: |
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irq_nr = 16; /* "No" irq */ |
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break; |
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case MACHINE_BEBOX: |
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case MACHINE_PREP: |
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case MACHINE_MVMEPPC: |
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irq_nr = 32 + 8; |
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break; |
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case MACHINE_SHARK: |
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case MACHINE_IYONIX: |
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/* TODO */ |
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irq_nr = 32 + 8; |
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break; |
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default:fatal("devinit_pccmos(): unimplemented machine type" |
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" %i\n", devinit->machine->machine_type); |
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exit(1); |
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} |
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|
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memory_device_register(devinit->machine->memory, devinit->name, |
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devinit->addr, len, dev_pccmos_access, (void *)d, |
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DM_DEFAULT, NULL); |
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|
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dev_mc146818_init(devinit->machine, devinit->machine->memory, |
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PCCMOS_MC146818_FAKE_ADDR, irq_nr, type, 1); |
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|
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return 1; |
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} |
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