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/* |
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* Copyright (C) 2003-2006 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: dev_gt.c,v 1.40 2006/01/14 11:29:36 debug Exp $ |
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* |
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* Galileo Technology GT-64xxx PCI controller. |
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* |
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* GT-64011 Used in Cobalt machines. |
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* GT-64120 Used in evbmips machines (Malta). |
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* GT-64260 Used in mvmeppc machines. |
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* |
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* TODO: This more or less just a dummy device, so far. It happens to work |
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* with some NetBSD ports in some cases, and perhaps with Linux too, |
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* but it is not really working for anything else. |
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*/ |
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|
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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|
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#include "bus_pci.h" |
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#include "cpu.h" |
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#include "devices.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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|
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|
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#define TICK_SHIFT 14 |
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|
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/* #define debug fatal */ |
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|
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#define PCI_PRODUCT_GALILEO_GT64011 0x4146 /* GT-64011 */ |
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#define PCI_PRODUCT_GALILEO_GT64120 0x4620 /* GT-64120 */ |
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#define PCI_PRODUCT_GALILEO_GT64260 0x6430 /* GT-64260 */ |
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|
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struct gt_data { |
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int irqnr; |
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int pciirq; |
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int type; |
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|
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struct pci_data *pci_data; |
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}; |
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|
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|
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/* |
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* dev_gt_tick(): |
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*/ |
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void dev_gt_tick(struct cpu *cpu, void *extra) |
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{ |
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struct gt_data *gt_data = extra; |
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|
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cpu_interrupt(cpu, gt_data->irqnr); |
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} |
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|
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|
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/* |
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* dev_gt_access(): |
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*/ |
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DEVICE_ACCESS(gt) |
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{ |
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uint64_t idata = 0, odata = 0; |
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int bus, dev, func, reg; |
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size_t i; |
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struct gt_data *d = extra; |
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|
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if (writeflag == MEM_WRITE) |
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idata = memory_readmax64(cpu, data, len); |
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|
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switch (relative_addr) { |
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|
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case 0x48: |
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switch (d->type) { |
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case PCI_PRODUCT_GALILEO_GT64120: |
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/* |
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* This is needed for Linux on Malta, according |
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* to Alec Voropay. (TODO: Remove this hack when |
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* things have stabilized.) |
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*/ |
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if (writeflag == MEM_READ) { |
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odata = 0x18000000 >> 21; |
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debug("[ gt: read from 0x48: 0x%08x ]\n", |
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(int)odata); |
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} |
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break; |
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default: |
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fatal("[ gt: access to 0x48? (type %i) ]\n", d->type); |
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} |
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break; |
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|
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case 0xc18: |
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if (writeflag == MEM_WRITE) { |
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debug("[ gt: write to 0xc18: 0x%08x ]\n", (int)idata); |
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return 1; |
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} else { |
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odata = 0xffffffffULL; |
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/* |
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* ??? interrupt something... |
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* |
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* TODO: Remove this hack when things have stabilized. |
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*/ |
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odata = 0x00000100; |
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/* netbsd/cobalt cobalt/machdep.c:cpu_intr() */ |
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|
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cpu_interrupt_ack(cpu, d->irqnr); |
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|
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debug("[ gt: read from 0xc18 (0x%08x) ]\n", (int)odata); |
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} |
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break; |
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|
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case 0xc34: /* GT_PCI0_INTR_ACK */ |
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odata = cpu->machine->isa_pic_data.last_int; |
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cpu_interrupt_ack(cpu, 8 + odata); |
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break; |
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|
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case 0xcf8: /* PCI ADDR */ |
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if (cpu->byte_order != EMUL_LITTLE_ENDIAN) { |
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fatal("[ gt: TODO: big endian PCI access ]\n"); |
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exit(1); |
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} |
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bus_pci_decompose_1(idata, &bus, &dev, &func, ®); |
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bus_pci_setaddr(cpu, d->pci_data, bus, dev, func, reg); |
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break; |
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|
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case 0xcfc: /* PCI DATA */ |
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if (cpu->byte_order != EMUL_LITTLE_ENDIAN) { |
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fatal("[ gt: TODO: big endian PCI access ]\n"); |
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exit(1); |
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} |
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bus_pci_data_access(cpu, d->pci_data, writeflag == MEM_READ? |
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&odata : &idata, len, writeflag); |
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break; |
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|
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default: |
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if (writeflag == MEM_READ) { |
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debug("[ gt: read from addr 0x%x ]\n", |
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(int)relative_addr); |
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} else { |
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debug("[ gt: write to addr 0x%x:", (int)relative_addr); |
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for (i=0; i<len; i++) |
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debug(" %02x", data[i]); |
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debug(" ]\n"); |
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} |
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} |
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|
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if (writeflag == MEM_READ) |
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memory_writemax64(cpu, data, len, odata); |
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|
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return 1; |
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} |
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|
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|
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/* |
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* dev_gt_init(): |
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* |
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* Initialize a GT device. Return a pointer to the pci_data used, so that |
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* the caller may add PCI devices. First, however, we add the GT device |
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* itself. |
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*/ |
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struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem, |
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uint64_t baseaddr, int irq_nr, int pciirq, int type) |
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{ |
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struct gt_data *d; |
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uint64_t pci_portbase = 0, pci_membase = 0; |
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uint64_t isa_portbase = 0, isa_membase = 0; |
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int isa_irqbase = 0, pci_irqbase = 0; |
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uint64_t pci_io_offset = 0, pci_mem_offset = 0; |
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char *gt_name = "NO"; |
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|
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d = malloc(sizeof(struct gt_data)); |
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if (d == NULL) { |
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fprintf(stderr, "out of memory\n"); |
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exit(1); |
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} |
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memset(d, 0, sizeof(struct gt_data)); |
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d->irqnr = irq_nr; |
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d->pciirq = pciirq; |
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|
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switch (type) { |
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case 11: |
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/* Cobalt: */ |
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d->type = PCI_PRODUCT_GALILEO_GT64011; |
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gt_name = "gt64011"; |
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pci_io_offset = 0; |
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pci_mem_offset = 0; |
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pci_portbase = 0x10000000ULL; |
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pci_membase = 0x10100000ULL; |
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pci_irqbase = 0; |
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isa_portbase = 0x10000000ULL; |
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isa_membase = 0x10100000ULL; |
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isa_irqbase = 8; |
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break; |
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case 120: |
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/* EVBMIPS (Malta): */ |
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d->type = PCI_PRODUCT_GALILEO_GT64120; |
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gt_name = "gt64120"; |
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pci_io_offset = 0; |
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pci_mem_offset = 0; |
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pci_portbase = 0x18000000ULL; |
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pci_membase = 0x10000000ULL; |
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pci_irqbase = 8; |
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isa_portbase = 0x18000000ULL; |
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isa_membase = 0x10000000ULL; |
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isa_irqbase = 8; |
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break; |
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case 260: |
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/* MVMEPPC (mvme5500): */ |
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d->type = PCI_PRODUCT_GALILEO_GT64260; |
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gt_name = "gt64260"; |
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pci_io_offset = 0; |
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pci_mem_offset = 0; |
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pci_portbase = 0x18000000ULL; |
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pci_membase = 0x10000000ULL; |
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pci_irqbase = 8; |
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isa_portbase = 0x18000000ULL; |
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isa_membase = 0x10000000ULL; |
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isa_irqbase = 8; |
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break; |
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default:fatal("dev_gt_init(): unimplemented GT type (%i).\n", type); |
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exit(1); |
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} |
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|
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d->pci_data = bus_pci_init(machine, |
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pciirq, pci_io_offset, pci_mem_offset, |
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pci_portbase, pci_membase, pci_irqbase, |
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isa_portbase, isa_membase, isa_irqbase); |
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|
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/* |
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* According to NetBSD/cobalt: |
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* pchb0 at pci0 dev 0 function 0: Galileo GT-64011 |
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* System Controller, rev 1 |
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*/ |
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bus_pci_add(machine, d->pci_data, mem, 0, 0, 0, gt_name); |
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|
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memory_device_register(mem, "gt", baseaddr, DEV_GT_LENGTH, |
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dev_gt_access, d, DM_DEFAULT, NULL); |
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machine_add_tickfunction(machine, dev_gt_tick, d, TICK_SHIFT); |
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|
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return d->pci_data; |
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} |
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