/[gxemul]/upstream/0.3.8/src/cpus/cpu_m68k_instr.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Contents of /upstream/0.3.8/src/cpus/cpu_m68k_instr.c

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Revision 23 - (show annotations)
Mon Oct 8 16:19:43 2007 UTC (16 years, 7 months ago) by dpavlin
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0.3.8
1 /*
2 * Copyright (C) 2005-2006 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: cpu_m68k_instr.c,v 1.5 2006/02/09 22:40:27 debug Exp $
29 *
30 * Motorola 68K instructions.
31 *
32 * Individual functions should keep track of cpu->n_translated_instrs.
33 * (n_translated_instrs is automatically increased by 1 for each function
34 * call. If no instruction was executed, then it should be decreased. If, say,
35 * 4 instructions were combined into one function and executed, then it should
36 * be increased by 3.)
37 */
38
39
40 /*
41 * nop: Do nothing.
42 */
43 X(nop)
44 {
45 }
46
47
48 /*****************************************************************************/
49
50
51 X(end_of_page)
52 {
53 /* Update the PC: (offset 0, but on the next page) */
54 cpu->pc &= ~((M68K_IC_ENTRIES_PER_PAGE-1) << 1);
55 cpu->pc += (M68K_IC_ENTRIES_PER_PAGE << 1);
56
57 /* Find the new physical page and update the translation pointers: */
58 m68k_pc_to_pointers(cpu);
59
60 /* end_of_page doesn't count as an executed instruction: */
61 cpu->n_translated_instrs --;
62 }
63
64
65 /*****************************************************************************/
66
67
68 /*
69 * m68k_instr_to_be_translated():
70 *
71 * Translate an instruction word into an m68k_instr_call. ic is filled in with
72 * valid data for the translated instruction, or a "nothing" instruction if
73 * there was a translation failure. The newly translated instruction is then
74 * executed.
75 */
76 X(to_be_translated)
77 {
78 uint32_t addr, low_pc;
79 uint16_t iword;
80 #ifdef DYNTRANS_BACKEND
81 int simple = 0;
82 #endif
83 unsigned char *page;
84 unsigned char ib[2];
85 int main_opcode;
86 /* void (*samepage_function)(struct cpu *, struct m68k_instr_call *);*/
87
88 /* Figure out the (virtual) address of the instruction: */
89 low_pc = ((size_t)ic - (size_t)cpu->cd.m68k.cur_ic_page)
90 / sizeof(struct m68k_instr_call);
91 addr = cpu->pc & ~((M68K_IC_ENTRIES_PER_PAGE-1) <<
92 M68K_INSTR_ALIGNMENT_SHIFT);
93 addr += (low_pc << M68K_INSTR_ALIGNMENT_SHIFT);
94 cpu->pc = addr;
95 addr &= ~((1 << M68K_INSTR_ALIGNMENT_SHIFT) - 1);
96
97 /* Read the instruction word from memory: */
98 page = cpu->cd.m68k.host_load[addr >> 12];
99
100 if (page != NULL) {
101 /* fatal("TRANSLATION HIT!\n"); */
102 memcpy(ib, page + (addr & 0xfff), sizeof(ib));
103 } else {
104 /* fatal("TRANSLATION MISS!\n"); */
105 if (!cpu->memory_rw(cpu, cpu->mem, addr, ib,
106 sizeof(ib), MEM_READ, CACHE_INSTRUCTION)) {
107 fatal("to_be_translated(): "
108 "read failed: TODO\n");
109 goto bad;
110 }
111 }
112
113 iword = *((uint16_t *)&ib[0]);
114
115 #ifdef HOST_LITTLE_ENDIAN
116 iword = ((iword & 0xff) << 8) |
117 ((iword & 0xff00) >> 8);
118 #endif
119
120
121 fatal("M68K: iword = 0x%04x\n", iword);
122
123
124 #define DYNTRANS_TO_BE_TRANSLATED_HEAD
125 #include "cpu_dyntrans.c"
126 #undef DYNTRANS_TO_BE_TRANSLATED_HEAD
127
128
129 /*
130 * Translate the instruction:
131 */
132
133
134 /* TODO */
135
136
137 main_opcode = iword;
138
139 switch (main_opcode) {
140
141 default:goto bad;
142 }
143
144
145 #define DYNTRANS_TO_BE_TRANSLATED_TAIL
146 #include "cpu_dyntrans.c"
147 #undef DYNTRANS_TO_BE_TRANSLATED_TAIL
148 }
149

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