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/* |
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* Copyright (C) 2003-2005 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: dev_ns16550.c,v 1.41 2005/09/30 13:33:01 debug Exp $ |
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* |
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* NS16550 serial controller. |
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* |
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* |
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* TODO: Implement the FIFO. |
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*/ |
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|
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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|
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#include "console.h" |
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#include "cpu.h" |
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#include "device.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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|
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#include "comreg.h" |
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|
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|
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/* #define debug fatal */ |
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|
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#define TICK_SHIFT 14 |
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#define DEV_NS16550_LENGTH 8 |
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|
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struct ns_data { |
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int addrmult; |
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int in_use; |
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int irqnr; |
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char *name; |
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int console_handle; |
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int enable_fifo; |
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|
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unsigned char reg[DEV_NS16550_LENGTH]; |
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unsigned char fcr; /* FIFO control register */ |
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|
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int dlab; /* Divisor Latch Access bit */ |
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int divisor; |
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|
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int databits; |
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char parity; |
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const char *stopbits; |
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}; |
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|
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|
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/* |
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* dev_ns16550_tick(): |
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* |
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* This function is called at regular intervals. An interrupt is caused to the |
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* CPU if there is a character available for reading, or if the transmitter |
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* slot is empty (i.e. the ns16550 is ready to transmit). |
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*/ |
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void dev_ns16550_tick(struct cpu *cpu, void *extra) |
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{ |
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struct ns_data *d = extra; |
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|
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d->reg[com_iir] &= ~IIR_RXRDY; |
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if (d->in_use && console_charavail(d->console_handle)) |
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d->reg[com_iir] |= IIR_RXRDY; |
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|
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/* |
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* If interrupts are enabled, and interrupts are pending, then |
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* cause a CPU interrupt. |
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*/ |
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if (((d->reg[com_ier] & IER_ETXRDY) && (d->reg[com_iir] & IIR_TXRDY)) || |
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((d->reg[com_ier] & IER_ERXRDY) && (d->reg[com_iir] & IIR_RXRDY))) { |
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d->reg[com_iir] &= ~IIR_NOPEND; |
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if (d->reg[com_mcr] & MCR_IENABLE) |
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cpu_interrupt(cpu, d->irqnr); |
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} else { |
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d->reg[com_iir] |= IIR_NOPEND; |
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cpu_interrupt_ack(cpu, d->irqnr); |
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} |
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} |
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|
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|
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/* |
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* dev_ns16550_access(): |
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*/ |
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int dev_ns16550_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
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uint64_t idata = 0, odata=0; |
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int i; |
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struct ns_data *d = extra; |
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|
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idata = memory_readmax64(cpu, data, len); |
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|
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/* The NS16550 should be accessed using byte read/writes: */ |
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if (len != 1) |
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fatal("[ ns16550 (%s): len=%i, idata=0x%16llx! ]\n", |
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d->name, len, (long long)idata); |
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|
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/* |
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* Always ready to transmit: |
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*/ |
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d->reg[com_lsr] |= LSR_TXRDY | LSR_TSRE; |
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d->reg[com_msr] |= MSR_DCD | MSR_DSR | MSR_CTS; |
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|
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d->reg[com_iir] &= ~0xf0; |
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if (d->enable_fifo) |
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d->reg[com_iir] |= ((d->fcr << 5) & 0xc0); |
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|
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d->reg[com_lsr] &= ~LSR_RXRDY; |
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if (d->in_use && console_charavail(d->console_handle)) |
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d->reg[com_lsr] |= LSR_RXRDY; |
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|
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relative_addr /= d->addrmult; |
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|
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if (relative_addr >= DEV_NS16550_LENGTH) { |
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fatal("[ ns16550 (%s): outside register space? relative_addr=" |
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"0x%llx. bad addrmult? bad device length? ]\n", d->name, |
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(long long)relative_addr); |
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return 0; |
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} |
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|
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switch (relative_addr) { |
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|
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case com_data: /* data AND low byte of the divisor */ |
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/* Read/write of the Divisor value: */ |
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if (d->dlab) { |
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/* Write or read the low byte of the divisor: */ |
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if (writeflag == MEM_WRITE) |
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d->divisor = (d->divisor & 0xff00) | idata; |
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else |
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odata = d->divisor & 0xff; |
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break; |
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} |
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|
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/* Read/write of data: */ |
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if (writeflag == MEM_WRITE) { |
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if (d->reg[com_mcr] & MCR_LOOPBACK) |
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console_makeavail(d->console_handle, idata); |
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else |
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console_putchar(d->console_handle, idata); |
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d->reg[com_iir] |= IIR_TXRDY; |
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} else { |
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if (d->in_use) |
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odata = console_readchar(d->console_handle); |
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else |
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odata = 0; |
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} |
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dev_ns16550_tick(cpu, d); |
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break; |
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|
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case com_ier: /* interrupt enable AND high byte of the divisor */ |
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/* Read/write of the Divisor value: */ |
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if (d->dlab) { |
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if (writeflag == MEM_WRITE) { |
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/* Set the high byte of the divisor: */ |
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d->divisor = (d->divisor & 0xff) | (idata << 8); |
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debug("[ ns16550 (%s): speed set to %i bps ]\n", |
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d->name, (int)(115200 / d->divisor)); |
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} else |
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odata = d->divisor >> 8; |
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break; |
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} |
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|
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/* IER: */ |
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if (writeflag == MEM_WRITE) { |
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/* This is to supress Linux' behaviour */ |
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if (idata != 0) |
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debug("[ ns16550 (%s): write to ier: 0x%02x ]" |
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"\n", d->name, (int)idata); |
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|
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/* Needed for NetBSD 2.0.x, but not 1.6.2? */ |
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if (!(d->reg[com_ier] & IER_ETXRDY) |
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&& (idata & IER_ETXRDY)) |
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d->reg[com_iir] |= IIR_TXRDY; |
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|
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d->reg[com_ier] = idata; |
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dev_ns16550_tick(cpu, d); |
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} else |
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odata = d->reg[com_ier]; |
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break; |
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|
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case com_iir: /* interrupt identification (r), fifo control (w) */ |
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if (writeflag == MEM_WRITE) { |
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debug("[ ns16550 (%s): write to fifo control: 0x%02x ]" |
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"\n", d->name, (int)idata); |
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d->fcr = idata; |
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} else { |
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odata = d->reg[com_iir]; |
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debug("[ ns16550 (%s): read from iir: 0x%02x ]\n", |
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d->name, (int)odata); |
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dev_ns16550_tick(cpu, d); |
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} |
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break; |
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|
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case com_lsr: |
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if (writeflag == MEM_WRITE) { |
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debug("[ ns16550 (%s): write to lsr: 0x%02x ]\n", |
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d->name, (int)idata); |
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d->reg[com_lsr] = idata; |
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} else { |
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odata = d->reg[com_lsr]; |
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/* debug("[ ns16550 (%s): read from lsr: 0x%02x ]\n", |
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d->name, (int)odata); */ |
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} |
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break; |
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|
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case com_msr: |
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if (writeflag == MEM_WRITE) { |
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debug("[ ns16550 (%s): write to msr: 0x%02x ]\n", |
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d->name, (int)idata); |
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d->reg[com_msr] = idata; |
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} else { |
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odata = d->reg[com_msr]; |
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debug("[ ns16550 (%s): read from msr: 0x%02x ]\n", |
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d->name, (int)odata); |
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} |
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break; |
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|
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case com_lctl: |
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if (writeflag == MEM_WRITE) { |
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d->reg[com_lctl] = idata; |
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switch (idata & 0x7) { |
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case 0: d->databits = 5; d->stopbits = "1"; break; |
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case 1: d->databits = 6; d->stopbits = "1"; break; |
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case 2: d->databits = 7; d->stopbits = "1"; break; |
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case 3: d->databits = 8; d->stopbits = "1"; break; |
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case 4: d->databits = 5; d->stopbits = "1.5"; break; |
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case 5: d->databits = 6; d->stopbits = "2"; break; |
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case 6: d->databits = 7; d->stopbits = "2"; break; |
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case 7: d->databits = 8; d->stopbits = "2"; break; |
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} |
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switch ((idata & 0x38) / 0x8) { |
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case 0: d->parity = 'N'; break; /* none */ |
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case 1: d->parity = 'O'; break; /* odd */ |
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case 2: d->parity = '?'; break; |
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case 3: d->parity = 'E'; break; /* even */ |
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case 4: d->parity = '?'; break; |
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case 5: d->parity = 'Z'; break; /* zero */ |
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case 6: d->parity = '?'; break; |
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case 7: d->parity = 'o'; break; /* one */ |
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} |
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|
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d->dlab = idata & 0x80? 1 : 0; |
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|
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debug("[ ns16550 (%s): write to lctl: 0x%02x (%s%s" |
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"setting mode %i%c%s) ]\n", d->name, (int)idata, |
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d->dlab? "Divisor Latch access, " : "", |
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idata&0x40? "sending BREAK, " : "", |
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d->databits, d->parity, d->stopbits); |
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} else { |
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odata = d->reg[com_lctl]; |
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debug("[ ns16550 (%s): read from lctl: 0x%02x ]\n", |
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d->name, (int)odata); |
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} |
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break; |
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|
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case com_mcr: |
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if (writeflag == MEM_WRITE) { |
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d->reg[com_mcr] = idata; |
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debug("[ ns16550 (%s): write to mcr: 0x%02x ]\n", |
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d->name, (int)idata); |
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} else { |
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odata = d->reg[com_mcr]; |
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debug("[ ns16550 (%s): read from mcr: 0x%02x ]\n", |
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d->name, (int)odata); |
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} |
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break; |
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|
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default: |
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if (writeflag==MEM_READ) { |
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debug("[ ns16550 (%s): read from reg %i ]\n", |
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d->name, (int)relative_addr); |
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odata = d->reg[relative_addr]; |
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} else { |
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debug("[ ns16550 (%s): write to reg %i:", |
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d->name, (int)relative_addr); |
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for (i=0; i<len; i++) |
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debug(" %02x", data[i]); |
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debug(" ]\n"); |
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d->reg[relative_addr] = idata; |
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} |
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} |
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|
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if (writeflag == MEM_READ) |
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memory_writemax64(cpu, data, len, odata); |
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|
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return 1; |
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} |
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|
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|
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/* |
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* devinit_ns16550(): |
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*/ |
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int devinit_ns16550(struct devinit *devinit) |
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{ |
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struct ns_data *d = malloc(sizeof(struct ns_data)); |
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size_t nlen; |
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char *name; |
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|
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if (d == NULL) { |
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fprintf(stderr, "out of memory\n"); |
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exit(1); |
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} |
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memset(d, 0, sizeof(struct ns_data)); |
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d->irqnr = devinit->irq_nr; |
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d->addrmult = devinit->addr_mult; |
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d->in_use = devinit->in_use; |
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d->enable_fifo = 1; |
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d->dlab = 0; |
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d->divisor = 115200 / 9600; |
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d->databits = 8; |
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d->parity = 'N'; |
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d->stopbits = "1"; |
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d->name = devinit->name2 != NULL? devinit->name2 : ""; |
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d->console_handle = |
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console_start_slave(devinit->machine, devinit->name); |
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|
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nlen = strlen(devinit->name) + 10; |
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if (devinit->name2 != NULL) |
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nlen += strlen(devinit->name2); |
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name = malloc(nlen); |
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if (name == NULL) { |
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fprintf(stderr, "out of memory\n"); |
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exit(1); |
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} |
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if (devinit->name2 != NULL && devinit->name2[0]) |
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snprintf(name, nlen, "%s [%s]", devinit->name, devinit->name2); |
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else |
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snprintf(name, nlen, "%s", devinit->name); |
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|
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memory_device_register(devinit->machine->memory, name, devinit->addr, |
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DEV_NS16550_LENGTH * d->addrmult, dev_ns16550_access, d, |
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MEM_DEFAULT, NULL); |
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machine_add_tickfunction(devinit->machine, |
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dev_ns16550_tick, d, TICK_SHIFT); |
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|
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/* |
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* NOTE: Ugly cast into a pointer, because this is a convenient way |
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* to return the console handle to code in src/machine.c. |
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*/ |
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devinit->return_ptr = (void *)(size_t)d->console_handle; |
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|
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return 1; |
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} |
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