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/* |
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* Copyright (C) 2005 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: cpu_avr_instr.c,v 1.3 2005/09/17 22:34:52 debug Exp $ |
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* |
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* Atmel AVR (8-bit) instructions. |
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* |
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* Individual functions should keep track of cpu->n_translated_instrs. Since |
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* AVR uses variable length instructions, cpu->cd.avr.next_ic must also be |
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* increased by the number of "instruction slots" that were executed. (I.e. |
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* if an instruction occupying 6 bytes was executed, then next_ic should be |
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* increased by 3.) |
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* |
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* (n_translated_instrs is automatically increased by 1 for each function |
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* call. If no instruction was executed, then it should be decreased. If, say, |
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* 4 instructions were combined into one function and executed, then it should |
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* be increased by 3.) |
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*/ |
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|
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|
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/*****************************************************************************/ |
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|
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|
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/* |
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* nop: Do nothing. |
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*/ |
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X(nop) |
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{ |
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} |
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|
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|
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/* |
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* clX: Clear an sreg bit. |
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*/ |
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X(clc) { cpu->cd.avr.sreg &= ~AVR_SREG_C; } |
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X(clz) { cpu->cd.avr.sreg &= ~AVR_SREG_Z; } |
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X(cln) { cpu->cd.avr.sreg &= ~AVR_SREG_N; } |
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X(clv) { cpu->cd.avr.sreg &= ~AVR_SREG_V; } |
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X(cls) { cpu->cd.avr.sreg &= ~AVR_SREG_S; } |
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X(clh) { cpu->cd.avr.sreg &= ~AVR_SREG_H; } |
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X(clt) { cpu->cd.avr.sreg &= ~AVR_SREG_T; } |
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X(cli) { cpu->cd.avr.sreg &= ~AVR_SREG_I; } |
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|
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|
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/* |
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* ldi: Load immediate. |
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* |
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* arg[0]: ptr to register |
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* arg[1]: byte value |
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*/ |
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X(ldi) |
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{ |
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*(uint8_t *)(ic->arg[0]) = ic->arg[1]; |
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} |
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|
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|
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/* |
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* mov: Copy register. |
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* |
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* arg[0]: ptr to rr |
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* arg[1]: ptr to rd |
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*/ |
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X(mov) |
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{ |
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*(uint8_t *)(ic->arg[1]) = *(uint8_t *)(ic->arg[0]); |
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} |
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|
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|
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/* |
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* rjmp: Relative jump. |
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* |
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* arg[0]: relative offset |
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*/ |
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X(rjmp) |
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{ |
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uint32_t low_pc; |
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|
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cpu->cd.avr.extra_cycles ++; |
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|
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/* Calculate new PC from the next instruction + arg[0] */ |
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low_pc = ((size_t)ic - (size_t)cpu->cd.avr.cur_ic_page) / |
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sizeof(struct avr_instr_call); |
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cpu->pc &= ~((AVR_IC_ENTRIES_PER_PAGE-1) |
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<< AVR_INSTR_ALIGNMENT_SHIFT); |
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cpu->pc += (low_pc << AVR_INSTR_ALIGNMENT_SHIFT); |
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cpu->pc += (int32_t)ic->arg[0]; |
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|
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/* Find the new physical page and update the translation pointers: */ |
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avr_pc_to_pointers(cpu); |
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} |
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|
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|
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/* |
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* rjmp_samepage: Relative jump (to within the same translated page). |
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* |
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* arg[0] = pointer to new avr_instr_call |
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*/ |
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X(rjmp_samepage) |
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{ |
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cpu->cd.avr.extra_cycles ++; |
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cpu->cd.avr.next_ic = (struct avr_instr_call *) ic->arg[0]; |
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} |
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|
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|
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/* |
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* seX: Set an sreg bit. |
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*/ |
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X(sec) { cpu->cd.avr.sreg |= AVR_SREG_C; } |
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X(sez) { cpu->cd.avr.sreg |= AVR_SREG_Z; } |
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X(sen) { cpu->cd.avr.sreg |= AVR_SREG_N; } |
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X(sev) { cpu->cd.avr.sreg |= AVR_SREG_V; } |
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X(ses) { cpu->cd.avr.sreg |= AVR_SREG_S; } |
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X(seh) { cpu->cd.avr.sreg |= AVR_SREG_H; } |
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X(set) { cpu->cd.avr.sreg |= AVR_SREG_T; } |
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X(sei) { cpu->cd.avr.sreg |= AVR_SREG_I; } |
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|
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|
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/* |
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* swap: Swap nibbles. |
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* |
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* arg[0]: ptr to rd |
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*/ |
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X(swap) |
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{ |
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uint8_t x = *(uint8_t *)(ic->arg[0]); |
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*(uint8_t *)(ic->arg[0]) = (x >> 4) | (x << 4); |
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} |
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|
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|
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/*****************************************************************************/ |
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|
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|
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X(end_of_page) |
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{ |
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/* Update the PC: (offset 0, but on the next page) */ |
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cpu->pc &= ~((AVR_IC_ENTRIES_PER_PAGE-1) << 1); |
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cpu->pc += (AVR_IC_ENTRIES_PER_PAGE << 1); |
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|
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/* Find the new physical page and update the translation pointers: */ |
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avr_pc_to_pointers(cpu); |
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|
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/* end_of_page doesn't count as an executed instruction: */ |
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cpu->n_translated_instrs --; |
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} |
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|
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|
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/*****************************************************************************/ |
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|
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|
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/* |
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* avr_combine_instructions(): |
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* |
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* Combine two or more instructions, if possible, into a single function call. |
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*/ |
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void avr_combine_instructions(struct cpu *cpu, struct avr_instr_call *ic, |
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uint32_t addr) |
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{ |
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int n_back; |
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n_back = (addr >> 1) & (AVR_IC_ENTRIES_PER_PAGE-1); |
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|
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if (n_back >= 1) { |
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/* TODO */ |
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} |
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|
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/* TODO: Combine forward as well */ |
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} |
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|
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|
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/*****************************************************************************/ |
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|
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|
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/* |
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* avr_instr_to_be_translated(): |
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* |
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* Translate an instruction word into an avr_instr_call. ic is filled in with |
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* valid data for the translated instruction, or a "nothing" instruction if |
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* there was a translation failure. The newly translated instruction is then |
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* executed. |
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*/ |
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X(to_be_translated) |
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{ |
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int addr, low_pc, rd, rr, main_opcode; |
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uint16_t iword; |
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unsigned char *page; |
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unsigned char ib[2]; |
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void (*samepage_function)(struct cpu *, struct avr_instr_call *); |
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|
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/* Figure out the (virtual) address of the instruction: */ |
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low_pc = ((size_t)ic - (size_t)cpu->cd.avr.cur_ic_page) |
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/ sizeof(struct avr_instr_call); |
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addr = cpu->pc & ~((AVR_IC_ENTRIES_PER_PAGE-1) << |
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AVR_INSTR_ALIGNMENT_SHIFT); |
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addr += (low_pc << AVR_INSTR_ALIGNMENT_SHIFT); |
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cpu->pc = addr; |
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addr &= ~((1 << AVR_INSTR_ALIGNMENT_SHIFT) - 1); |
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|
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addr &= cpu->cd.avr.pc_mask; |
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|
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/* Read the instruction word from memory: */ |
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page = cpu->cd.avr.host_load[addr >> 12]; |
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|
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if (page != NULL) { |
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/* fatal("TRANSLATION HIT!\n"); */ |
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memcpy(ib, page + (addr & 0xfff), sizeof(ib)); |
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} else { |
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/* fatal("TRANSLATION MISS!\n"); */ |
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if (!cpu->memory_rw(cpu, cpu->mem, addr, ib, |
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sizeof(ib), MEM_READ, CACHE_INSTRUCTION)) { |
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fatal("to_be_translated(): " |
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"read failed: TODO\n"); |
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goto bad; |
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} |
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} |
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|
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iword = *((uint16_t *)&ib[0]); |
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|
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#ifdef HOST_BIG_ENDIAN |
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iword = ((iword & 0xff) << 8) | |
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((iword & 0xff00) >> 8); |
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#endif |
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|
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|
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#define DYNTRANS_TO_BE_TRANSLATED_HEAD |
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#include "cpu_dyntrans.c" |
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#undef DYNTRANS_TO_BE_TRANSLATED_HEAD |
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|
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|
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/* |
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* Translate the instruction: |
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*/ |
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main_opcode = iword >> 12; |
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|
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switch (main_opcode) { |
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|
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case 0x0: |
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if (iword == 0x0000) { |
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ic->f = instr(nop); |
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break; |
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} |
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goto bad; |
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|
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case 0x2: |
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if ((iword & 0xfc00) == 0x2c00) { |
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rd = (iword & 0x1f0) >> 4; |
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rr = ((iword & 0x200) >> 5) | (iword & 0xf); |
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ic->f = instr(mov); |
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ic->arg[0] = (size_t)(&cpu->cd.avr.r[rr]); |
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ic->arg[1] = (size_t)(&cpu->cd.avr.r[rd]); |
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break; |
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} |
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goto bad; |
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|
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case 0x9: |
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if ((iword & 0xfe0f) == 0x9402) { |
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rd = (iword >> 4) & 31; |
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ic->f = instr(swap); |
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ic->arg[0] = (size_t)(&cpu->cd.avr.r[rd]); |
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break; |
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} |
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if ((iword & 0xff8f) == 0x9408) { |
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switch ((iword >> 4) & 7) { |
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case 0: ic->f = instr(sec); break; |
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case 1: ic->f = instr(sez); break; |
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case 2: ic->f = instr(sen); break; |
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case 3: ic->f = instr(sev); break; |
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case 4: ic->f = instr(ses); break; |
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case 5: ic->f = instr(seh); break; |
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case 6: ic->f = instr(set); break; |
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case 7: ic->f = instr(sei); break; |
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} |
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break; |
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} |
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if ((iword & 0xff8f) == 0x9488) { |
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switch ((iword >> 4) & 7) { |
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case 0: ic->f = instr(clc); break; |
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case 1: ic->f = instr(clz); break; |
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case 2: ic->f = instr(cln); break; |
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case 3: ic->f = instr(clv); break; |
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case 4: ic->f = instr(cls); break; |
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case 5: ic->f = instr(clh); break; |
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case 6: ic->f = instr(clt); break; |
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case 7: ic->f = instr(cli); break; |
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} |
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break; |
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} |
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goto bad; |
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|
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case 0xc: |
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ic->f = instr(rjmp); |
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samepage_function = instr(rjmp_samepage); |
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ic->arg[0] = (((int16_t)((iword & 0x0fff) << 4)) >> 3) + 2; |
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/* Special case: branch within the same page: */ |
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{ |
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uint32_t mask_within_page = |
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((AVR_IC_ENTRIES_PER_PAGE-1) << |
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AVR_INSTR_ALIGNMENT_SHIFT) | |
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((1 << AVR_INSTR_ALIGNMENT_SHIFT) - 1); |
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uint32_t old_pc = addr; |
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uint32_t new_pc = old_pc + (int32_t)ic->arg[0]; |
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if ((old_pc & ~mask_within_page) == |
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(new_pc & ~mask_within_page)) { |
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ic->f = samepage_function; |
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ic->arg[0] = (size_t) ( |
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cpu->cd.avr.cur_ic_page + |
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((new_pc & mask_within_page) >> |
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AVR_INSTR_ALIGNMENT_SHIFT)); |
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} |
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} |
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break; |
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|
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case 0xe: |
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rd = ((iword >> 4) & 0xf) + 16; |
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ic->f = instr(ldi); |
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ic->arg[0] = (size_t)(&cpu->cd.avr.r[rd]); |
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ic->arg[1] = ((iword >> 4) & 0xf0) | (iword & 0xf); |
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break; |
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|
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default:goto bad; |
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} |
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|
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|
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#define DYNTRANS_TO_BE_TRANSLATED_TAIL |
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#include "cpu_dyntrans.c" |
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#undef DYNTRANS_TO_BE_TRANSLATED_TAIL |
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} |
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